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<PARTS_INDEX_TYPE><12F1822><17190>###############
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<PARTS_INDEX_TYPE><12F508><1943a>################
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<PARTS_INDEX_TYPE><12F529T39A><1a429>############
<PARTS_INDEX_TYPE><12F529T48A><1a959>############
<PARTS_INDEX_TYPE><12F609><1ae96>################
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<PARTS_INDEX_TYPE><12LF1840T39A><28373>##########
<PARTS_INDEX_TYPE><12LF1840T48A><294cd>##########
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<PARTS_INDEX_TYPE><16C56A><2cd82>################
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<PARTS_INDEX_TYPE><16C57C><2d295>################
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<PARTS_INDEX_TYPE><16C58B><2d7a9>################
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<PARTS_INDEX_TYPE><16C620A><2ddf1>###############
<PARTS_INDEX_TYPE><16C621><2e1ae>################
<PARTS_INDEX_TYPE><16C621A><2e5b1>###############
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<PARTS_INDEX_TYPE><16C622A><2edf4>###############
<PARTS_INDEX_TYPE><16C62A><2f234>################
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<PARTS_INDEX_TYPE><16C65B><310ad>################
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<PARTS_INDEX_TYPE><16C662><3192b>################
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<PARTS_INDEX_TYPE><16C71><3226a>#################
<PARTS_INDEX_TYPE><16C710><3258b>################
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<PARTS_INDEX_TYPE><16C765><36239>################
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<PARTS_INDEX_TYPE><16C770><36a6e>################
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<PARTS_INDEX_TYPE><16CE623><39ced>###############
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<PARTS_INDEX_TYPE><18F86J93><401320>#############
<PARTS_INDEX_TYPE><18F86J94><4020a2>#############
<PARTS_INDEX_TYPE><18F86J99><4099c6>#############
<PARTS_INDEX_TYPE><18F86K22><4112fb>#############
<PARTS_INDEX_TYPE><18F86K90><4138ed>#############
<PARTS_INDEX_TYPE><18F8720><415c06>##############
<PARTS_INDEX_TYPE><18F8722><4186ca>##############
<PARTS_INDEX_TYPE><18F8723><41bce6>##############
<PARTS_INDEX_TYPE><18F87J10><41f302>#############
<PARTS_INDEX_TYPE><18F87J11><420607>#############
<PARTS_INDEX_TYPE><18F87J50><421b02>#############
<PARTS_INDEX_TYPE><18F87J60><423396>#############
<PARTS_INDEX_TYPE><18F87J72><4243a7>#############
<PARTS_INDEX_TYPE><18F87J90><425147>#############
<PARTS_INDEX_TYPE><18F87J93><425fec>#############
<PARTS_INDEX_TYPE><18F87J94><426d75>#############
<PARTS_INDEX_TYPE><18F87K22><42e6aa>#############
<PARTS_INDEX_TYPE><18F87K90><43134c>#############
<PARTS_INDEX_TYPE><18F95J94><433d15>#############
<PARTS_INDEX_TYPE><18F96J60><43b639>#############
<PARTS_INDEX_TYPE><18F96J65><43ca8d>#############
<PARTS_INDEX_TYPE><18F96J94><43dee8>#############
<PARTS_INDEX_TYPE><18F96J99><44580c>#############
<PARTS_INDEX_TYPE><18F97J60><44d141>#############
<PARTS_INDEX_TYPE><18F97J94><44e59c>#############
<PARTS_INDEX_TYPE><18LF1220><455ed1>#############
<PARTS_INDEX_TYPE><18LF1230><4578da>#############
<PARTS_INDEX_TYPE><18LF1320><459931>#############
<PARTS_INDEX_TYPE><18LF1330><45b33b>#############
<PARTS_INDEX_TYPE><18LF13K22><45d3da>############
<PARTS_INDEX_TYPE><18LF13K50><45f287>############
<PARTS_INDEX_TYPE><18LF14K22><4613a2>############
<PARTS_INDEX_TYPE><18LF14K50><46324e>############
<PARTS_INDEX_TYPE><18LF2220><465368>#############
<PARTS_INDEX_TYPE><18LF2221><466fa2>#############
<PARTS_INDEX_TYPE><18LF2320><468dd6>#############
<PARTS_INDEX_TYPE><18LF2321><46af5b>#############
<PARTS_INDEX_TYPE><18LF2331><46cdbb>#############
<PARTS_INDEX_TYPE><18LF23K22><46ec83>############
<PARTS_INDEX_TYPE><18LF2410><47113a>#############
<PARTS_INDEX_TYPE><18LF242><472ea3>##############
<PARTS_INDEX_TYPE><18LF2420><47465b>#############
<PARTS_INDEX_TYPE><18LF2423><47653a>#############
<PARTS_INDEX_TYPE><18LF2431><478419>#############
<PARTS_INDEX_TYPE><18LF2439><47a82b>#############
<PARTS_INDEX_TYPE><18LF2450><47bcf9>#############
<PARTS_INDEX_TYPE><18LF2455><47e29d>#############
<PARTS_INDEX_TYPE><18LF2458><480bb1>#############
<PARTS_INDEX_TYPE><18LF248><4834c5>##############
<PARTS_INDEX_TYPE><18LF2480><484b93>#############
<PARTS_INDEX_TYPE><18LF24J10><486a92>############
<PARTS_INDEX_TYPE><18LF24J11><487780>############
<PARTS_INDEX_TYPE><18LF24J50><4891b7>############
<PARTS_INDEX_TYPE><18LF24K22><48af42>############
<PARTS_INDEX_TYPE><18LF24K40><48d3f9>############
<PARTS_INDEX_TYPE><18LF24K42><4900af>############
<PARTS_INDEX_TYPE><18LF24K50><492dce>############
<PARTS_INDEX_TYPE><18LF2510><495425>#############
<PARTS_INDEX_TYPE><18LF2515><4976d8>#############
<PARTS_INDEX_TYPE><18LF252><4996e6>##############
<PARTS_INDEX_TYPE><18LF2520><49b3e8>#############
<PARTS_INDEX_TYPE><18LF2523><49d812>#############
<PARTS_INDEX_TYPE><18LF2525><49fc3b>#############
<PARTS_INDEX_TYPE><18LF2539><4a1dc5>#############
<PARTS_INDEX_TYPE><18LF2550><4a3538>#############
<PARTS_INDEX_TYPE><18LF2553><4a6103>#############
<PARTS_INDEX_TYPE><18LF258><4a8cce>##############
<PARTS_INDEX_TYPE><18LF2580><4aa8e6>#############
<PARTS_INDEX_TYPE><18LF2585><4acd2f>#############
<PARTS_INDEX_TYPE><18LF25J10><4aef15>############
<PARTS_INDEX_TYPE><18LF25J11><4afc03>############
<PARTS_INDEX_TYPE><18LF25J50><4b1abb>############
<PARTS_INDEX_TYPE><18LF25K22><4b3cc6>############
<PARTS_INDEX_TYPE><18LF25K40><4b66d6>############
<PARTS_INDEX_TYPE><18LF25K42><4b975c>############
<PARTS_INDEX_TYPE><18LF25K50><4bc4c0>############
<PARTS_INDEX_TYPE><18LF25K80><4beff7>############
<PARTS_INDEX_TYPE><18LF25K83><4c1182>############
<PARTS_INDEX_TYPE><18LF2610><4c3ee8>#############
<PARTS_INDEX_TYPE><18LF2620><4c619b>#############
<PARTS_INDEX_TYPE><18LF2680><4c85ca>#############
<PARTS_INDEX_TYPE><18LF2682><4caa55>#############
<PARTS_INDEX_TYPE><18LF2685><4cd18f>#############
<PARTS_INDEX_TYPE><18LF26J11><4cfb74>############
<PARTS_INDEX_TYPE><18LF26J13><4d232c>############
<PARTS_INDEX_TYPE><18LF26J50><4d4f35>############
<PARTS_INDEX_TYPE><18LF26J53><4d7a41>############
<PARTS_INDEX_TYPE><18LF26K22><4da811>############
<PARTS_INDEX_TYPE><18LF26K40><4dd22b>############
<PARTS_INDEX_TYPE><18LF26K42><4e02b2>############
<PARTS_INDEX_TYPE><18LF26K80><4e305e>############
<PARTS_INDEX_TYPE><18LF26K83><4e51e9>############
<PARTS_INDEX_TYPE><18LF27J13><4e7f96>############
<PARTS_INDEX_TYPE><18LF27J53><4ebde0>############
<PARTS_INDEX_TYPE><18LF27K40><4efdf1>############
<PARTS_INDEX_TYPE><18LF27K42><4f3629>############
<PARTS_INDEX_TYPE><18LF4220><4f641d>#############
<PARTS_INDEX_TYPE><18LF4221><4f8057>#############
<PARTS_INDEX_TYPE><18LF4320><4f9e8b>#############
<PARTS_INDEX_TYPE><18LF4321><4fc010>#############
<PARTS_INDEX_TYPE><18LF4331><4fde70>#############
<PARTS_INDEX_TYPE><18LF43K22><5000f0>############
<PARTS_INDEX_TYPE><18LF4410><5025b1>#############
<PARTS_INDEX_TYPE><18LF442><50431a>##############
<PARTS_INDEX_TYPE><18LF4420><505ad2>#############
<PARTS_INDEX_TYPE><18LF4423><5079b2>#############
<PARTS_INDEX_TYPE><18LF4431><509891>#############
<PARTS_INDEX_TYPE><18LF4439><50c05b>#############
<PARTS_INDEX_TYPE><18LF4450><50d529>#############
<PARTS_INDEX_TYPE><18LF4455><50fb8d>#############
<PARTS_INDEX_TYPE><18LF4458><512561>#############
<PARTS_INDEX_TYPE><18LF448><514f35>##############
<PARTS_INDEX_TYPE><18LF4480><516603>#############
<PARTS_INDEX_TYPE><18LF44J10><518502>############
<PARTS_INDEX_TYPE><18LF44J11><5191f0>############
<PARTS_INDEX_TYPE><18LF44J50><51ac27>############
<PARTS_INDEX_TYPE><18LF44K22><51c9b1>############
<PARTS_INDEX_TYPE><18LF4510><51ee72>#############
<PARTS_INDEX_TYPE><18LF4515><521125>#############
<PARTS_INDEX_TYPE><18LF452><523133>##############
<PARTS_INDEX_TYPE><18LF4520><524e35>#############
<PARTS_INDEX_TYPE><18LF4523><52725f>#############
<PARTS_INDEX_TYPE><18LF4525><529688>#############
<PARTS_INDEX_TYPE><18LF4539><52b812>#############
<PARTS_INDEX_TYPE><18LF4550><52cf85>#############
<PARTS_INDEX_TYPE><18LF4553><52fc10>#############
<PARTS_INDEX_TYPE><18LF458><53289b>##############
<PARTS_INDEX_TYPE><18LF4580><5344b3>#############
<PARTS_INDEX_TYPE><18LF4585><5368fc>#############
<PARTS_INDEX_TYPE><18LF45J10><538ae2>############
<PARTS_INDEX_TYPE><18LF45J11><5397d0>############
<PARTS_INDEX_TYPE><18LF45J50><53b688>############
<PARTS_INDEX_TYPE><18LF45K22><53d893>############
<PARTS_INDEX_TYPE><18LF45K40><5402b6>############
<PARTS_INDEX_TYPE><18LF45K42><54333c>############
<PARTS_INDEX_TYPE><18LF45K50><5460a0>############
<PARTS_INDEX_TYPE><18LF45K80><548c05>############
<PARTS_INDEX_TYPE><18LF4610><54ad90>#############
<PARTS_INDEX_TYPE><18LF4620><54d043>#############
<PARTS_INDEX_TYPE><18LF4680><54f472>#############
<PARTS_INDEX_TYPE><18LF4682><5518fd>#############
<PARTS_INDEX_TYPE><18LF4685><554037>#############
<PARTS_INDEX_TYPE><18LF46J11><556a1c>############
<PARTS_INDEX_TYPE><18LF46J13><5591d4>############
<PARTS_INDEX_TYPE><18LF46J50><55bddd>############
<PARTS_INDEX_TYPE><18LF46J53><55e8e8>############
<PARTS_INDEX_TYPE><18LF46K22><5616b8>############
<PARTS_INDEX_TYPE><18LF46K40><5640dc>############
<PARTS_INDEX_TYPE><18LF46K42><567163>############
<PARTS_INDEX_TYPE><18LF46K80><569f0f>############
<PARTS_INDEX_TYPE><18LF47J13><56c09a>############
<PARTS_INDEX_TYPE><18LF47J53><56fee4>############
<PARTS_INDEX_TYPE><18LF47K40><573ef5>############
<PARTS_INDEX_TYPE><18LF47K42><57772d>############
<PARTS_INDEX_TYPE><18LF55K42><57a521>############
<PARTS_INDEX_TYPE><18LF56K42><57d285>############
<PARTS_INDEX_TYPE><18LF57K42><580031>############
<PARTS_INDEX_TYPE><18LF6310><582e25>#############
<PARTS_INDEX_TYPE><18LF6390><5840b2>#############
<PARTS_INDEX_TYPE><18LF6393><585311>#############
<PARTS_INDEX_TYPE><18LF6410><586570>#############
<PARTS_INDEX_TYPE><18LF6490><5877fd>#############
<PARTS_INDEX_TYPE><18LF6493><588a5c>#############
<PARTS_INDEX_TYPE><18LF6520><589cbb>#############
<PARTS_INDEX_TYPE><18LF6525><58ba22>#############
<PARTS_INDEX_TYPE><18LF6527><58d7c4>#############
<PARTS_INDEX_TYPE><18LF6585><58fa48>#############
<PARTS_INDEX_TYPE><18LF65K40><591781>############
<PARTS_INDEX_TYPE><18LF65K80><594804>############
<PARTS_INDEX_TYPE><18LF6620><596ba7>#############
<PARTS_INDEX_TYPE><18LF6621><59890e>#############
<PARTS_INDEX_TYPE><18LF6622><59a956>#############
<PARTS_INDEX_TYPE><18LF6627><59ce97>#############
<PARTS_INDEX_TYPE><18LF6628><59f95f>#############
<PARTS_INDEX_TYPE><18LF6680><5a2427>#############
<PARTS_INDEX_TYPE><18LF66K40><5a441c>############
<PARTS_INDEX_TYPE><18LF66K80><5a749f>############
<PARTS_INDEX_TYPE><18LF6720><5a9842>#############
<PARTS_INDEX_TYPE><18LF6722><5ac056>#############
<PARTS_INDEX_TYPE><18LF6723><5af0a4>#############
<PARTS_INDEX_TYPE><18LF67K40><5b20f2>############
<PARTS_INDEX_TYPE><18LF8310><5b5928>#############
<PARTS_INDEX_TYPE><18LF8390><5b6fff>#############
<PARTS_INDEX_TYPE><18LF8393><5b825e>#############
<PARTS_INDEX_TYPE><18LF8410><5b94bd>#############
<PARTS_INDEX_TYPE><18LF8490><5bab94>#############
<PARTS_INDEX_TYPE><18LF8493><5bbdf3>#############
<PARTS_INDEX_TYPE><18LF8520><5bd052>#############
<PARTS_INDEX_TYPE><18LF8525><5bf06a>#############
<PARTS_INDEX_TYPE><18LF8527><5c1169>#############
<PARTS_INDEX_TYPE><18LF8585><5c39bc>#############
<PARTS_INDEX_TYPE><18LF8620><5c5a42>#############
<PARTS_INDEX_TYPE><18LF8621><5c7a5a>#############
<PARTS_INDEX_TYPE><18LF8622><5c9dff>#############
<PARTS_INDEX_TYPE><18LF8627><5cc90f>#############
<PARTS_INDEX_TYPE><18LF8628><5cf9a6>#############
<PARTS_INDEX_TYPE><18LF8680><5d2a3d>#############
<PARTS_INDEX_TYPE><18LF8720><5d4d80>#############
<PARTS_INDEX_TYPE><18LF8722><5d7845>#############
<PARTS_INDEX_TYPE><18LF8723><5dae62>#############
<PARTS_INDEX_TYPE><MCP19110><5de47f>#############
<PARTS_INDEX_TYPE><MCP19111><5de9ec>#############
<PARTS_INDEX_TYPE><MCP19114><5def59>#############
<PARTS_INDEX_TYPE><MCP19115><5df588>#############
<PARTS_INDEX_TYPE><MCP19116><5dfbb9>#############
<PARTS_INDEX_TYPE><MCP19117><5e01e9>#############
<PARTS_INDEX_TYPE><MCP19118><5e0819>#############
<PARTS_INDEX_TYPE><MCP19119><5e0d86>#############
<PARTS_INDEX_TYPE><MCP19120><5e12f3>#############
<PARTS_INDEX_TYPE><MCP19121><5e18e5>#############
<PARTS_INDEX_TYPE><MCP19122><5e1ed7>#############
<PARTS_INDEX_TYPE><MCP19123><5e24c9>#############
<PARTS_INDEX_TYPE><MCP19124><5e2abb>#############
<PARTS_INDEX_TYPE><MCP19125><5e30eb>#############
<PARTS_INDEX_TYPE><MCP19126><5e371c>#############
<PARTS_INDEX_TYPE><MCP19128><5e3d4c>#############
<PARTS_INDEX_TYPE><MCP19132><5e437e>#############
<PARTS_INDEX_TYPE><MCP19133><5e61b1>#############
<PARTS_INDEX_TYPE><MCP19214><5e7ff6>#############
<PARTS_INDEX_TYPE><MCP19215><5e8627>#############
<PARTS_INDEX_TYPE><MCP19625><5e8c59>#############
<PARTS_INDEX_TYPE><MCP25020><5e91c6>#############
<PARTS_INDEX_TYPE><MCP25025><5e9372>#############
<PARTS_INDEX_TYPE><MCP25050><5e951e>#############
<PARTS_INDEX_TYPE><MCP25055><5e96ca>#############
<PARTS_INDEX_TYPE><MCV08A><5e9876>###############
<PARTS_INDEX_TYPE><MCV14A><5e9ca5>###############
<PARTS_INDEX_TYPE><MCV18A><5ea31b>###############
<PARTS_INDEX_TYPE><MCV18E><5ea5a0>###############
<PARTS_INDEX_TYPE><MCV20USB><5eaa56>#############
<PARTS_INDEX_TYPE><MCV28A><5ecb6d>###############
<PARTS_INDEX_TYPE><PS500><5ecdf2>################
<PARTS_INDEX_TYPE><PS810><5ed805>################
<PARTS_INDEX_TYPE><RF509AF><5edf9c>##############
<PARTS_INDEX_TYPE><RF509AG><5ee2de>##############
<PARTS_INDEX_TYPE><RF675F><5ee620>###############
<PARTS_INDEX_TYPE><RF675H><5eee6d>###############
<PARTS_INDEX_TYPE><RF675K><5ef6ba>###############
<PARTS_INDEX_TYPE><14000><5eff07>################
<PARTS_INDEX_TYPE><16C5X><5eff56>################
<PARTS_INDEX_TYPE><16CXX><5effa4>################
<PARTS_INDEX_TYPE><17C42><5efff4>################
<PARTS_INDEX_TYPE><17C42A><5f0044>###############
<PARTS_INDEX_TYPE><17C43><5f0095>################
<PARTS_INDEX_TYPE><17C44><5f00e5>################
<PARTS_INDEX_TYPE><17C752><5f0135>###############
<PARTS_INDEX_TYPE><17C756><5f0186>###############
<PARTS_INDEX_TYPE><17C756A><5f01d7>##############
<PARTS_INDEX_TYPE><17C762><5f0229>###############
<PARTS_INDEX_TYPE><17C766><5f027a>###############
<PARTS_INDEX_TYPE><17CR42><5f02cb>###############
<PARTS_INDEX_TYPE><17CR43><5f031c>###############
<PARTS_INDEX_TYPE><17CXX><5f036c>################
<PARTS_INDEX_TYPE><18CXX><5f03bc>################
<PARTS_INDEX_TYPE><AP7675><5f0414>###############
<PARTS_INDEX_TYPE><EEPROM16><5f0461>#############
<PARTS_INDEX_TYPE><EEPROM8><5f04b0>##############
<PART_INFO_TYPE><f200><PIC10F200><16c5x><0><0><ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><4>
<SWITCH_INFO_TYPE><OSC><Oscillator><1><1>
<SETTING_VALUE_TYPE><IntRC><This is the only option. It is here for backward compatibility><1>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code Protect><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><10><2>
<SETTING_VALUE_TYPE><OFF><GP3/MCLR pin fuction is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><GP3/MCLR pin function  is MCLR><10>
<PART_INFO_TYPE><f202><PIC10F202><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><4>
<SWITCH_INFO_TYPE><OSC><Oscillator><1><1>
<SETTING_VALUE_TYPE><IntRC><This is the only option. It is here for backward compatibility><1>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code Protect><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><10><2>
<SETTING_VALUE_TYPE><OFF><GP3/MCLR pin fuction is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><GP3/MCLR pin function  is MCLR><10>
<PART_INFO_TYPE><f204><PIC10F204><16c5x><0><0><ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><4>
<SWITCH_INFO_TYPE><OSC><Oscillator><1><1>
<SETTING_VALUE_TYPE><IntRC><This is the only option. It is here for backward compatibility><1>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code Protect><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><10><2>
<SETTING_VALUE_TYPE><OFF><GP3/MCLR pin fuction is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><GP3/MCLR pin function  is MCLR><10>
<PART_INFO_TYPE><f206><PIC10F206><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><4>
<SWITCH_INFO_TYPE><OSC><Oscillator><1><1>
<SETTING_VALUE_TYPE><IntRC><This is the only option. It is here for backward compatibility><1>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code Protect><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><10><2>
<SETTING_VALUE_TYPE><OFF><GP3/MCLR pin fuction is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><GP3/MCLR pin function  is MCLR><10>
<PART_INFO_TYPE><f220><PIC10F220><16c5x><0><0><ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><6>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select bit><1><2>
<SETTING_VALUE_TYPE><4MHZ><4 MHz><0>
<SETTING_VALUE_TYPE><8MHZ><8 MHz><1>
<SWITCH_INFO_TYPE><IOFSCS><Internal Oscillator Frequency Select bit><1><2>
<SETTING_VALUE_TYPE><4MHZ><4 MHz><0>
<SETTING_VALUE_TYPE><8MHZ><8 MHz><1>
<SWITCH_INFO_TYPE><MCPU><Master Clear Pull-up Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Pull-up enabled><0>
<SETTING_VALUE_TYPE><OFF><Pull-up disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><GP3/MCLR Pin Function Select bit><10><2>
<SETTING_VALUE_TYPE><OFF><GP3/MCLR pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><GP3/MCLR pin function is MCLR><10>
<PART_INFO_TYPE><f222><PIC10F222><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><6>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select bit><1><2>
<SETTING_VALUE_TYPE><4MHZ><4 MHz><0>
<SETTING_VALUE_TYPE><8MHZ><8 MHz><1>
<SWITCH_INFO_TYPE><IOFSCS><Internal Oscillator Frequency Select bit><1><2>
<SETTING_VALUE_TYPE><4MHZ><4 MHz><0>
<SETTING_VALUE_TYPE><8MHZ><8 MHz><1>
<SWITCH_INFO_TYPE><MCPU><Master Clear Pull-up Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Pull-up enabled><0>
<SETTING_VALUE_TYPE><OFF><Pull-up disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><GP3/MCLR Pin Function Select bit><10><2>
<SETTING_VALUE_TYPE><OFF><GP3/MCLR pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><GP3/MCLR pin function is MCLR><10>
<PART_INFO_TYPE><f320><PIC10F320><16xxxx><0><0><ff><1><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><3fff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><1><2>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: CLKIN function disabled><0>
<SETTING_VALUE_TYPE><EC><EC: CLKIN function enabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><2>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><100><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><100>
<SWITCH_INFO_TYPE><LPBOR><Brown-out Reset Selection bits><200><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><1800><4>
<SETTING_VALUE_TYPE><ALL><000h to 0FFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 07Fh write protected, 080h to 0FFh may be modified by PMCON control><800>
<SETTING_VALUE_TYPE><BOOT><000h to 03Fh write protected, 040h to 0FFh may be modified by PMCON control><1000>
<SETTING_VALUE_TYPE><OFF><Write protection off><1800>
<PART_INFO_TYPE><f322><PIC10F322><16xxxx><0><0><1ff><1><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><3fff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><1><2>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: CLKIN function disabled><0>
<SETTING_VALUE_TYPE><EC><EC: CLKIN function enabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><2>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><100><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><100>
<SWITCH_INFO_TYPE><LPBOR><Brown-out Reset Selection bits><200><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><1800><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 0FFh write protected, 100h to 1FFh may be modified by PMCON control><800>
<SETTING_VALUE_TYPE><BOOT><000h to 07Fh write protected, 080h to 1FFh may be modified by PMCON control><1000>
<SETTING_VALUE_TYPE><OFF><Write protection off><1800>
<PART_INFO_TYPE><a320><PIC10LF320><16xxxx><0><0><ff><1><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><3fff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><1><2>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: CLKIN function disabled><0>
<SETTING_VALUE_TYPE><EC><EC: CLKIN function enabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><2>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><100><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><100>
<SWITCH_INFO_TYPE><LPBOR><Brown-out Reset Selection bits><200><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><1800><4>
<SETTING_VALUE_TYPE><ALL><000h to 0FFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 07Fh write protected, 080h to 0FFh may be modified by PMCON control><800>
<SETTING_VALUE_TYPE><BOOT><000h to 03Fh write protected, 040h to 0FFh may be modified by PMCON control><1000>
<SETTING_VALUE_TYPE><OFF><Write protection off><1800>
<PART_INFO_TYPE><a322><PIC10LF322><16xxxx><0><0><1ff><1><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><3fff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><1><2>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: CLKIN function disabled><0>
<SETTING_VALUE_TYPE><EC><EC: CLKIN function enabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><2>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><100><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><100>
<SWITCH_INFO_TYPE><LPBOR><Brown-out Reset Selection bits><200><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><1800><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 0FFh write protected, 100h to 1FFh may be modified by PMCON control><800>
<SETTING_VALUE_TYPE><BOOT><000h to 07Fh write protected, 080h to 1FFh may be modified by PMCON control><1000>
<SETTING_VALUE_TYPE><OFF><Write protection off><1800>
<PART_INFO_TYPE><2508><PIC12C508><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><4>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><IntRC><internal RC oscillator><2>
<SETTING_VALUE_TYPE><ExtRC><external RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><MCLR tied to VDD, (Internally)><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled><10>
<PART_INFO_TYPE><508a><PIC12C508A><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><4>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><IntRC><internal RC oscillator><2>
<SETTING_VALUE_TYPE><ExtRC><external RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><MCLR tied to VDD, (Internally)><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled><10>
<PART_INFO_TYPE><2509><PIC12C509><16c5x><0><2><3ff><2><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><4>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><IntRC><internal RC oscillator><2>
<SETTING_VALUE_TYPE><ExtRC><external RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><MCLR tied to VDD, (Internally)><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled><10>
<PART_INFO_TYPE><509a><PIC12C509A><16c5x><0><2><3ff><2><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><4>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><IntRC><internal RC oscillator><2>
<SETTING_VALUE_TYPE><ExtRC><external RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><MCLR tied to VDD, (Internally)><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled><10>
<PART_INFO_TYPE><2671><PIC12C671><16xxxx><0><0><3ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><INTRCIO><INTRC, OSC2 is I/O><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTRC, Clockout on OSC2><5>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC, OSC2 is I/O><6>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC, Clockout on OSC2><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power Up Timer><10><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><10>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f60><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-03FEh code protected><1520>
<SETTING_VALUE_TYPE><50><Do not use><2a40>
<SETTING_VALUE_TYPE><OFF><code protection off><3f60>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><Master Clear disabled><0>
<SETTING_VALUE_TYPE><ON><Master Clear enabled><80>
<PART_INFO_TYPE><2672><PIC12C672><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><INTRCIO><INTRC, OSC2 is I/O><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTRC, Clockout on OSC2><5>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC, OSC2 is I/O><6>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC, Clockout on OSC2><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power Up Timer><10><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><10>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f60><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FEh code protected><1520>
<SETTING_VALUE_TYPE><50><0400h-07FEh code protected><2a40>
<SETTING_VALUE_TYPE><OFF><code protection off><3f60>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><Master Clear disabled><0>
<SETTING_VALUE_TYPE><ON><Master Clear enabled><80>
<PART_INFO_TYPE><2518><PIC12CE518><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><4>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><IntRC><internal RC oscillator><2>
<SETTING_VALUE_TYPE><ExtRC><external RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><MCLR tied to VDD, (Internally)><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled><10>
<PART_INFO_TYPE><2519><PIC12CE519><16c5x><0><2><3ff><2><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><4>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><IntRC><internal RC oscillator><2>
<SETTING_VALUE_TYPE><ExtRC><external RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><MCLR tied to VDD, (Internally)><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled><10>
<PART_INFO_TYPE><2673><PIC12CE673><16xxxx><0><0><3ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><INTRCIO><INTRC, OSC2 is I/O><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTRC, Clockout on OSC2><5>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC, OSC2 is I/O><6>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC, Clockout on OSC2><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power Up Timer><10><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><10>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f60><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-03FEh code protected><1520>
<SETTING_VALUE_TYPE><50><Do not use><2a40>
<SETTING_VALUE_TYPE><OFF><code protection off><3f60>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><Master Clear disabled><0>
<SETTING_VALUE_TYPE><ON><Master Clear enabled><80>
<PART_INFO_TYPE><2674><PIC12CE674><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><INTRCIO><INTRC, OSC2 is I/O><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTRC, Clockout on OSC2><5>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC, OSC2 is I/O><6>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC, Clockout on OSC2><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power Up Timer><10><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><10>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f60><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FEh code protected><1520>
<SETTING_VALUE_TYPE><50><0400h-07FEh code protected><2a40>
<SETTING_VALUE_TYPE><OFF><code protection off><3f60>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><Master Clear disabled><0>
<SETTING_VALUE_TYPE><ON><Master Clear enabled><80>
<PART_INFO_TYPE><d09a><PIC12CR509A><16c5x><0><2><3ff><2><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><4>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><IntRC><internal RC oscillator><2>
<SETTING_VALUE_TYPE><ExtRC><external RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><MCLR tied to VDD, (Internally)><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled><10>
<PART_INFO_TYPE><1501><PIC12F1501><16Exxx><2><0><3ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1571><PIC12F1571><16Exxx><2><0><3ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator; I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFh write protected, 200h to 3FFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 0FFh write protected, 100h to 3FFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOREN><Low Power Brown-out Reset enable bit><800><2>
<SETTING_VALUE_TYPE><ON><LPBOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><LPBOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1572><PIC12F1572><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator; I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 3FFh write protected, 400h to 7FFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 7FFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOREN><Low Power Brown-out Reset enable bit><800><2>
<SETTING_VALUE_TYPE><ON><LPBOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><LPBOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1612><PIC12F1612><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><3>
<CONFIGREG_INFO_TYPE><8007><0><3fff><6>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pins><3>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><3fff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><ZCD><Zero Cross Detect Disable Bit><80><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disable.  ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select><1f><14>
<SETTING_VALUE_TYPE><WDTCPS0><1:32 (1 ms period)><0>
<SETTING_VALUE_TYPE><WDTCPS1><1:64 (2 ms period)><1>
<SETTING_VALUE_TYPE><WDTCPS2><1:128 (4 ms period)><2>
<SETTING_VALUE_TYPE><WDTCPS3><1:256 (8 ms period)><3>
<SETTING_VALUE_TYPE><WDTCPS4><1:512 (16 ms period)><4>
<SETTING_VALUE_TYPE><WDTCPS5><1:1024 (32 ms period)><5>
<SETTING_VALUE_TYPE><WDTCPS6><1:2048 (64 ms period)><6>
<SETTING_VALUE_TYPE><WDTCPS7><1:4096 (128 ms period)><7>
<SETTING_VALUE_TYPE><WDTCPS8><1:8192 (256 ms period)><8>
<SETTING_VALUE_TYPE><WDTCPS9><1:16384 (512 ms period)><9>
<SETTING_VALUE_TYPE><WDTCPSA><1:32768 (1 s period)><a>
<SETTING_VALUE_TYPE><WDTCPSB><1:65536 (2 s period)><b>
<SETTING_VALUE_TYPE><WDTCPSC><1:131072 (4 s period)><c>
<SETTING_VALUE_TYPE><WDTCPSD><1:262144 (8 s period)><d>
<SETTING_VALUE_TYPE><WDTCPSE><1:524299 (16 s period)><e>
<SETTING_VALUE_TYPE><WDTCPSF><1:1048576 (32 s period)><f>
<SETTING_VALUE_TYPE><WDTCPS10><1:2097152 (64 s period)><10>
<SETTING_VALUE_TYPE><WDTCPS11><1:4194304 (128 s period)><11>
<SETTING_VALUE_TYPE><WDTCPS12><1:8388608 (256 s period)><12>
<SETTING_VALUE_TYPE><WDTCPS1F><Software Control (WDTPS)><1f>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><60><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><40>
<SETTING_VALUE_TYPE><ON><WDT enabled><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select><700><8>
<SETTING_VALUE_TYPE><WDTCWS125><12.5 percent window open time><0>
<SETTING_VALUE_TYPE><WDTCWS25><25 percent window open time><100>
<SETTING_VALUE_TYPE><WDTCWS375><37.5 percent window open time><200>
<SETTING_VALUE_TYPE><WDTCWS50><50 percent window open time><300>
<SETTING_VALUE_TYPE><WDTCWS625><62.5 percent window open time><400>
<SETTING_VALUE_TYPE><WDTCWS75><75 percent window open time><500>
<SETTING_VALUE_TYPE><WDTCWS100><100 percent window open time (Legacy WDT) ><600>
<SETTING_VALUE_TYPE><WDTCWSSW><Software WDT window size control (WDTWS bits)><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT Input Clock Selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><31.25 kHz HFINTOSC (MFINTOSC)><800>
<SETTING_VALUE_TYPE><SWC><Software control, controlled by WDTCS bits><3800>
<PART_INFO_TYPE><1822><PIC12F1822><16Exxx><2><1><7ff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 3FFh write protected, 400h to 7FFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 7FFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1840><PIC12F1840><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><f508><PIC12F508><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><4>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><IntRC><internal RC oscillator><2>
<SETTING_VALUE_TYPE><ExtRC><external RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><GP3/MCLR Pin Function Select bit><10><2>
<SETTING_VALUE_TYPE><OFF><GP3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><GP3/MCLR pin function is MCLR><10>
<PART_INFO_TYPE><f509><PIC12F509><16c5x><0><2><3ff><2><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><4>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><IntRC><internal RC oscillator><2>
<SETTING_VALUE_TYPE><ExtRC><external RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><GP3/MCLR Pin Function Select bit><10><2>
<SETTING_VALUE_TYPE><OFF><GP3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><GP3/MCLR pin function is MCLR><10>
<PART_INFO_TYPE><f510><PIC12F510><16c5x><0><2><3ff><2><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator Select><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator with 18 ms DRT><0>
<SETTING_VALUE_TYPE><XT><XT oscillator with 18 ms DRT><1>
<SETTING_VALUE_TYPE><IntRC><INTOSC with 1.125 ms DRT><2>
<SETTING_VALUE_TYPE><ExtRC><EXTRC with 1.125 ms DRT><3>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code Protect><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><GP3/MCLR pin functions as GP3, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><GP3/MCLR Functions as MCLR><10>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><4 MHz INTOSC Speed><0>
<SETTING_VALUE_TYPE><ON><8 MHz INTOSC Speed><20>
<PART_INFO_TYPE><f519><PIC12F519><16c5x><0><2><3ff><2><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><6>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP Osc With 18 ms DRT><0>
<SETTING_VALUE_TYPE><XT><XT Osc With 18 ms DRT><1>
<SETTING_VALUE_TYPE><INTRC><INTRC With 1 ms DRT><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC With 1 ms DRT><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><CP><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><RB3/MCLR Functions as RB3><0>
<SETTING_VALUE_TYPE><ON><RB3/MCLR Functions as MCLR><10>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select bit><20><2>
<SETTING_VALUE_TYPE><4MHz><4 MHz INTOSC Speed><0>
<SETTING_VALUE_TYPE><8MHz><8 MHz INTOSC Speed><20>
<SWITCH_INFO_TYPE><CPDF><Code Protection bit - Flash Data Memory><40><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><40>
<PART_INFO_TYPE><e529><PIC12F529T39A><16c5xe><0><3><5ff><8><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><dff><7>
<SWITCH_INFO_TYPE><OSC><Oscillator><3><4>
<SETTING_VALUE_TYPE><LP><LP Osc With 18 ms DRT><0>
<SETTING_VALUE_TYPE><XT><XT Osc With 18 ms DRT><1>
<SETTING_VALUE_TYPE><INTRC><INTRC With 1 ms DRT><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC With 1 ms DRT><3>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><PARITY><Configuration Word Parity><8><2>
<SETTING_VALUE_TYPE><CLEAR><Parity bit clear><0>
<SETTING_VALUE_TYPE><SET><Parity bit set><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><10><2>
<SETTING_VALUE_TYPE><OFF><RB3/MCLR Functions as RB3><0>
<SETTING_VALUE_TYPE><ON><RB3/MCLR Functions as MCLR><10>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select><20><2>
<SETTING_VALUE_TYPE><4MHz><4 MHz INTOSC Speed><0>
<SETTING_VALUE_TYPE><8MHz><8 MHz INTOSC Speed><20>
<SWITCH_INFO_TYPE><CPDF><Code Protection bit - Flash Data Memory><40><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><40>
<SWITCH_INFO_TYPE><CP><Code Protect State><780><2>
<SETTING_VALUE_TYPE><ENABLE><Enabled><100>
<SETTING_VALUE_TYPE><DISABLE><Disabled><580>
<PART_INFO_TYPE><d529><PIC12F529T48A><16c5xe><0><3><5ff><8><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><dff><7>
<SWITCH_INFO_TYPE><OSC><Oscillator><3><4>
<SETTING_VALUE_TYPE><LP><LP Osc With 18 ms DRT><0>
<SETTING_VALUE_TYPE><XT><XT Osc With 18 ms DRT><1>
<SETTING_VALUE_TYPE><INTRC><INTRC With 1 ms DRT><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC With 1 ms DRT><3>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><PARITY><Configuration Word Parity><8><2>
<SETTING_VALUE_TYPE><CLEAR><Parity bit clear><0>
<SETTING_VALUE_TYPE><SET><Parity bit set><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><10><2>
<SETTING_VALUE_TYPE><OFF><RB3/MCLR Functions as RB3><0>
<SETTING_VALUE_TYPE><ON><RB3/MCLR Functions as MCLR><10>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select><20><2>
<SETTING_VALUE_TYPE><4MHz><4 MHz INTOSC Speed><0>
<SETTING_VALUE_TYPE><8MHz><8 MHz INTOSC Speed><20>
<SWITCH_INFO_TYPE><CPDF><Code Protection bit - Flash Data Memory><40><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><40>
<SWITCH_INFO_TYPE><CP><Code Protect State><780><2>
<SETTING_VALUE_TYPE><ENABLE><Code Protect Enabled><100>
<SETTING_VALUE_TYPE><DISABLE><Disabled><580>
<PART_INFO_TYPE><f609><PIC12F609><16xxxx><0><0><3ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select><80><2>
<SETTING_VALUE_TYPE><4MHZ><4 MHz><0>
<SETTING_VALUE_TYPE><8MHZ><8 MHz><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<PART_INFO_TYPE><f615><PIC12F615><16xxxx><0><0><3ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select><80><2>
<SETTING_VALUE_TYPE><4MHZ><4 MHz><0>
<SETTING_VALUE_TYPE><8MHZ><8 MHz><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<PART_INFO_TYPE><f617><PIC12F617><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA5/T1CKI/OSC1/CLKIN and RA4/AN3/T1G/OSC2/CLKOUT><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA5/T1CKI/OSC1/CLKIN and RA4/AN3/T1G/OSC2/CLKOUT><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA5/T1CKI/OSC1/CLKIN and RA4/AN3/T1G/OSC2/CLKOUT><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/AN3/T1G/OSC2/CLKOUT, CLKIN on RA5/T1CKI/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA4/AN3/T1G/OSC2/CLKOUT, I/O function on RA5/T1CKI/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA4/AN3/T1G/OSC2/CLKOUT, I/O function on RA5/T1CKI/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRCIO oscillator: I/O function on RA4/AN3/T1G/OSC2/CLKOUT, RC on RA5/T1CKI/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator: CLKOUT function on RA4/AN3/T1G/OSC2/CLKOUT, RC on RA5/T1CKI/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select><80><2>
<SETTING_VALUE_TYPE><4MHZ><4 MHz><0>
<SETTING_VALUE_TYPE><8MHZ><8 MHz><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 3FFh write protected, 400h to 7FFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 7FFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><2629><PIC12F629><16xxxx><0><0><3ff><2><5f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><31ff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRCIO><INTOSC oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RC oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-Up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><GP3/MCLR pin function select><20><2>
<SETTING_VALUE_TYPE><OFF><GP3/MCLR pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><GP3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Detect Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOD disabled><0>
<SETTING_VALUE_TYPE><ON><BOD enabled><40>
<SWITCH_INFO_TYPE><CP><Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<PART_INFO_TYPE><f635><PIC12F635><16xxxx><0><0><3ff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/T1G/OSC2/CLKOUT, CLKIN on RA5/T1CKI/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA4/T1G/OSC2/CLKOUT pin, I/O function on RA5/T1CKI/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA4/T1G/OSC2/CLKOUT pin, I/O function on RA5/T1CKI/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA4/T1G/OSC2/CLKOUT pin, RC on RA5/T1CKI/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA4/T1G/OSC2/CLKOUT pin, RC on RA5/T1CKI/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory is external read protected><0>
<SETTING_VALUE_TYPE><OFF><Data memory is not code protected><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOD and SBODEN disabled><0>
<SETTING_VALUE_TYPE><SBODEN><SBODEN controls BOD function><100>
<SETTING_VALUE_TYPE><NSLEEP><BOD enabled while running and disabled in Sleep. SBODEN bit disabled.><200>
<SETTING_VALUE_TYPE><ON><BOD enabled and SBOdEN bit disabled><300>
<SWITCH_INFO_TYPE><IESO><Internal-External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><800>
<SWITCH_INFO_TYPE><WURE><Wake-Up Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><ON><Wake-up and Reset enabled><0>
<SETTING_VALUE_TYPE><OFF><Standard wake-up and continue enabled><1000>
<PART_INFO_TYPE><2675><PIC12F675><16xxxx><0><0><3ff><2><5f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><31ff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRCIO><INTOSC oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RC oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-Up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><GP3/MCLR pin function select><20><2>
<SETTING_VALUE_TYPE><OFF><GP3/MCLR pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><GP3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Detect Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOD disabled><0>
<SETTING_VALUE_TYPE><ON><BOD enabled><40>
<SWITCH_INFO_TYPE><CP><Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<PART_INFO_TYPE><f683><PIC12F683><16xxxx><0><1><7ff><2><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKINT><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin><6>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<PART_INFO_TYPE><f752><PIC12F752><16xxxx><0><0><3ff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><8>
<SWITCH_INFO_TYPE><FOSC0><FOSC: Oscillator Selection bit><1><2>
<SETTING_VALUE_TYPE><INT><Internal oscillator mode.  I/O function on RA5/CLKIN><0>
<SETTING_VALUE_TYPE><EC><EC oscillator mode.  CLKIN function on RA5/CLKIN><1>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Watchdog Timer disabled><0>
<SETTING_VALUE_TYPE><ON><Watchdog Timer enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><Power-up Timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power-up Timer disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function with internal weak pullup><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><300><3>
<SETTING_VALUE_TYPE><DIS><BOR disabled><0>
<SETTING_VALUE_TYPE><SLEEP_DIS><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><EN><BOR enabled><300>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bit><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFh self-write protected><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFh self-write protected><400>
<SETTING_VALUE_TYPE><FOURTH><000h to 0FFh self-write protected><800>
<SETTING_VALUE_TYPE><OFF><Flash self-write protection off><c00>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1000><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function enabled.  CLKOUT pin is CLKOUT><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function disabled.  CLKOUT pin acts as I/O><1000>
<PART_INFO_TYPE><6609><PIC12HV609><16xxxx><0><0><3ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select><80><2>
<SETTING_VALUE_TYPE><4MHZ><4 MHz><0>
<SETTING_VALUE_TYPE><8MHZ><8 MHz><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<PART_INFO_TYPE><6615><PIC12HV615><16xxxx><0><0><3ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select><80><2>
<SETTING_VALUE_TYPE><4MHZ><4 MHz><0>
<SETTING_VALUE_TYPE><8MHZ><8 MHz><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<PART_INFO_TYPE><6652><PIC12HV752><16xxxx><0><0><3ff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><8>
<SWITCH_INFO_TYPE><FOSC0><FOSC: Oscillator Selection bit><1><2>
<SETTING_VALUE_TYPE><INT><Internal oscillator mode.  I/O function on RA5/CLKIN><0>
<SETTING_VALUE_TYPE><EC><EC oscillator mode.  CLKIN function on RA5/CLKIN><1>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Watchdog Timer disabled><0>
<SETTING_VALUE_TYPE><ON><Watchdog Timer enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><Power-up Timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power-up Timer disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function with internal weak pullup><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><300><3>
<SETTING_VALUE_TYPE><DIS><BOR disabled><0>
<SETTING_VALUE_TYPE><SLEEP_DIS><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><EN><BOR enabled><300>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bit><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFh self-write protected><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFh self-write protected><400>
<SETTING_VALUE_TYPE><FOURTH><000h to 0FFh self-write protected><800>
<SETTING_VALUE_TYPE><OFF><Flash self-write protection off><c00>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1000><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function enabled.  CLKOUT pin is CLKOUT><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function disabled.  CLKOUT pin acts as I/O><1000>
<PART_INFO_TYPE><a501><PIC12LF1501><16Exxx><2><0><3ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a552><PIC12LF1552><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 3FFh write protected, 400h to 7FFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 7FFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a571><PIC12LF1571><16Exxx><2><0><3ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator; I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFh write protected, 200h to 3FFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 0FFh write protected, 100h to 3FFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOREN><Low Power Brown-out Reset enable bit><800><2>
<SETTING_VALUE_TYPE><ON><LPBOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><LPBOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a572><PIC12LF1572><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator; I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 3FFh write protected, 400h to 7FFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 7FFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOREN><Low Power Brown-out Reset enable bit><800><2>
<SETTING_VALUE_TYPE><ON><LPBOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><LPBOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a612><PIC12LF1612><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><3>
<CONFIGREG_INFO_TYPE><8007><0><3fff><6>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pins><3>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><3fff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><ZCD><Zero Cross Detect Disable Bit><80><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disable.  ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select><1f><14>
<SETTING_VALUE_TYPE><WDTCPS0><1:32 (1 ms period)><0>
<SETTING_VALUE_TYPE><WDTCPS1><1:64 (2 ms period)><1>
<SETTING_VALUE_TYPE><WDTCPS2><1:128 (4 ms period)><2>
<SETTING_VALUE_TYPE><WDTCPS3><1:256 (8 ms period)><3>
<SETTING_VALUE_TYPE><WDTCPS4><1:512 (16 ms period)><4>
<SETTING_VALUE_TYPE><WDTCPS5><1:1024 (32 ms period)><5>
<SETTING_VALUE_TYPE><WDTCPS6><1:2048 (64 ms period)><6>
<SETTING_VALUE_TYPE><WDTCPS7><1:4096 (128 ms period)><7>
<SETTING_VALUE_TYPE><WDTCPS8><1:8192 (256 ms period)><8>
<SETTING_VALUE_TYPE><WDTCPS9><1:16384 (512 ms period)><9>
<SETTING_VALUE_TYPE><WDTCPSA><1:32768 (1 s period)><a>
<SETTING_VALUE_TYPE><WDTCPSB><1:65536 (2 s period)><b>
<SETTING_VALUE_TYPE><WDTCPSC><1:131072 (4 s period)><c>
<SETTING_VALUE_TYPE><WDTCPSD><1:262144 (8 s period)><d>
<SETTING_VALUE_TYPE><WDTCPSE><1:524299 (16 s period)><e>
<SETTING_VALUE_TYPE><WDTCPSF><1:1048576 (32 s period)><f>
<SETTING_VALUE_TYPE><WDTCPS10><1:2097152 (64 s period)><10>
<SETTING_VALUE_TYPE><WDTCPS11><1:4194304 (128 s period)><11>
<SETTING_VALUE_TYPE><WDTCPS12><1:8388608 (256 s period)><12>
<SETTING_VALUE_TYPE><WDTCPS1F><Software Control (WDTPS)><1f>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><60><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><40>
<SETTING_VALUE_TYPE><ON><WDT enabled><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select><700><8>
<SETTING_VALUE_TYPE><WDTCWS125><12.5 percent window open time><0>
<SETTING_VALUE_TYPE><WDTCWS25><25 percent window open time><100>
<SETTING_VALUE_TYPE><WDTCWS375><37.5 percent window open time><200>
<SETTING_VALUE_TYPE><WDTCWS50><50 percent window open time><300>
<SETTING_VALUE_TYPE><WDTCWS625><62.5 percent window open time><400>
<SETTING_VALUE_TYPE><WDTCWS75><75 percent window open time><500>
<SETTING_VALUE_TYPE><WDTCWS100><100 percent window open time (Legacy WDT) ><600>
<SETTING_VALUE_TYPE><WDTCWSSW><Software WDT window size control (WDTWS bits)><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT Input Clock Selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><31.0 kHz LFINTOSC><800>
<SETTING_VALUE_TYPE><SWC><Software control, controlled by WDTCS bits><3800>
<PART_INFO_TYPE><a822><PIC12LF1822><16Exxx><2><1><7ff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 3FFh write protected, 400h to 7FFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 7FFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a840><PIC12LF1840><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><c840><PIC12LF1840T39A><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><b840><PIC12LF1840T48A><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><6432><PIC16C432><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1510>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6433><PIC16C433><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTCLK><EC I/O><3>
<SETTING_VALUE_TYPE><INTRCIO><INTRC, OSC2 is I/O><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTRC, clockout on OSC2><5>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC, OSC2 is I/O><6>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC, clockout on OSC2><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f60><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FEh code protected><1520>
<SETTING_VALUE_TYPE><50><0400h-07FEh code protected><2a40>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f60>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><Internal><0>
<SETTING_VALUE_TYPE><ON><External><80>
<PART_INFO_TYPE><2505><PIC16C505><16c5x><0><2><3ff><4><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><4>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><IntRC_RB4EN><Internal RC No Clock><4>
<SETTING_VALUE_TYPE><IntRC_CLKOUTEN><Internal RC Clockout><5>
<SETTING_VALUE_TYPE><ExtRC_RB4EN><External RC No Clock><6>
<SETTING_VALUE_TYPE><ExtRC_CLKOUTEN><External RC Clockout><7>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><CP><Code protection bit><fd0><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><fd0>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><20><2>
<SETTING_VALUE_TYPE><OFF><RB3/MCLR pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RB3/MCLR pin function is MCLR><20>
<PART_INFO_TYPE><6c54><PIC16C54><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<PART_INFO_TYPE><654a><PIC16C54A><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<PART_INFO_TYPE><654c><PIC16C54C><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><ff8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><ff8>
<PART_INFO_TYPE><6c55><PIC16C55><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<PART_INFO_TYPE><6554><PIC16C554><16xxxx><0><0><1ff><2><6f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code protection bits><3f30><2>
<SETTING_VALUE_TYPE><ON><0000h:01FFh code protected><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection off><3f30>
<PART_INFO_TYPE><6557><PIC16C557><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><000h:7FFh code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1510>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection off><3f30>
<PART_INFO_TYPE><6558><PIC16C558><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><000h:7FFh code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1510>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection off><3f30>
<PART_INFO_TYPE><655a><PIC16C55A><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><ff8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><ff8>
<PART_INFO_TYPE><6c56><PIC16C56><16c5x><0><2><3ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<PART_INFO_TYPE><656a><PIC16C56A><16c5x><0><2><3ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><ff8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><ff8>
<PART_INFO_TYPE><6c57><PIC16C57><16c5x><0><4><7ff><4><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<PART_INFO_TYPE><657c><PIC16C57C><16c5x><0><4><7ff><4><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><ff8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><ff8>
<PART_INFO_TYPE><658a><PIC16C58A><16c5x><0><4><7ff><4><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<PART_INFO_TYPE><658b><PIC16C58B><16c5x><0><4><7ff><4><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><ff8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><ff8>
<PART_INFO_TYPE><6620><PIC16C620><16xxxx><0><0><1ff><2><6f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><620a><PIC16C620A><16xxxx><0><0><1ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6621><PIC16C621><16xxxx><0><0><3ff><2><6f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><3>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><50><0200h-03FFh code protected><1510>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><621a><PIC16C621A><16xxxx><0><0><3ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><3>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><50><0200h-03FFh code protected><1510>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6622><PIC16C622><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1510>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><622a><PIC16C622A><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1510>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><662a><PIC16C62A><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1510>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><662b><PIC16C62B><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1510>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6c63><PIC16C63><16xxxx><0><2><fff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0400h-0FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><0800h-0FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><663a><PIC16C63A><16xxxx><0><2><fff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0400h-0FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><0800h-0FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6642><PIC16C642><16xxxx><0><2><fff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0400h-0FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><0800h-0FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><MPEEN><Memory Parity Error Enable><80><2>
<SETTING_VALUE_TYPE><OFF><Memory Parity Checking is disabled><0>
<SETTING_VALUE_TYPE><ON><Memory Parity Checking is enabled><80>
<PART_INFO_TYPE><664a><PIC16C64A><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1510>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><665a><PIC16C65A><16xxxx><0><2><fff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0400h-0FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><0800h-0FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><665b><PIC16C65B><16xxxx><0><2><fff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0400h-0FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><0800h-0FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6c66><PIC16C66><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0800h-1FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><1000h-1FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6662><PIC16C662><16xxxx><0><2><fff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0400h-0FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><0800h-0FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><MPEEN><Memory Parity Error Enable><80><2>
<SETTING_VALUE_TYPE><OFF><Memory Parity Checking is disabled><0>
<SETTING_VALUE_TYPE><ON><Memory Parity Checking is enabled><80>
<PART_INFO_TYPE><6c67><PIC16C67><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0800h-1FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><1000h-1FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6c71><PIC16C71><16xxxx><0><0><3ff><2><2f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><0>
<SETTING_VALUE_TYPE><ON><PWRT enabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<PART_INFO_TYPE><6710><PIC16C710><16xxxx><0><0><1ff><2><2f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bit><3fb0><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><3fb0>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6711><PIC16C711><16xxxx><0><0><3ff><2><4f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bit><3fb0><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><3fb0>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6712><PIC16C712><16xxxx><0><0><3ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-03FFh code protected><1510>
<SETTING_VALUE_TYPE><50><Code protection off><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6715><PIC16C715><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1510>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><MPEEN><Memory Parity Error Enable><80><2>
<SETTING_VALUE_TYPE><OFF><Memory Parity Checking is disabled><0>
<SETTING_VALUE_TYPE><ON><Memory Parity Checking is enabled><80>
<PART_INFO_TYPE><6716><PIC16C716><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1510>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6717><PIC16C717><16xxxx><0><1><7ff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTCLK><EC I/O><3>
<SETTING_VALUE_TYPE><INTRCIO><INTRC, OSC2 is I/O><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTRC, clockout on OSC2><5>
<SETTING_VALUE_TYPE><ER_NOCLKOUT><ER I/O><6>
<SETTING_VALUE_TYPE><ER_CLKOUT><ER CLKOUT><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><20><2>
<SETTING_VALUE_TYPE><OFF><Internal><0>
<SETTING_VALUE_TYPE><ON><External><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><CP><Code Protecton bit><3300><2>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><3300>
<SWITCH_INFO_TYPE><BODENV><Brown Out Voltage><c00><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><400>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><800>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c00>
<PART_INFO_TYPE><6c72><PIC16C72><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1510>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><672a><PIC16C72A><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1510>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><673a><PIC16C73A><16xxxx><0><2><fff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0400h-0FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><0800h-0FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><673b><PIC16C73B><16xxxx><0><2><fff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0400h-0FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><0800h-0FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6745><PIC16C745><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><EC><External clock. CLKOUT on OSC2 pin><1>
<SETTING_VALUE_TYPE><H4><HS osc with 4x PLL enabled><2>
<SETTING_VALUE_TYPE><E4><External clock with 4x PLL enabled. CLKOUT on OSC2 pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0800h-1FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><1000h-1FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<PART_INFO_TYPE><674a><PIC16C74A><16xxxx><0><2><fff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0400h-0FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><0800h-0FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><674b><PIC16C74B><16xxxx><0><2><fff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0400h-0FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><0800h-0FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6c76><PIC16C76><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0800h-1FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><1000h-1FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6765><PIC16C765><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><EC><External clock. CLKOUT on OSC2 pin><1>
<SETTING_VALUE_TYPE><H4><HS osc with 4x PLL enabled><2>
<SETTING_VALUE_TYPE><E4><External clock with 4x PLL enabled. CLKOUT on OSC2 pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0800h-1FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><1000h-1FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<PART_INFO_TYPE><6c77><PIC16C77><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0800h-1FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><1000h-1FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6770><PIC16C770><16xxxx><0><1><7ff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTCLK><EC I/O><3>
<SETTING_VALUE_TYPE><INTRCIO><INTRC, OSC2 is I/O><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTRC, clockout on OSC2><5>
<SETTING_VALUE_TYPE><ER_NOCLKOUT><ER I/O><6>
<SETTING_VALUE_TYPE><ER_CLKOUT><ER CLKOUT><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><20><2>
<SETTING_VALUE_TYPE><OFF><Internal><0>
<SETTING_VALUE_TYPE><ON><External><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><CP><Code Protecton bit><3300><2>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><3300>
<SWITCH_INFO_TYPE><BODENV><Brown Out Voltage><c00><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><400>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><800>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c00>
<PART_INFO_TYPE><6771><PIC16C771><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTCLK><EC I/O><3>
<SETTING_VALUE_TYPE><INTRCIO><INTRC, OSC2 is I/O><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTRC, clockout on OSC2><5>
<SETTING_VALUE_TYPE><ER_NOCLKOUT><ER I/O><6>
<SETTING_VALUE_TYPE><ER_CLKOUT><ER CLKOUT><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><20><2>
<SETTING_VALUE_TYPE><OFF><Internal><0>
<SETTING_VALUE_TYPE><ON><External><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><CP><Code Protecton bit><3300><2>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><3300>
<SWITCH_INFO_TYPE><BODENV><Brown Out Voltage><c00><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><400>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><800>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c00>
<PART_INFO_TYPE><6773><PIC16C773><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3330><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0400h-0FFFh code protected><1110>
<SETTING_VALUE_TYPE><50><0800h-0FFFh code protected><2220>
<SETTING_VALUE_TYPE><OFF><Code protection off><3330>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><BODENV><Brown Out Voltage><c00><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><400>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><800>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c00>
<PART_INFO_TYPE><6774><PIC16C774><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3330><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0400h-0FFFh code protected><1110>
<SETTING_VALUE_TYPE><50><0800h-0FFFh code protected><2220>
<SETTING_VALUE_TYPE><OFF><Code protection off><3330>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><BODENV><Brown Out Voltage><c00><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><400>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><800>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c00>
<PART_INFO_TYPE><6781><PIC16C781><16xxxx><0><0><3ff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTCLK><EC I/O><3>
<SETTING_VALUE_TYPE><INTRCIO><INTRC, OSC2 is I/O><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTRC, clockout on OSC2><5>
<SETTING_VALUE_TYPE><ER_NOCLKOUT><RC I/O><6>
<SETTING_VALUE_TYPE><ER_CLKOUT><RC CLKOUT><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><20><2>
<SETTING_VALUE_TYPE><OFF><Internal><0>
<SETTING_VALUE_TYPE><ON><External><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><CP><Code Protecton bit><3300><2>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><3300>
<SWITCH_INFO_TYPE><BODENV><Brown Out Voltage><c00><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><400>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><800>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c00>
<PART_INFO_TYPE><6782><PIC16C782><16xxxx><0><1><7ff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTCLK><EC I/O><3>
<SETTING_VALUE_TYPE><INTRCIO><INTRC, OSC2 is I/O><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTRC, clockout on OSC2><5>
<SETTING_VALUE_TYPE><ER_NOCLKOUT><RC I/O><6>
<SETTING_VALUE_TYPE><ER_CLKOUT><RC CLKOUT><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><20><2>
<SETTING_VALUE_TYPE><OFF><Internal><0>
<SETTING_VALUE_TYPE><ON><External><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><CP><Code Protecton bit><3300><2>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><3300>
<SWITCH_INFO_TYPE><BODENV><Brown Out Voltage><c00><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><400>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><800>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c00>
<PART_INFO_TYPE><6923><PIC16C923><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0400h-0FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><0800h-0FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<PART_INFO_TYPE><6924><PIC16C924><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0400h-0FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><0800h-0FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<PART_INFO_TYPE><6925><PIC16C925><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0000h-0EFFh code protected><10>
<SETTING_VALUE_TYPE><50><0000h-07FFh code protected><20>
<SETTING_VALUE_TYPE><OFF><Code protection off><30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6926><PIC16C926><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0000h-1EFFh code protected><10>
<SETTING_VALUE_TYPE><50><0000h-0FFFh code protected><20>
<SETTING_VALUE_TYPE><OFF><Code protection off><30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6623><PIC16CE623><16xxxx><0><0><1ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6624><PIC16CE624><16xxxx><0><0><3ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><3>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><50><0200h-03FFh code protected><1510>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6625><PIC16CE625><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1510>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><dc54><PIC16CR54><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<PART_INFO_TYPE><d54a><PIC16CR54A><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><ff8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><ff8>
<PART_INFO_TYPE><d54c><PIC16CR54C><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><ff8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><ff8>
<PART_INFO_TYPE><d56a><PIC16CR56A><16c5x><0><2><3ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><ff8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><ff8>
<PART_INFO_TYPE><d57a><PIC16CR57A><16c5x><0><4><7ff><4><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><ff8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><ff8>
<PART_INFO_TYPE><d57b><PIC16CR57B><16c5x><0><4><7ff><4><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><ff8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><ff8>
<PART_INFO_TYPE><d57c><PIC16CR57C><16c5x><0><4><7ff><4><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><ff8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><ff8>
<PART_INFO_TYPE><d58a><PIC16CR58A><16c5x><0><4><7ff><4><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><ff8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><ff8>
<PART_INFO_TYPE><d58b><PIC16CR58B><16c5x><0><4><7ff><4><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><ff8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><ff8>
<PART_INFO_TYPE><dc62><PIC16CR62><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1510>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><d20a><PIC16CR620A><16xxxx><0><0><1ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6d63><PIC16CR63><16xxxx><0><2><fff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0400h-0FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><0800h-0FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><dc64><PIC16CR64><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1510>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6d65><PIC16CR65><16xxxx><0><2><fff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0400h-0FFFh code protected><1510>
<SETTING_VALUE_TYPE><50><0800h-0FFFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6d72><PIC16CR72><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3f30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1510>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2a20>
<SETTING_VALUE_TYPE><OFF><Code protection off><3f30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6d73><PIC16CR73><16xxxx><0><2><fff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6d74><PIC16CR74><16xxxx><0><2><fff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6d76><PIC16CR76><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6d77><PIC16CR77><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><dc83><PIC16CR83><16xxxx><0><0><1ff><2><2f><3f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Program Memory Code Protection bit><3f70><2>
<SETTING_VALUE_TYPE><ON><Program memory is code protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection Off><3f70>
<SWITCH_INFO_TYPE><DP><Data Memory Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory is code protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection Off><80>
<PART_INFO_TYPE><dc84><PIC16CR84><16xxxx><0><0><3ff><2><4f><3f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Program Memory Code Protection bit><3f70><2>
<SETTING_VALUE_TYPE><ON><Program memory is code protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection Off><3f70>
<SWITCH_INFO_TYPE><DP><Data Memory Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory is code protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection Off><80>
<PART_INFO_TYPE><d926><PIC16CR926><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bits><30><4>
<SETTING_VALUE_TYPE><ALL><All memory is code protected><0>
<SETTING_VALUE_TYPE><75><0000h-1EFFh code protected><10>
<SETTING_VALUE_TYPE><50><0000h-0FFFh code protected><20>
<SETTING_VALUE_TYPE><OFF><Code protection off><30>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><1454><PIC16F1454><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 0FFFh write protected, 1000h to 1FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Selection Bit><30><4>
<SETTING_VALUE_TYPE><NOCLKDIV><NO CPU system divide><0>
<SETTING_VALUE_TYPE><CLKDIV2><CPU system clock divided by 2><10>
<SETTING_VALUE_TYPE><CLKDIV3><CPU system clock divided by 3><20>
<SETTING_VALUE_TYPE><CLKDIV6><CPU system clock divided by 6><30>
<SWITCH_INFO_TYPE><USBLSCLK><USB Low SPeed Clock Selection bit><40><2>
<SETTING_VALUE_TYPE><24MHz><System clock expects 24 MHz, FS/LS USB CLKENs divide-by is set to 4.><0>
<SETTING_VALUE_TYPE><48MHz><System clock expects 48 MHz, FS/LS USB CLKENs divide-by is set to 8.><40>
<SWITCH_INFO_TYPE><PLLMULT><PLL Multipler Selection Bit><80><2>
<SETTING_VALUE_TYPE><4x><4x Output Frequency Selected><0>
<SETTING_VALUE_TYPE><3x><3x Output Frequency Selected><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><DISABLED><3x or 4x PLL Disabled><0>
<SETTING_VALUE_TYPE><ENABLED><3x or 4x PLL Enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1455><PIC16F1455><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 0FFFh write protected, 1000h to 1FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Selection Bit><30><4>
<SETTING_VALUE_TYPE><NOCLKDIV><NO CPU system divide><0>
<SETTING_VALUE_TYPE><CLKDIV2><CPU system clock divided by 2><10>
<SETTING_VALUE_TYPE><CLKDIV3><CPU system clock divided by 3><20>
<SETTING_VALUE_TYPE><CLKDIV6><CPU system clock divided by 6><30>
<SWITCH_INFO_TYPE><USBLSCLK><USB Low SPeed Clock Selection bit><40><2>
<SETTING_VALUE_TYPE><24MHz><System clock expects 24 MHz, FS/LS USB CLKENs divide-by is set to 4.><0>
<SETTING_VALUE_TYPE><48MHz><System clock expects 48 MHz, FS/LS USB CLKENs divide-by is set to 8.><40>
<SWITCH_INFO_TYPE><PLLMULT><PLL Multipler Selection Bit><80><2>
<SETTING_VALUE_TYPE><4x><4x Output Frequency Selected><0>
<SETTING_VALUE_TYPE><3x><3x Output Frequency Selected><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><DISABLED><3x or 4x PLL Disabled><0>
<SETTING_VALUE_TYPE><ENABLED><3x or 4x PLL Enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1459><PIC16F1459><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 0FFFh write protected, 1000h to 1FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Selection Bit><30><4>
<SETTING_VALUE_TYPE><NOCLKDIV><NO CPU system divide><0>
<SETTING_VALUE_TYPE><CLKDIV2><CPU system clock divided by 2><10>
<SETTING_VALUE_TYPE><CLKDIV3><CPU system clock divided by 3><20>
<SETTING_VALUE_TYPE><CLKDIV6><CPU system clock divided by 6><30>
<SWITCH_INFO_TYPE><USBLSCLK><USB Low SPeed Clock Selection bit><40><2>
<SETTING_VALUE_TYPE><24MHz><System clock expects 24 MHz, FS/LS USB CLKENs divide-by is set to 4.><0>
<SETTING_VALUE_TYPE><48MHz><System clock expects 48 MHz, FS/LS USB CLKENs divide-by is set to 8.><40>
<SWITCH_INFO_TYPE><PLLMULT><PLL Multipler Selection Bit><80><2>
<SETTING_VALUE_TYPE><4x><4x Output Frequency Selected><0>
<SETTING_VALUE_TYPE><3x><3x Output Frequency Selected><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><DISABLED><3x or 4x PLL Disabled><0>
<SETTING_VALUE_TYPE><ENABLED><3x or 4x PLL Enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1503><PIC16F1503><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1507><PIC16F1507><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><Internal Oscillator, I/O Function on OSC1><0>
<SETTING_VALUE_TYPE><ECL><External Clock, Low Power Mode><1>
<SETTING_VALUE_TYPE><ECM><External Clock, Medium Power Mode><2>
<SETTING_VALUE_TYPE><ECH><External Clock, High Power Mode><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1508><PIC16F1508><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1509><PIC16F1509><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1512><PIC16F1512><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><VCAP pin function enabled><0>
<SETTING_VALUE_TYPE><OFF><VCAP pin function disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1513><PIC16F1513><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><VCAP pin function enabled><0>
<SETTING_VALUE_TYPE><OFF><VCAP pin function disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1516><PIC16F1516><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><VCAP pin function enabled><0>
<SETTING_VALUE_TYPE><OFF><VCAP pin function disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1517><PIC16F1517><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><VCAP pin function enabled><0>
<SETTING_VALUE_TYPE><OFF><VCAP pin function disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1518><PIC16F1518><16Exxx><2><8><3fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFFh write protected, 2000h to 3FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 3FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><VCAP pin function enabled><0>
<SETTING_VALUE_TYPE><OFF><VCAP pin function disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1519><PIC16F1519><16Exxx><2><8><3fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFFh write protected, 2000h to 3FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 3FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><VCAP pin function enabled><0>
<SETTING_VALUE_TYPE><OFF><VCAP pin function disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1526><PIC16F1526><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 2000h to 3FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 3FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><VCAP pin function enabled><0>
<SETTING_VALUE_TYPE><OFF><VCAP pin function disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1527><PIC16F1527><16Exxx><2><8><3fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 2000h to 3FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 3FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><VCAP pin function enabled><0>
<SETTING_VALUE_TYPE><OFF><VCAP pin function disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a2ae><PIC16F15313><16EXxx><2><1><7ff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><Reserved><Reserved><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><Reserved><Reserved><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><* half of user program memory><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2af><PIC16F15323><16EXxx><2><1><7ff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><Reserved><Reserved><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><Reserved><Reserved><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><* half of user program memory><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2aa><PIC16F15324><16EXxx><2><2><fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><Reserved><Reserved><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><Reserved><Reserved><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><* half of user program memory><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a29e><PIC16F15325><16EXxx><2><4><1fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><* half of user program memory><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2ab><PIC16F15344><16EXxx><2><2><fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><Reserved><Reserved><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><Reserved><Reserved><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><* half of user program memory><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a29f><PIC16F15345><16EXxx><2><4><1fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><* half of user program memory><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a280><PIC16F15354><16EXxx><2><2><fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a27f><PIC16F15355><16EXxx><2><4><1fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a290><PIC16F15356><16EXxx><2><8><3fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a292><PIC16F15375><16EXxx><2><4><1fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a294><PIC16F15376><16EXxx><2><8><3fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a296><PIC16F15385><16EXxx><2><4><1fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a298><PIC16F15386><16EXxx><2><8><3fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><1574><PIC16F1574><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator; I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCKED Bit Can Be Cleared & Set Repeatedly><0>
<SETTING_VALUE_TYPE><ON><PPSLOCKED Bit Can Be Cleared & Set Once><4>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOREN><Low Power Brown-out Reset enable bit><800><2>
<SETTING_VALUE_TYPE><ON><LPBOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><LPBOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1575><PIC16F1575><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator; I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCKED Bit Can Be Cleared & Set Repeatedly><0>
<SETTING_VALUE_TYPE><ON><PPSLOCKED Bit Can Be Cleared & Set Once><4>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOREN><Low Power Brown-out Reset enable bit><800><2>
<SETTING_VALUE_TYPE><ON><LPBOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><LPBOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1578><PIC16F1578><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator; I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCKED Bit Can Be Cleared & Set Repeatedly><0>
<SETTING_VALUE_TYPE><ON><PPSLOCKED Bit Can Be Cleared & Set Once><4>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOREN><Low Power Brown-out Reset enable bit><800><2>
<SETTING_VALUE_TYPE><ON><LPBOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><LPBOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1579><PIC16F1579><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator; I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCKED Bit Can Be Cleared & Set Repeatedly><0>
<SETTING_VALUE_TYPE><ON><PPSLOCKED Bit Can Be Cleared & Set Once><4>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOREN><Low Power Brown-out Reset enable bit><800><2>
<SETTING_VALUE_TYPE><ON><LPBOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><LPBOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1613><PIC16F1613><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><3>
<CONFIGREG_INFO_TYPE><8007><0><3fff><6>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pins><3>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><3fff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><ZCD><Zero Cross Detect Disable Bit><80><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disable.  ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select><1f><14>
<SETTING_VALUE_TYPE><WDTCPS0><1:32 (1 ms period)><0>
<SETTING_VALUE_TYPE><WDTCPS1><1:64 (2 ms period)><1>
<SETTING_VALUE_TYPE><WDTCPS2><1:128 (4 ms period)><2>
<SETTING_VALUE_TYPE><WDTCPS3><1:256 (8 ms period)><3>
<SETTING_VALUE_TYPE><WDTCPS4><1:512 (16 ms period)><4>
<SETTING_VALUE_TYPE><WDTCPS5><1:1024 (32 ms period)><5>
<SETTING_VALUE_TYPE><WDTCPS6><1:2048 (64 ms period)><6>
<SETTING_VALUE_TYPE><WDTCPS7><1:4096 (128 ms period)><7>
<SETTING_VALUE_TYPE><WDTCPS8><1:8192 (256 ms period)><8>
<SETTING_VALUE_TYPE><WDTCPS9><1:16384 (512 ms period)><9>
<SETTING_VALUE_TYPE><WDTCPSA><1:32768 (1 s period)><a>
<SETTING_VALUE_TYPE><WDTCPSB><1:65536 (2 s period)><b>
<SETTING_VALUE_TYPE><WDTCPSC><1:131072 (4 s period)><c>
<SETTING_VALUE_TYPE><WDTCPSD><1:262144 (8 s period)><d>
<SETTING_VALUE_TYPE><WDTCPSE><1:524299 (16 s period)><e>
<SETTING_VALUE_TYPE><WDTCPSF><1:1048576 (32 s period)><f>
<SETTING_VALUE_TYPE><WDTCPS10><1:2097152 (64 s period)><10>
<SETTING_VALUE_TYPE><WDTCPS11><1:4194304 (128 s period)><11>
<SETTING_VALUE_TYPE><WDTCPS12><1:8388608 (256 s period)><12>
<SETTING_VALUE_TYPE><WDTCPS1F><Software Control (WDTPS)><1f>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><60><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><40>
<SETTING_VALUE_TYPE><ON><WDT enabled><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select><700><8>
<SETTING_VALUE_TYPE><WDTCWS125><12.5 percent window open time><0>
<SETTING_VALUE_TYPE><WDTCWS25><25 percent window open time><100>
<SETTING_VALUE_TYPE><WDTCWS375><37.5 percent window open time><200>
<SETTING_VALUE_TYPE><WDTCWS50><50 percent window open time><300>
<SETTING_VALUE_TYPE><WDTCWS625><62.5 percent window open time><400>
<SETTING_VALUE_TYPE><WDTCWS75><75 percent window open time><500>
<SETTING_VALUE_TYPE><WDTCWS100><100 percent window open time (Legacy WDT) ><600>
<SETTING_VALUE_TYPE><WDTCWSSW><Software WDT window size control (WDTWS bits)><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT Input Clock Selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><31.0kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><31.25 kHz HFINTOSC (MFINTOSC)><800>
<SETTING_VALUE_TYPE><SWC><Software control, controlled by WDTCS bits><3800>
<PART_INFO_TYPE><1614><PIC16F1614><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><3>
<CONFIGREG_INFO_TYPE><8007><0><3fff><6>
<SWITCH_INFO_TYPE><FOSC><><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><3>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero Cross Detect Disable Bit><80><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disable.  ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select><1f><14>
<SETTING_VALUE_TYPE><WDTCPS0><1:32 (1 ms period)><0>
<SETTING_VALUE_TYPE><WDTCPS1><1:64 (2 ms period)><1>
<SETTING_VALUE_TYPE><WDTCPS2><1:128 (4 ms period)><2>
<SETTING_VALUE_TYPE><WDTCPS3><1:256 (8 ms period)><3>
<SETTING_VALUE_TYPE><WDTCPS4><1:512 (16 ms period)><4>
<SETTING_VALUE_TYPE><WDTCPS5><1:1024 (32 ms period)><5>
<SETTING_VALUE_TYPE><WDTCPS6><1:2048 (64 ms period)><6>
<SETTING_VALUE_TYPE><WDTCPS7><1:4096 (128 ms period)><7>
<SETTING_VALUE_TYPE><WDTCPS8><1:8192 (256 ms period)><8>
<SETTING_VALUE_TYPE><WDTCPS9><1:16384 (512 ms period)><9>
<SETTING_VALUE_TYPE><WDTCPSA><1:32768 (1 s period)><a>
<SETTING_VALUE_TYPE><WDTCPSB><1:65536 (2 s period)><b>
<SETTING_VALUE_TYPE><WDTCPSC><1:131072 (4 s period)><c>
<SETTING_VALUE_TYPE><WDTCPSD><1:262144 (8 s period)><d>
<SETTING_VALUE_TYPE><WDTCPSE><1:524299 (16 s period)><e>
<SETTING_VALUE_TYPE><WDTCPSF><1:1048576 (32 s period)><f>
<SETTING_VALUE_TYPE><WDTCPS10><1:2097152 (64 s period)><10>
<SETTING_VALUE_TYPE><WDTCPS11><1:4194304 (128 s period)><11>
<SETTING_VALUE_TYPE><WDTCPS12><1:8388608 (256 s period)><12>
<SETTING_VALUE_TYPE><WDTCPS1F><Software Control (WDTPS)><1f>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><60><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><40>
<SETTING_VALUE_TYPE><ON><WDT enabled><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select><700><8>
<SETTING_VALUE_TYPE><WDTCWS125><12.5 percent window open time><0>
<SETTING_VALUE_TYPE><WDTCWS25><25 percent window open time><100>
<SETTING_VALUE_TYPE><WDTCWS375><37.5 percent window open time><200>
<SETTING_VALUE_TYPE><WDTCWS50><50 percent window open time><300>
<SETTING_VALUE_TYPE><WDTCWS625><62.5 percent window open time><400>
<SETTING_VALUE_TYPE><WDTCWS75><75 percent window open time><500>
<SETTING_VALUE_TYPE><WDTCWS100><100 percent window open time (Legacy WDT) ><600>
<SETTING_VALUE_TYPE><WDTCWSSW><Software WDT window size control (WDTWS bits)><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT Input Clock Selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><31.0kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><31.25 kHz HFINTOSC (MFINTOSC)><800>
<SETTING_VALUE_TYPE><SWC><Software control, controlled by WDTCS bits><3800>
<PART_INFO_TYPE><1615><PIC16F1615><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><3>
<CONFIGREG_INFO_TYPE><8007><0><3fff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><5>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switch Over><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switch Over mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switch Over mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero Cross Detect Disable Bit><80><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disable.  ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select><1f><14>
<SETTING_VALUE_TYPE><WDTCPS0><1:32 (1 ms period)><0>
<SETTING_VALUE_TYPE><WDTCPS1><1:64 (2 ms period)><1>
<SETTING_VALUE_TYPE><WDTCPS2><1:128 (4 ms period)><2>
<SETTING_VALUE_TYPE><WDTCPS3><1:256 (8 ms period)><3>
<SETTING_VALUE_TYPE><WDTCPS4><1:512 (16 ms period)><4>
<SETTING_VALUE_TYPE><WDTCPS5><1:1024 (32 ms period)><5>
<SETTING_VALUE_TYPE><WDTCPS6><1:2048 (64 ms period)><6>
<SETTING_VALUE_TYPE><WDTCPS7><1:4096 (128 ms period)><7>
<SETTING_VALUE_TYPE><WDTCPS8><1:8192 (256 ms period)><8>
<SETTING_VALUE_TYPE><WDTCPS9><1:16384 (512 ms period)><9>
<SETTING_VALUE_TYPE><WDTCPSA><1:32768 (1 s period)><a>
<SETTING_VALUE_TYPE><WDTCPSB><1:65536 (2 s period)><b>
<SETTING_VALUE_TYPE><WDTCPSC><1:131072 (4 s period)><c>
<SETTING_VALUE_TYPE><WDTCPSD><1:262144 (8 s period)><d>
<SETTING_VALUE_TYPE><WDTCPSE><1:524299 (16 s period)><e>
<SETTING_VALUE_TYPE><WDTCPSF><1:1048576 (32 s period)><f>
<SETTING_VALUE_TYPE><WDTCPS10><1:2097152 (64 s period)><10>
<SETTING_VALUE_TYPE><WDTCPS11><1:4194304 (128 s period)><11>
<SETTING_VALUE_TYPE><WDTCPS12><1:8388608 (256 s period)><12>
<SETTING_VALUE_TYPE><WDTCPS1F><Software Control (WDTPS)><1f>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><60><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><40>
<SETTING_VALUE_TYPE><ON><WDT enabled><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select><700><8>
<SETTING_VALUE_TYPE><WDTCWS125><12.5 percent window open time><0>
<SETTING_VALUE_TYPE><WDTCWS25><25 percent window open time><100>
<SETTING_VALUE_TYPE><WDTCWS375><37.5 percent window open time><200>
<SETTING_VALUE_TYPE><WDTCWS50><50 percent window open time><300>
<SETTING_VALUE_TYPE><WDTCWS625><62.5 percent window open time><400>
<SETTING_VALUE_TYPE><WDTCWS75><75 percent window open time><500>
<SETTING_VALUE_TYPE><WDTCWS100><100 percent window open time (Legacy WDT) ><600>
<SETTING_VALUE_TYPE><WDTCWSSW><Software WDT window size control (WDTWS bits)><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT Input Clock Selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><31.0kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><31.25 kHz HFINTOSC (MFINTOSC)><800>
<SETTING_VALUE_TYPE><SWC><Software control, controlled by WDTCS bits><3800>
<PART_INFO_TYPE><1618><PIC16F1618><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><3>
<CONFIGREG_INFO_TYPE><8007><0><3fff><6>
<SWITCH_INFO_TYPE><FOSC><><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><3>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero Cross Detect Disable Bit><80><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disable.  ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select><1f><14>
<SETTING_VALUE_TYPE><WDTCPS0><1:32 (1 ms period)><0>
<SETTING_VALUE_TYPE><WDTCPS1><1:64 (2 ms period)><1>
<SETTING_VALUE_TYPE><WDTCPS2><1:128 (4 ms period)><2>
<SETTING_VALUE_TYPE><WDTCPS3><1:256 (8 ms period)><3>
<SETTING_VALUE_TYPE><WDTCPS4><1:512 (16 ms period)><4>
<SETTING_VALUE_TYPE><WDTCPS5><1:1024 (32 ms period)><5>
<SETTING_VALUE_TYPE><WDTCPS6><1:2048 (64 ms period)><6>
<SETTING_VALUE_TYPE><WDTCPS7><1:4096 (128 ms period)><7>
<SETTING_VALUE_TYPE><WDTCPS8><1:8192 (256 ms period)><8>
<SETTING_VALUE_TYPE><WDTCPS9><1:16384 (512 ms period)><9>
<SETTING_VALUE_TYPE><WDTCPSA><1:32768 (1 s period)><a>
<SETTING_VALUE_TYPE><WDTCPSB><1:65536 (2 s period)><b>
<SETTING_VALUE_TYPE><WDTCPSC><1:131072 (4 s period)><c>
<SETTING_VALUE_TYPE><WDTCPSD><1:262144 (8 s period)><d>
<SETTING_VALUE_TYPE><WDTCPSE><1:524299 (16 s period)><e>
<SETTING_VALUE_TYPE><WDTCPSF><1:1048576 (32 s period)><f>
<SETTING_VALUE_TYPE><WDTCPS10><1:2097152 (64 s period)><10>
<SETTING_VALUE_TYPE><WDTCPS11><1:4194304 (128 s period)><11>
<SETTING_VALUE_TYPE><WDTCPS12><1:8388608 (256 s period)><12>
<SETTING_VALUE_TYPE><WDTCPS1F><Software Control (WDTPS)><1f>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><60><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><40>
<SETTING_VALUE_TYPE><ON><WDT enabled><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select><700><8>
<SETTING_VALUE_TYPE><WDTCWS125><12.5 percent window open time><0>
<SETTING_VALUE_TYPE><WDTCWS25><25 percent window open time><100>
<SETTING_VALUE_TYPE><WDTCWS375><37.5 percent window open time><200>
<SETTING_VALUE_TYPE><WDTCWS50><50 percent window open time><300>
<SETTING_VALUE_TYPE><WDTCWS625><62.5 percent window open time><400>
<SETTING_VALUE_TYPE><WDTCWS75><75 percent window open time><500>
<SETTING_VALUE_TYPE><WDTCWS100><100 percent window open time (Legacy WDT) ><600>
<SETTING_VALUE_TYPE><WDTCWSSW><Software WDT window size control (WDTWS bits)><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT Input Clock Selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><31.0kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><31.25 kHz HFINTOSC (MFINTOSC)><800>
<SETTING_VALUE_TYPE><SWC><Software control, controlled by WDTCS bits><3800>
<PART_INFO_TYPE><1619><PIC16F1619><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><3>
<CONFIGREG_INFO_TYPE><8007><0><3fff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><5>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switch Over><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switch Over mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switch Over mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero Cross Detect Disable Bit><80><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disable.  ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select><1f><14>
<SETTING_VALUE_TYPE><WDTCPS0><1:32 (1 ms period)><0>
<SETTING_VALUE_TYPE><WDTCPS1><1:64 (2 ms period)><1>
<SETTING_VALUE_TYPE><WDTCPS2><1:128 (4 ms period)><2>
<SETTING_VALUE_TYPE><WDTCPS3><1:256 (8 ms period)><3>
<SETTING_VALUE_TYPE><WDTCPS4><1:512 (16 ms period)><4>
<SETTING_VALUE_TYPE><WDTCPS5><1:1024 (32 ms period)><5>
<SETTING_VALUE_TYPE><WDTCPS6><1:2048 (64 ms period)><6>
<SETTING_VALUE_TYPE><WDTCPS7><1:4096 (128 ms period)><7>
<SETTING_VALUE_TYPE><WDTCPS8><1:8192 (256 ms period)><8>
<SETTING_VALUE_TYPE><WDTCPS9><1:16384 (512 ms period)><9>
<SETTING_VALUE_TYPE><WDTCPSA><1:32768 (1 s period)><a>
<SETTING_VALUE_TYPE><WDTCPSB><1:65536 (2 s period)><b>
<SETTING_VALUE_TYPE><WDTCPSC><1:131072 (4 s period)><c>
<SETTING_VALUE_TYPE><WDTCPSD><1:262144 (8 s period)><d>
<SETTING_VALUE_TYPE><WDTCPSE><1:524299 (16 s period)><e>
<SETTING_VALUE_TYPE><WDTCPSF><1:1048576 (32 s period)><f>
<SETTING_VALUE_TYPE><WDTCPS10><1:2097152 (64 s period)><10>
<SETTING_VALUE_TYPE><WDTCPS11><1:4194304 (128 s period)><11>
<SETTING_VALUE_TYPE><WDTCPS12><1:8388608 (256 s period)><12>
<SETTING_VALUE_TYPE><WDTCPS1F><Software Control (WDTPS)><1f>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><60><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><40>
<SETTING_VALUE_TYPE><ON><WDT enabled><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select><700><8>
<SETTING_VALUE_TYPE><WDTCWS125><12.5 percent window open time><0>
<SETTING_VALUE_TYPE><WDTCWS25><25 percent window open time><100>
<SETTING_VALUE_TYPE><WDTCWS375><37.5 percent window open time><200>
<SETTING_VALUE_TYPE><WDTCWS50><50 percent window open time><300>
<SETTING_VALUE_TYPE><WDTCWS625><62.5 percent window open time><400>
<SETTING_VALUE_TYPE><WDTCWS75><75 percent window open time><500>
<SETTING_VALUE_TYPE><WDTCWS100><100 percent window open time (Legacy WDT) ><600>
<SETTING_VALUE_TYPE><WDTCWSSW><Software WDT window size control (WDTWS bits)><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT Input Clock Selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><31.0kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><31.25 kHz HFINTOSC (MFINTOSC)><800>
<SETTING_VALUE_TYPE><SWC><Software control, controlled by WDTCS bits><3800>
<PART_INFO_TYPE><1703><PIC16F1703><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><Internal HFINTOSC. I/O function on RA4 and RA5.><0>
<SETTING_VALUE_TYPE><ECL><External oscillator, low power. I/O function on RA4><1>
<SETTING_VALUE_TYPE><ECM><External oscillator, medium power. I/O function on RA4><2>
<SETTING_VALUE_TYPE><ECH><External oscillator, high power. I/O function on RA4><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1704><PIC16F1704><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><3fff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1705><PIC16F1705><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1707><PIC16F1707><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><Internal HFINTOSC. I/O function on RA4 and RA5.><0>
<SETTING_VALUE_TYPE><ECL><External oscillator, low power. I/O function on RA4><1>
<SETTING_VALUE_TYPE><ECM><External oscillator, medium power. I/O function on RA4><2>
<SETTING_VALUE_TYPE><ECH><External oscillator, high power. I/O function on RA4><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1708><PIC16F1708><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><3fff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1709><PIC16F1709><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1713><PIC16F1713><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input if LVP bit is also 0.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is always enabled.><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR and can be enabled with ZCDSEN bit.><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1716><PIC16F1716><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input if LVP bit is also 0.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 03FFh write protected, 0400h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is always enabled.><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR and can be enabled with ZCDSEN bit.><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1717><PIC16F1717><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input if LVP bit is also 0.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 03FFh write protected, 0400h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is always enabled.><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR and can be enabled with ZCDSEN bit.><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1718><PIC16F1718><16Exxx><2><8><3fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input if LVP bit is also 0.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 03FFh write protected, 0400h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is always enabled.><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR and can be enabled with ZCDSEN bit.><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1719><PIC16F1719><16Exxx><2><8><3fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input if LVP bit is also 0.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 03FFh write protected, 0400h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is always enabled.><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR and can be enabled with ZCDSEN bit.><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1764><PIC16F1764><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1765><PIC16F1765><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1768><PIC16F1768><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1769><PIC16F1769><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1773><PIC16F1773><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1776><PIC16F1776><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1777><PIC16F1777><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1778><PIC16F1778><16Exxx><2><8><3fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1779><PIC16F1779><16Exxx><2><8><3fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1782><PIC16F1782><16Exxx><2><1><7ff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 3FFh write protected, 400h to 7FFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 7FFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Vcap functionality is enabled on RA6 (Vddcore is connected to the pad)><0>
<SETTING_VALUE_TYPE><OFF><Vcap functionality is disabled on RA6.><20>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low Power Brown-Out Reset Enable Bit><800><2>
<SETTING_VALUE_TYPE><ON><Low power brown-out is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power brown-out is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1783><PIC16F1783><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Vcap functionality is enabled on RA6 (Vddcore is connected to the pad)><0>
<SETTING_VALUE_TYPE><OFF><Vcap functionality is disabled on RA6.><20>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low Power Brown-Out Reset Enable Bit><800><2>
<SETTING_VALUE_TYPE><ON><Low power brown-out is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power brown-out is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1784><PIC16F1784><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Vcap functionality is enabled on RA6 (Vddcore is connected to the pad)><0>
<SETTING_VALUE_TYPE><OFF><Vcap functionality is disabled on RA6.><20>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low Power Brown-Out Reset Enable Bit><800><2>
<SETTING_VALUE_TYPE><ON><Low power brown-out is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power brown-out is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1786><PIC16F1786><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Vcap functionality is enabled on RA6 (Vddcore is connected to the pad)><0>
<SETTING_VALUE_TYPE><OFF><Vcap functionality is disabled on RA6.><20>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low Power Brown-Out Reset Enable Bit><800><2>
<SETTING_VALUE_TYPE><ON><Low power brown-out is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power brown-out is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1787><PIC16F1787><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Vcap functionality is enabled on RA6 (Vddcore is connected to the pad)><0>
<SETTING_VALUE_TYPE><OFF><Vcap functionality is disabled on RA6.><20>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low Power Brown-Out Reset Enable Bit><800><2>
<SETTING_VALUE_TYPE><ON><Low power brown-out is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power brown-out is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1788><PIC16F1788><16Exxx><2><8><3fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Vcap functionality is enabled on RA6 (Vddcore is connected to the pad)><0>
<SETTING_VALUE_TYPE><OFF><Vcap functionality is disabled on RA6.><20>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low Power Brown-Out Reset Enable Bit><800><2>
<SETTING_VALUE_TYPE><ON><Low power brown-out is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power brown-out is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1789><PIC16F1789><16Exxx><2><8><3fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Vcap functionality is enabled on RA6 (Vddcore is connected to the pad)><0>
<SETTING_VALUE_TYPE><OFF><Vcap functionality is disabled on RA6.><20>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low Power Brown-Out Reset Enable Bit><800><2>
<SETTING_VALUE_TYPE><ON><Low power brown-out is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power brown-out is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1823><PIC16F1823><16Exxx><2><1><7ff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 3FFh write protected, 400h to 7FFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 7FFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1824><PIC16F1824><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1825><PIC16F1825><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1826><PIC16F1826><16Exxx><2><1><7ff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 3FFh write protected, 400h to 7FFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 7FFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1827><PIC16F1827><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1828><PIC16F1828><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1829><PIC16F1829><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><b829><PIC16F1829LIN><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1832><PIC16F18313><16Exxx><a><1><7ff><20><7f><ff><0-0><0-0><0><4>
<CONFIGREG_INFO_TYPE><8007><0><ffff><5>
<SWITCH_INFO_TYPE><FEXTOSC><FEXTOSC External Oscillator mode Selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) from 100 kHz to 4 MHz><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4 MHz><2>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 100 kHz to 8 MHz><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><6>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with 2x PLL (32MHz)><0>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><10>
<SETTING_VALUE_TYPE><SOSC><SOSC (31kHz)><30>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC (31kHz)><40>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; I/O or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of port pin's WPU control bit.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR; Weak pull-up enabled ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bits><c><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><4>
<SETTING_VALUE_TYPE><SLEEP><WDT enabled while running and disabled while in SLEEP/IDLE; SWDTEN is ignored><8>
<SETTING_VALUE_TYPE><ON><WDT enabled, SWDTEN is ignored><c>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><SLEEP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled, SBOREN bit ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><200><2>
<SETTING_VALUE_TYPE><HIGH><Brown-out voltage (Vbor) set to 2.7V><0>
<SETTING_VALUE_TYPE><LOW><Brown-out voltage (Vbor) set to 2.45V><200>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Debugger enable bit><2000><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><ffff><2>
<SWITCH_INFO_TYPE><WRT><User NVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 07FFh write protected, no addresses may be modified><0>
<SETTING_VALUE_TYPE><HALF><0000h to 03FFh write-protected, 0400h to 07FFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 01FFh write-protected, 0200h to 07FFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming.><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored.><2000>
<CONFIGREG_INFO_TYPE><800a><0><ffff><2>
<SWITCH_INFO_TYPE><CP><User NVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><User NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><User NVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><Data NVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data NVM code protection disabled><2>
<PART_INFO_TYPE><1833><PIC16F18323><16Exxx><a><1><7ff><20><7f><ff><0-0><0-0><0><4>
<CONFIGREG_INFO_TYPE><8007><0><ffff><5>
<SWITCH_INFO_TYPE><FEXTOSC><FEXTOSC External Oscillator mode Selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) from 100 kHz to 4 MHz><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4 MHz><2>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 100 kHz to 8 MHz><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><6>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with 2x PLL (32MHz)><0>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><10>
<SETTING_VALUE_TYPE><SOSC><SOSC (31kHz)><30>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC (31kHz)><40>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; I/O or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of port pin's WPU control bit.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR; Weak pull-up enabled><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bits><c><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><4>
<SETTING_VALUE_TYPE><SLEEP><WDT enabled while running and disabled in SLEEP/IDLE; SWDTEN is ignored><8>
<SETTING_VALUE_TYPE><ON><WDT enabled, SWDTEN is ignored><c>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><SLEEP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled, SBOREN bit ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><200><2>
<SETTING_VALUE_TYPE><HIGH><Brown-out voltage (Vbor) set to 2.7V><0>
<SETTING_VALUE_TYPE><LOW><Brown-out voltage (Vbor) set to 2.45V><200>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Debugger enable bit><2000><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><ffff><2>
<SWITCH_INFO_TYPE><WRT><User NVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 07FFh write protected, no addresses may be modified><0>
<SETTING_VALUE_TYPE><HALF><0000h to 03FFh write-protected, 0400h to 07FFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 01FFh write-protected, 0200h to 07FFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/VPP must be used for programming.><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored.><2000>
<CONFIGREG_INFO_TYPE><800a><0><ffff><2>
<SWITCH_INFO_TYPE><CP><User NVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><User NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><User NVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><Data NVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data NVM code protection disabled><2>
<PART_INFO_TYPE><8324><PIC16F18324><16Exxx><a><2><fff><20><7f><ff><0-0><0-0><0><4>
<CONFIGREG_INFO_TYPE><8007><0><ffff><5>
<SWITCH_INFO_TYPE><FEXTOSC><FEXTOSC External Oscillator mode Selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) from 100 kHz to 4 MHz><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4 MHz><2>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 100 kHz to 8 MHz><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz;><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><6>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with 2x PLL (32MHz)><0>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><10>
<SETTING_VALUE_TYPE><SOSC><SOSC (31kHz)><30>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC (31kHz)><40>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits ><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; I/O or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of port pin's WPU control bit.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR; Weak pull-up enabled><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bits><c><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><4>
<SETTING_VALUE_TYPE><SLEEP><WDT enabled while running and disabled in SLEEP/IDLE; SWDTEN is ignored><8>
<SETTING_VALUE_TYPE><ON><WDT enabled, SWDTEN is ignored><c>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><SLEEP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled, SBOREN bit ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><200><2>
<SETTING_VALUE_TYPE><HIGH><Brown-out voltage (Vbor) set to 2.7V><0>
<SETTING_VALUE_TYPE><LOW><Brown-out voltage (Vbor) set to 2.45V><200>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Debugger enable bit><2000><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><ffff><2>
<SWITCH_INFO_TYPE><WRT><User NVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 0FFFh write protected, no addresses may be modified><0>
<SETTING_VALUE_TYPE><HALF><0000h to 07FFh write-protected, 0800h to 0FFFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 01FFh write-protected, 0200h to 0FFFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/VPP must be used for programming.><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored.><2000>
<CONFIGREG_INFO_TYPE><800a><0><ffff><2>
<SWITCH_INFO_TYPE><CP><User NVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><User NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><User NVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><Data NVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data NVM code protection disabled><2>
<PART_INFO_TYPE><1835><PIC16F18325><16Exxx><a><4><1fff><20><7f><ff><0-0><0-0><0><4>
<CONFIGREG_INFO_TYPE><8007><0><ffff><5>
<SWITCH_INFO_TYPE><FEXTOSC><FEXTOSC External Oscillator mode Selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) from 100 kHz to 4 MHz><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4 MHz><2>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 100 kHz to 8 MHz><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><6>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with 2x PLL (32MHz)><0>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><10>
<SETTING_VALUE_TYPE><SOSC><SOSC (31kHz)><30>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC (31kHz)><40>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; I/O or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of port pin's WPU control bit.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR; Weak pull-up enabled><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bits><c><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><4>
<SETTING_VALUE_TYPE><SLEEP><WDT enabled while running and disabled in SLEEP/IDLE; SWDTEN is ignored><8>
<SETTING_VALUE_TYPE><ON><WDT enabled, SWDTEN is ignored><c>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><SLEEP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled, SBOREN bit ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><200><2>
<SETTING_VALUE_TYPE><HIGH><Brown-out voltage (Vbor) set to 2.7V><0>
<SETTING_VALUE_TYPE><LOW><Brown-out voltage (Vbor) set to 2.45V><200>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Debugger enable bit><2000><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><ffff><2>
<SWITCH_INFO_TYPE><WRT><User NVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh write protected, no addresses may be modified><0>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write-protected, 1000h to 1FFFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 01FFh write-protected, 0200h to 1FFFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/VPP must be used for programming.><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored.><2000>
<CONFIGREG_INFO_TYPE><800a><0><ffff><2>
<SWITCH_INFO_TYPE><CP><User NVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><User NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><User NVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><Data NVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data NVM code protection disabled><2>
<PART_INFO_TYPE><8326><PIC16F18326><16Exxx><a><8><3fff><20><7f><ff><0-0><0-0><0><4>
<CONFIGREG_INFO_TYPE><8007><0><ffff><5>
<SWITCH_INFO_TYPE><FEXTOSC><FEXTOSC External Oscillator mode Selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) from 100 kHz to 4 MHz><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4 MHz><2>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 100 kHz to 8 MHz><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><6>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with 2x PLL (32MHz)><0>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><10>
<SETTING_VALUE_TYPE><SOSC><SOSC (31kHz)><30>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC (31kHz)><40>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; I/O or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of port pin's WPU control bit.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR; Weak pull-up enabled><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bits><c><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><4>
<SETTING_VALUE_TYPE><SLEEP><WDT enabled while running and disabled in SLEEP/IDLE; SWDTEN is ignored><8>
<SETTING_VALUE_TYPE><ON><WDT enabled, SWDTEN is ignored><c>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><SLEEP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled, SBOREN bit ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><200><2>
<SETTING_VALUE_TYPE><HIGH><Brown-out voltage (Vbor) set to 2.7V><0>
<SETTING_VALUE_TYPE><LOW><Brown-out voltage (Vbor) set to 2.45V><200>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Debugger enable bit><2000><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><ffff><2>
<SWITCH_INFO_TYPE><WRT><User NVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 3FFFh write protected, no addresses may be modified><0>
<SETTING_VALUE_TYPE><HALF><0000h to 1FFFh write-protected, 2000h to 3FFFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 01FFh write-protected, 0200h to 3FFFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/VPP must be used for programming.><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored.><2000>
<CONFIGREG_INFO_TYPE><800a><0><ffff><2>
<SWITCH_INFO_TYPE><CP><User NVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><User NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><User NVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><Data NVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data NVM code protection disabled><2>
<PART_INFO_TYPE><8344><PIC16F18344><16Exxx><a><2><fff><20><7f><ff><0-0><0-0><0><4>
<CONFIGREG_INFO_TYPE><8007><0><ffff><5>
<SWITCH_INFO_TYPE><FEXTOSC><FEXTOSC External Oscillator mode Selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) from 100 kHz to 4 MHz><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4 MHz><2>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 100 kHz to 8 MHz><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><6>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with 2x PLL (32MHz)><0>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><10>
<SETTING_VALUE_TYPE><SOSC><SOSC (31kHz)><30>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC (31kHz)><40>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; I/O or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of port pin's WPU control bit.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR; Weak pull-up enabled><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bits><c><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><4>
<SETTING_VALUE_TYPE><SLEEP><WDT enabled while running and disabled in SLEEP/IDLE; SWDTEN is ignored><8>
<SETTING_VALUE_TYPE><ON><WDT enabled, SWDTEN is ignored><c>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><SLEEP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled, SBOREN bit ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><200><2>
<SETTING_VALUE_TYPE><HIGH><Brown-out voltage (Vbor) set to 2.7V><0>
<SETTING_VALUE_TYPE><LOW><Brown-out voltage (Vbor) set to 2.45V><200>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Debugger enable bit><2000><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><ffff><2>
<SWITCH_INFO_TYPE><WRT><User NVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 0FFFh write protected, no addresses may be modified><0>
<SETTING_VALUE_TYPE><HALF><0000h to 07FFh write-protected, 0800h to 0FFFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 01FFh write-protected, 0200h to 0FFFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/VPP must be used for programming.><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored.><2000>
<CONFIGREG_INFO_TYPE><800a><0><ffff><2>
<SWITCH_INFO_TYPE><CP><User NVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><User NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><User NVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><Data NVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data NVM code protection disabled><2>
<PART_INFO_TYPE><1834><PIC16F18345><16Exxx><a><4><1fff><20><7f><ff><0-0><0-0><0><4>
<CONFIGREG_INFO_TYPE><8007><0><ffff><5>
<SWITCH_INFO_TYPE><FEXTOSC><FEXTOSC External Oscillator mode Selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) from 100 kHz to 4 MHz><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4 MHz><2>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 100 kHz to 8 MHz><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><6>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with 2x PLL (32MHz)><0>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><10>
<SETTING_VALUE_TYPE><SOSC><SOSC (31kHz)><30>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC (31kHz)><40>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits ><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; I/O or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of port pin's WPU control bit.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR; Weak pull-up enabled><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bits><c><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><4>
<SETTING_VALUE_TYPE><SLEEP><WDT enabled while running and disabled in SLEEP/IDLE; SWDTEN is ignored><8>
<SETTING_VALUE_TYPE><ON><WDT enabled, SWDTEN is ignored><c>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><SLEEP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled, SBOREN bit ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><200><2>
<SETTING_VALUE_TYPE><HIGH><Brown-out voltage (Vbor) set to 2.7V><0>
<SETTING_VALUE_TYPE><LOW><Brown-out voltage (Vbor) set to 2.45V><200>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Debugger enable bit><2000><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><ffff><2>
<SWITCH_INFO_TYPE><WRT><User NVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh write protected, no addresses may be modified><0>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write-protected, 1000h to 1FFFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 01FFh write-protected, 0200h to 1FFFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/VPP must be used for programming.><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored.><2000>
<CONFIGREG_INFO_TYPE><800a><0><ffff><2>
<SWITCH_INFO_TYPE><CP><User NVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><User NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><User NVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><Data NVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data NVM code protection disabled><2>
<PART_INFO_TYPE><8346><PIC16F18346><16Exxx><a><8><3fff><20><7f><ff><0-0><0-0><0><4>
<CONFIGREG_INFO_TYPE><8007><0><ffff><5>
<SWITCH_INFO_TYPE><FEXTOSC><FEXTOSC External Oscillator mode Selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) from 100 kHz to 4 MHz><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4 MHz><2>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 100 kHz to 8 MHz><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><6>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with 2x PLL (32MHz)><0>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><10>
<SETTING_VALUE_TYPE><SOSC><SOSC (31kHz)><30>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC (31kHz)><40>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits ><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; I/O or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of port pin's WPU control bit.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR; Weak pull-up enabled><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bits><c><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><4>
<SETTING_VALUE_TYPE><SLEEP><WDT enabled while running and disabled in SLEEP/IDLE; SWDTEN is ignored><8>
<SETTING_VALUE_TYPE><ON><WDT enabled, SWDTEN is ignored><c>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><SLEEP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled, SBOREN bit ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><200><2>
<SETTING_VALUE_TYPE><HIGH><Brown-out voltage (Vbor) set to 2.7V><0>
<SETTING_VALUE_TYPE><LOW><Brown-out voltage (Vbor) set to 2.45V><200>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Debugger enable bit><2000><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><ffff><2>
<SWITCH_INFO_TYPE><WRT><User NVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 3FFFh write protected, no addresses may be modified><0>
<SETTING_VALUE_TYPE><HALF><0000h to 1FFFh write-protected, 2000h to 3FFFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 01FFh write-protected, 0200h to 3FFFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/VPP must be used for programming.><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored.><2000>
<CONFIGREG_INFO_TYPE><800a><0><ffff><2>
<SWITCH_INFO_TYPE><CP><User NVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><User NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><User NVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><Data NVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data NVM code protection disabled><2>
<PART_INFO_TYPE><a2db><PIC16F18424><16EXxx><a><2><fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up Timer Enable bit><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 2.45V><200>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM write protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2dd><PIC16F18425><16EXxx><a><4><1fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up Timer Enable bit><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 2.45V><200>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM write protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2d6><PIC16F18426><16EXxx><a><8><3fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up Timer Enable bit><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 2.45V><200>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM write protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2df><PIC16F18444><16EXxx><a><2><fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up Timer Enable bit><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 2.45V><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM write protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2e1><PIC16F18445><16EXxx><a><4><1fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up Timer Enable bit><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 2.45V><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM write protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2d8><PIC16F18446><16EXxx><a><8><3fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up Timer Enable bit><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 2.45V><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM write protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2e3><PIC16F18455><16EXxx><a><4><1fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up Timer Enable bit><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 2.45V><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM write protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2e4><PIC16F18456><16EXxx><a><8><3fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up Timer Enable bit><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 2.45V><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM write protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><1847><PIC16F1847><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><8854><PIC16F18854><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger><2000><2>
<SETTING_VALUE_TYPE><ON><background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><3>
<SWITCH_INFO_TYPE><WRT><UserNVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ON><0x0000 to 0x0FFF write protected><0>
<SETTING_VALUE_TYPE><WRT_lower><0x0000 to x07FF write protected><1>
<SETTING_VALUE_TYPE><WRT_upper><0x0000 to 0x01FF write protected><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><1000><2>
<SETTING_VALUE_TYPE><not_available><Scanner module is not available for use><0>
<SETTING_VALUE_TYPE><available><Scanner module is available for use><1000>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM code protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection disabled><2>
<PART_INFO_TYPE><8855><PIC16F18855><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger><2000><2>
<SETTING_VALUE_TYPE><ON><background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><3>
<SWITCH_INFO_TYPE><WRT><UserNVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ON><0x0000 to 0x1FFF write protected><0>
<SETTING_VALUE_TYPE><WRT_lower><0x0000 to x0FFF write protected><1>
<SETTING_VALUE_TYPE><WRT_upper><0x0000 to 0x01FF write protected><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><1000><2>
<SETTING_VALUE_TYPE><not_available><Scanner module is not available for use><0>
<SETTING_VALUE_TYPE><available><Scanner module is available for use><1000>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM code protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection disabled><2>
<PART_INFO_TYPE><8856><PIC16F18856><16Exxx><2><8><3fff><20><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:! (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger><2000><2>
<SETTING_VALUE_TYPE><ON><background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><3>
<SWITCH_INFO_TYPE><WRT><UserNVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ON><0x0000 to 0x3FFF write protected><0>
<SETTING_VALUE_TYPE><WRT_lower><0x0000 to x1FFF write protected><1>
<SETTING_VALUE_TYPE><WRT_upper><0x0000 to 0x01FF write protected><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><1000><2>
<SETTING_VALUE_TYPE><not_available><Scanner module is not available for use><0>
<SETTING_VALUE_TYPE><available><Scanner module is available for use><1000>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM code protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection disabled><2>
<PART_INFO_TYPE><8857><PIC16F18857><16EXxx><2><10><7fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><a>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger><2000><2>
<SETTING_VALUE_TYPE><ON><background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><3>
<SWITCH_INFO_TYPE><WRT><UserNVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ON><0x0000 to 0x7FFF write protected><0>
<SETTING_VALUE_TYPE><WRT_lower><0x0000 to x3FFF write protected><1>
<SETTING_VALUE_TYPE><WRT_upper><0x0000 to 0x01FF write protected><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><1000><2>
<SETTING_VALUE_TYPE><not_available><Scanner module is not available for use><0>
<SETTING_VALUE_TYPE><available><Scanner module is available for use><1000>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM code protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection disabled><2>
<PART_INFO_TYPE><8875><PIC16F18875><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><a>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger><2000><2>
<SETTING_VALUE_TYPE><ON><background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><3>
<SWITCH_INFO_TYPE><WRT><UserNVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ON><0x0000 to 0x1FFF write protected><0>
<SETTING_VALUE_TYPE><WRT_lower><0x0000 to x0FFF write protected><1>
<SETTING_VALUE_TYPE><WRT_upper><0x0000 to 0x01FF write protected><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><1000><2>
<SETTING_VALUE_TYPE><not_available><Scanner module is not available for use><0>
<SETTING_VALUE_TYPE><available><Scanner module is available for use><1000>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM code protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection disabled><2>
<PART_INFO_TYPE><8876><PIC16F18876><16Exxx><2><8><3fff><20><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger><2000><2>
<SETTING_VALUE_TYPE><ON><background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><3>
<SWITCH_INFO_TYPE><WRT><UserNVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ON><0x0000 to 0x3FFF write protected><0>
<SETTING_VALUE_TYPE><WRT_lower><0x0000 to x1FFF write protected><1>
<SETTING_VALUE_TYPE><WRT_upper><0x0000 to 0x01FF write protected><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><1000><2>
<SETTING_VALUE_TYPE><not_available><Scanner module is not available for use><0>
<SETTING_VALUE_TYPE><available><Scanner module is available for use><1000>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM code protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection disabled><2>
<PART_INFO_TYPE><8877><PIC16F18877><16EXxx><2><10><7fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><a>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger><2000><2>
<SETTING_VALUE_TYPE><ON><background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><3>
<SWITCH_INFO_TYPE><WRT><UserNVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ON><0x0000 to 0x7FFF write protected><0>
<SETTING_VALUE_TYPE><WRT_lower><0x0000 to x3FFF write protected><1>
<SETTING_VALUE_TYPE><WRT_upper><0x0000 to 0x01FF write protected><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><1000><2>
<SETTING_VALUE_TYPE><not_available><Scanner module is not available for use><0>
<SETTING_VALUE_TYPE><available><Scanner module is available for use><1000>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM code protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection disabled><2>
<PART_INFO_TYPE><a2b2><PIC16F19155><16EXxx><2><4><1fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2b3><PIC16F19156><16EXxx><2><8><3fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2b4><PIC16F19175><16EXxx><2><4><1fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2b5><PIC16F19176><16EXxx><2><8><3fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2b6><PIC16F19185><16EXxx><2><4><1fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2b7><PIC16F19186><16EXxx><2><8><3fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a279><PIC16F19195><16EXxx><2><4><1fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a27a><PIC16F19196><16EXxx><2><8><3fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a27b><PIC16F19197><16EXxx><2><10><7fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><1933><PIC16F1933><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable><30><4>
<SETTING_VALUE_TYPE><RA0><VCAP functionality is enabled on RA0><0>
<SETTING_VALUE_TYPE><RA5><VCAP functionality is enabled on RA5><10>
<SETTING_VALUE_TYPE><RA6><VCAP functionality is enabled on RA6><20>
<SETTING_VALUE_TYPE><OFF><All VCAP pin functionality is disabled><30>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1934><PIC16F1934><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable><30><4>
<SETTING_VALUE_TYPE><RA0><VCAP functionality is enabled on RA0><0>
<SETTING_VALUE_TYPE><RA5><VCAP functionality is enabled on RA5><10>
<SETTING_VALUE_TYPE><RA6><VCAP functionality is enabled on RA6><20>
<SETTING_VALUE_TYPE><OFF><All VCAP pin functionality is disabled><30>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1936><PIC16F1936><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable><30><4>
<SETTING_VALUE_TYPE><RA0><VCAP functionality is enabled on RA0><0>
<SETTING_VALUE_TYPE><RA5><VCAP functionality is enabled on RA5><10>
<SETTING_VALUE_TYPE><RA6><VCAP functionality is enabled on RA6><20>
<SETTING_VALUE_TYPE><OFF><All VCAP pin functionality is disabled><30>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1937><PIC16F1937><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable><30><4>
<SETTING_VALUE_TYPE><RA0><VCAP functionality is enabled on RA0><0>
<SETTING_VALUE_TYPE><RA5><VCAP functionality is enabled on RA5><10>
<SETTING_VALUE_TYPE><RA6><VCAP functionality is enabled on RA6><20>
<SETTING_VALUE_TYPE><OFF><All VCAP pin functionality is disabled><30>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1938><PIC16F1938><16Exxx><2><8><3fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFFh write protected, 2000h to 3FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 3FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable><30><4>
<SETTING_VALUE_TYPE><RA0><VCAP functionality is enabled on RA0><0>
<SETTING_VALUE_TYPE><RA5><VCAP functionality is enabled on RA5><10>
<SETTING_VALUE_TYPE><RA6><VCAP functionality is enabled on RA6><20>
<SETTING_VALUE_TYPE><OFF><All VCAP pin functionality is disabled><30>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1939><PIC16F1939><16Exxx><2><8><3fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFFh write protected, 2000h to 3FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 3FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable><30><4>
<SETTING_VALUE_TYPE><RA0><VCAP functionality is enabled on RA0><0>
<SETTING_VALUE_TYPE><RA5><VCAP functionality is enabled on RA5><10>
<SETTING_VALUE_TYPE><RA6><VCAP functionality is enabled on RA6><20>
<SETTING_VALUE_TYPE><OFF><All VCAP pin functionality is disabled><30>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1946><PIC16F1946><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable><10><2>
<SETTING_VALUE_TYPE><ON><VCAP functionality is enabled on VCAP pin><0>
<SETTING_VALUE_TYPE><OFF><VCAP pin functionality is disabled><10>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><1947><PIC16F1947><16Exxx><2><8><3fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFFh write protected, 2000h to 3FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 3FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable><10><2>
<SETTING_VALUE_TYPE><ON><VCAP functionality is enabled on VCAP pin><0>
<SETTING_VALUE_TYPE><OFF><VCAP pin functionality is disabled><10>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><f505><PIC16F505><16c5x><0><2><3ff><4><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><4>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator/RB4 function on RB4/OSC2/CLKOUT pin><3>
<SETTING_VALUE_TYPE><IntRC_RB4EN><Internal RC oscillator/RB4 function on RB4/OSC2/CLKOUT pin><4>
<SETTING_VALUE_TYPE><IntRC_CLKOUTEN><Internal RC oscillator/CLKOUT function on RB4/OSC2/CLKOUT pin><5>
<SETTING_VALUE_TYPE><ExtRC_RB4EN><External RC oscillator/RB4 function on RB4/OSC2/CLKOUT pin><6>
<SETTING_VALUE_TYPE><ExtRC_CLKOUTEN><External RC oscillator/CLKOUT function on RB4/OSC2/CLKOUT pin><7>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><MCLRE><RB3/MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><GP3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RB3/MCLR pin function is MCLR><20>
<PART_INFO_TYPE><f506><PIC16F506><16c5x><0><2><3ff><4><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator and 18 ms DRT><0>
<SETTING_VALUE_TYPE><XT><XT oscillator and 18 ms DRT><1>
<SETTING_VALUE_TYPE><HS><HS oscillator and 18 ms DRT><2>
<SETTING_VALUE_TYPE><EC><EC Osc With RB4 and 1.125 ms DRT><3>
<SETTING_VALUE_TYPE><IntRC_RB4EN><INTRC With RB4 and 1.125 ms DRT><4>
<SETTING_VALUE_TYPE><IntRC_CLKOUTEN><INTRC With CLKOUT and 1.125 ms DRT><5>
<SETTING_VALUE_TYPE><ExtRC_RB4EN><EXTRC With RB4 and 1.125 ms DRT><6>
<SETTING_VALUE_TYPE><ExtRC_CLKOUTEN><EXTRC With CLKOUT and 1.125 ms DRT><7>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><CP><Code Protect><10><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><RB3/MCLR pin functions as RB3, MCLR tied internally to VDD><0>
<SETTING_VALUE_TYPE><ON><RB3/MCLR pin functions as MCLR><20>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select bit><40><2>
<SETTING_VALUE_TYPE><OFF><4 MHz INTOSC Speed><0>
<SETTING_VALUE_TYPE><ON><8 MHz INTOSC Speed><40>
<PART_INFO_TYPE><f526><PIC16F526><16c5x><0><2><3ff><4><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ff><6>
<SWITCH_INFO_TYPE><FOSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator and 18 ms DRT><0>
<SETTING_VALUE_TYPE><XT><XT oscillator and 18 ms DRT><1>
<SETTING_VALUE_TYPE><HS><HS oscillator and 18 ms DRT><2>
<SETTING_VALUE_TYPE><EC><EC oscillator with RB4 function on RB4/OSC2/CLKOUT and 1 ms DRT><3>
<SETTING_VALUE_TYPE><INTRC_RB4><INTRC with RB4 function on RB4/OSC2/CLKOUT and 1 ms DRT><4>
<SETTING_VALUE_TYPE><INTRC_CLKOUT><INTRC with CLKOUT function on RB4/OSC2/CLKOUT and 1 ms DRT><5>
<SETTING_VALUE_TYPE><ExtRC_RB4><EXTRC with RB4 function on RB4/OSC2/CLKOUT and 1 ms DRT><6>
<SETTING_VALUE_TYPE><ExtRC_CLKOUT><EXTRC with CLKOUT function on RB4/OSC2/CLKOUT and 1 ms DRT><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><RB3/MCLR functions as RB3, MCLR internally tied to Vdd><0>
<SETTING_VALUE_TYPE><ON><RB3/MCLR functions as MCLR><20>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select><40><2>
<SETTING_VALUE_TYPE><4MHz><4 MHz INTOSC Speed><0>
<SETTING_VALUE_TYPE><8MHz><8 MHz INTOSC Speed><40>
<SWITCH_INFO_TYPE><CPDF><Code Protection bit - Flash Data Memory><80><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><80>
<PART_INFO_TYPE><f527><PIC16F527><16c5ie><0><2><3ff><4><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><3ff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator and automatic 18 ms DRT (DRTEN ignored)><0>
<SETTING_VALUE_TYPE><XT><XT oscillator and automatic 18 ms DRT (DRTEN ignored)><1>
<SETTING_VALUE_TYPE><HS><HS oscillator and automatic 18 ms DRT (DRTEN ignored)><2>
<SETTING_VALUE_TYPE><EC><EC oscillator with I/O function on OSC2/CLKOUT and 10 us startup time><3>
<SETTING_VALUE_TYPE><INTRC_IO><INTRC with I/O function on OSC2/CLKOUT and 10 us startup time><4>
<SETTING_VALUE_TYPE><INTRC_CLKOUT><INTRC with CLKOUT function on OSC2/CLKOUT and 10 us startup time><5>
<SETTING_VALUE_TYPE><EXTRC_IO><EXTRC with I/O function on OSC2/CLKOUT and 10 us startup time><6>
<SETTING_VALUE_TYPE><EXTRC_CLKOUT><EXTRC with CLKOUT function on OSC2/CLKOUT and 10 us startup time><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><8><2>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><ON><WDT Enabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection - User Program Memory><10><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin functions as I/O, MCLR internally tied to Vdd><0>
<SETTING_VALUE_TYPE><ON><MCLR pin functions as MCLR><20>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select><40><2>
<SETTING_VALUE_TYPE><4MHz><4 MHz INTOSC Speed><0>
<SETTING_VALUE_TYPE><8MHz><8 MHz INTOSC Speed><40>
<SWITCH_INFO_TYPE><CPSW><Code Protection - Self Writable Memory><80><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><100><2>
<SETTING_VALUE_TYPE><OFF><BOR Disabled><0>
<SETTING_VALUE_TYPE><ON><BOR Enabled><100>
<SWITCH_INFO_TYPE><DRTEN><Device Reset Timer Enable><200><2>
<SETTING_VALUE_TYPE><OFF><DRT Disabled><0>
<SETTING_VALUE_TYPE><ON><DRT Enabled (18 ms)><200>
<PART_INFO_TYPE><6f54><PIC16F54><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<PART_INFO_TYPE><6f57><PIC16F57><16c5x><0><4><7ff><4><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<PART_INFO_TYPE><f570><PIC16F570><16c5ie><0><4><7ff><8><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><3ff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator and 18 ms DRT><0>
<SETTING_VALUE_TYPE><XT><XT oscillator and 18 ms DRT><1>
<SETTING_VALUE_TYPE><HS><HS oscillator and 18 ms DRT><2>
<SETTING_VALUE_TYPE><EC><EC oscillator with I/O function on OSC2/CLKOUT><3>
<SETTING_VALUE_TYPE><INTRC_IO><INTRC with I/O function on OSC2/CLKOUT><4>
<SETTING_VALUE_TYPE><INTRC_CLKOUT><INTRC with CLKOUT function on OSC2/CLKOUT><5>
<SETTING_VALUE_TYPE><EXTRC_IO><EXTRC with I/O function on OSC2/CLKOUT><6>
<SETTING_VALUE_TYPE><EXTRC_CLKOUT><EXTRC with CLKOUT function on OSC2/CLKOUT><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select><40><2>
<SETTING_VALUE_TYPE><4MHz><4 MHz INTOSC Speed><0>
<SETTING_VALUE_TYPE><8MHz><8 MHz INTOSC Speed><40>
<SWITCH_INFO_TYPE><CPSW><Code Protection bit - Flash Data Memory><80><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><80>
<SWITCH_INFO_TYPE><BOREN><><100><2>
<SETTING_VALUE_TYPE><OFF><BOR Disabled><0>
<SETTING_VALUE_TYPE><ON><BOR Enabled><100>
<SWITCH_INFO_TYPE><DRTEN><><200><2>
<SETTING_VALUE_TYPE><OFF><DRT Disabled><0>
<SETTING_VALUE_TYPE><ON><DRT Enabled><200>
<PART_INFO_TYPE><6f59><PIC16F59><16c5x><0><4><7ff><8><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<PART_INFO_TYPE><f610><PIC16F610><16xxxx><0><0><3ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select bit><80><2>
<SETTING_VALUE_TYPE><4MHZ><4 MHz><0>
<SETTING_VALUE_TYPE><8MHZ><8 MHz><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR Disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<PART_INFO_TYPE><f616><PIC16F616><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select bit><80><2>
<SETTING_VALUE_TYPE><4MHZ><4 MHz><0>
<SETTING_VALUE_TYPE><8MHZ><8 MHz><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR Disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<PART_INFO_TYPE><6627><PIC16F627><16xxxx><0><0><3ff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><ECIO><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><11>
<SETTING_VALUE_TYPE><ERIO><ER oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor on RA7/OSC1/CLKIN><12>
<SETTING_VALUE_TYPE><ERCLK><ER oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor on RA7/OSC1/CLKIN><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR pin function select><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOD Reset disabled><0>
<SETTING_VALUE_TYPE><ON><BOD Reset enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB4/PGM pin has digital I/O function, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB4/PGM pin has PGM function, low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protected><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection off><100>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3c00><4>
<SETTING_VALUE_TYPE><ALL><0000h-03FFh code protected><0>
<SETTING_VALUE_TYPE><75><0200h-03FFh code protected><1400>
<SETTING_VALUE_TYPE><50><Program memory code protection off><2800>
<SETTING_VALUE_TYPE><OFF><Program memory code protection off><3c00>
<PART_INFO_TYPE><627a><PIC16F627A><16xxxx><0><0><3ff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><ECIO><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSC oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><11>
<SETTING_VALUE_TYPE><EXTRCIO><RC oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN><12>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR/VPP pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR/VPP pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Detect Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOD disabled><0>
<SETTING_VALUE_TYPE><ON><BOD enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB4/PGM pin has digital I/O function, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB4/PGM pin has PGM function, low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection off><100>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><0000h to 03FFh code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><6628><PIC16F628><16xxxx><0><1><7ff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><ECIO><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><11>
<SETTING_VALUE_TYPE><ERIO><ER oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor on RA7/OSC1/CLKIN><12>
<SETTING_VALUE_TYPE><ERCLK><ER oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor on RA7/OSC1/CLKIN><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR pin function select><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOD Reset disabled><0>
<SETTING_VALUE_TYPE><ON><BOD Reset enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB4/PGM pin has digital I/O function, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB4/PGM pin has PGM function, low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protected><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection off><100>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3c00><4>
<SETTING_VALUE_TYPE><ALL><0000h-07FFh code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1400>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2800>
<SETTING_VALUE_TYPE><OFF><Program memory code protection off><3c00>
<PART_INFO_TYPE><628a><PIC16F628A><16xxxx><0><1><7ff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><ECIO><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSC oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><11>
<SETTING_VALUE_TYPE><EXTRCIO><RC oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN><12>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR/VPP pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR/VPP pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Detect Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOD disabled><0>
<SETTING_VALUE_TYPE><ON><BOD enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB4/PGM pin has digital I/O function, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB4/PGM pin has PGM function, low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection off><100>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><0000h to 07FFh code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><6630><PIC16F630><16xxxx><0><0><3ff><2><5f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRCIO><INTOSC oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RC oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RA3/MCLR pin function select><20><2>
<SETTING_VALUE_TYPE><OFF><RA3/MCLR pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Detect Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOD disabled><0>
<SETTING_VALUE_TYPE><ON><BOD enabled><40>
<SWITCH_INFO_TYPE><CP><Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<PART_INFO_TYPE><6631><PIC16F631><16xxxx><0><0><3ff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRCIO><INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<PART_INFO_TYPE><f636><PIC16F636><16xxxx><0><1><7ff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/T1G/OSC2/CLKOUT, CLKIN on RA5/T1CKI/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA4/T1G/OSC2/CLKOUT pin, I/O function on RA5/T1CKI/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA4/T1G/OSC2/CLKOUT pin, I/O function on RA5/T1CKI/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA4/T1G/OSC2/CLKOUT pin, RC on RA5/T1CKI/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA4/T1G/OSC2/CLKOUT pin, RC on RA5/T1CKI/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory is external read protected><0>
<SETTING_VALUE_TYPE><OFF><Data memory is not code protected><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOD and SBODEN disabled><0>
<SETTING_VALUE_TYPE><SBODEN><SBODEN controls BOD function><100>
<SETTING_VALUE_TYPE><NSLEEP><BOD enabled while running and disabled in Sleep. SBODEN bit disabled.><200>
<SETTING_VALUE_TYPE><ON><BOD enabled and SBOdEN bit disabled><300>
<SWITCH_INFO_TYPE><IESO><Internal-External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><800>
<SWITCH_INFO_TYPE><WURE><Wake-Up Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><ON><Wake-up and Reset enabled><0>
<SETTING_VALUE_TYPE><OFF><Standard wake-up and continue enabled><1000>
<PART_INFO_TYPE><f639><PIC16F639><16xxxx><0><1><7ff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/T1G/OSC2/CLKOUT, CLKIN on RA5/T1CKI/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA4/T1G/OSC2/CLKOUT pin, I/O function on RA5/T1CKI/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA4/T1G/OSC2/CLKOUT pin, I/O function on RA5/T1CKI/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA4/T1G/OSC2/CLKOUT pin, RC on RA5/T1CKI/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA4/T1G/OSC2/CLKOUT pin, RC on RA5/T1CKI/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory is external read protected><0>
<SETTING_VALUE_TYPE><OFF><Data memory is not code protected><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOD and SBODEN disabled><0>
<SETTING_VALUE_TYPE><SBODEN><SBODEN controls BOD function><100>
<SETTING_VALUE_TYPE><NSLEEP><BOD enabled while running and disabled in Sleep. SBODEN bit disabled.><200>
<SETTING_VALUE_TYPE><ON><BOD enabled and SBOdEN bit disabled><300>
<SWITCH_INFO_TYPE><IESO><Internal-External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><800>
<SWITCH_INFO_TYPE><WURE><Wake-Up Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><ON><Wake-up and Reset enabled><0>
<SETTING_VALUE_TYPE><OFF><Standard wake-up and continue enabled><1000>
<PART_INFO_TYPE><648a><PIC16F648A><16xxxx><0><2><fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><ECIO><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSC oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><11>
<SETTING_VALUE_TYPE><EXTRCIO><RC oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN><12>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR/VPP pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR/VPP pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Detect Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOD disabled><0>
<SETTING_VALUE_TYPE><ON><BOD enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB4/PGM pin has digital I/O function, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB4/PGM pin has PGM function, low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection off><100>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><0000h to 0FFFh code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><6676><PIC16F676><16xxxx><0><0><3ff><2><5f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRCIO><INTOSC oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RC oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RA3/MCLR pin function select><20><2>
<SETTING_VALUE_TYPE><OFF><RA3/MCLR pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Detect Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOD disabled><0>
<SETTING_VALUE_TYPE><ON><BOD enabled><40>
<SWITCH_INFO_TYPE><CP><Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<PART_INFO_TYPE><6677><PIC16F677><16xxxx><0><1><7ff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRCIO><INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<PART_INFO_TYPE><6684><PIC16F684><16xxxx><0><1><7ff><2><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKINT><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin><6>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<PART_INFO_TYPE><6685><PIC16F685><16xxxx><0><2><fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRCIO><INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<PART_INFO_TYPE><6687><PIC16F687><16xxxx><0><1><7ff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRCIO><INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<PART_INFO_TYPE><6688><PIC16F688><16xxxx><0><2><fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKINT><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin><6>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<PART_INFO_TYPE><6689><PIC16F689><16xxxx><0><2><fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRCIO><INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<PART_INFO_TYPE><6690><PIC16F690><16xxxx><0><2><fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRCIO><INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<PART_INFO_TYPE><f707><PIC16F707><16xxxx><2><4><1fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP_OSC><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT_OSC><XT oscillator: Crystal/resonator on RA6/OSC2/CLKIN and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS_OSC><HS oscillator: High Speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC_OSC><EC oscillator: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN pins><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function  on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled (Preconditioned State)><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bit><400><2>
<SETTING_VALUE_TYPE><25><Brown-out Reset Voltage (VBOR) set to 2.5 V nominal><0>
<SETTING_VALUE_TYPE><19><Brown-out Reset Voltage (VBOR) set to 1.9 V nominal><400>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLLEN Enable Bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16 MHz (32x)><1000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><1>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bits><30><4>
<SETTING_VALUE_TYPE><RA0><VCAP functionality is enabled on RA0><0>
<SETTING_VALUE_TYPE><RA5><VCAP functionality is enabled on RA5><10>
<SETTING_VALUE_TYPE><RA6><VCAP functionality is enabled on RA6><20>
<SETTING_VALUE_TYPE><OFF><All VCAP pin functions are disabled><30>
<PART_INFO_TYPE><f716><PIC16F716><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><BODENV><Brown-out Reset Voltage bit><80><2>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><0>
<SETTING_VALUE_TYPE><40><VBOR set to 4.0V><80>
<SWITCH_INFO_TYPE><CP><Code Protect><2000><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><2000>
<PART_INFO_TYPE><672f><PIC16F72><16xxxx><0><1><7ff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><All Memory locations code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><f720><PIC16F720><16xxxx><2><1><7ff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA4/CLKO pin, I/O function on RA5/CLKI><0>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKO function on RA4/CLKO pin, I/O function on RA5/CLKI><1>
<SETTING_VALUE_TYPE><ECIO><EC oscillator: I/O function on RA4/CLKO pin, CLKI on RA5/CLKI><2>
<SETTING_VALUE_TYPE><ECCLK><EC oscillator: CLKO function on RA4/CLKO pin, CLKI on RA5/CLKI><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RA3/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA3/MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up disabled><0>
<SETTING_VALUE_TYPE><ON><RA3/MCLR/VPP pin function is MCLR; Weak pull-up enabled.><20>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><0000h to 07FFh code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><300><3>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled (Preconditioned State)><0>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><300>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLLEN Enable Bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16 MHz (32x)><1000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><1>
<SWITCH_INFO_TYPE><WRTEN><Flash memory self-write protection bits><3><4>
<SETTING_VALUE_TYPE><FULL><0h to FFFh of flash memory write protected, no address may be modified><0>
<SETTING_VALUE_TYPE><HALF><0h to 7FFh of flash memory write protected, 800h to FFFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0h to 1FFh of flash memory write protected, 200h to FFFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<PART_INFO_TYPE><f721><PIC16F721><16xxxx><2><2><fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA4/CLKO pin, I/O function on RA5/CLKI><0>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKO function on RA4/CLKO pin, I/O function on RA5/CLKI><1>
<SETTING_VALUE_TYPE><ECIO><EC oscillator: I/O function on RA4/CLKO pin, CLKI on RA5/CLKI><2>
<SETTING_VALUE_TYPE><ECCLK><EC oscillator: CLKO function on RA4/CLKO pin, CLKI on RA5/CLKI><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RA3/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA3/MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up disabled><0>
<SETTING_VALUE_TYPE><ON><RA3/MCLR/VPP pin function is MCLR; Weak pull-up enabled.><20>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><0000h to 0FFFh code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><300><3>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled (Preconditioned State)><0>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><300>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLLEN Enable Bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16 MHz (32x)><1000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><1>
<SWITCH_INFO_TYPE><WRTEN><Flash memory self-write protection bits><3><4>
<SETTING_VALUE_TYPE><FULL><0h to FFFh of flash memory write protected, no address may be modified><0>
<SETTING_VALUE_TYPE><HALF><0h to 7FFh of flash memory write protected, 800h to FFFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0h to 1FFh of flash memory write protected, 200h to FFFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<PART_INFO_TYPE><f722><PIC16F722><16xxxx><2><1><7ff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><400><2>
<SETTING_VALUE_TYPE><25><Brown-out Reset Voltage (VBOR) set to 2.5 V nominal><0>
<SETTING_VALUE_TYPE><19><Brown-out Reset Voltage (VBOR) set to 1.9 V nominal><400>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLLEN Enable Bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16MHz (32x)><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><1>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bits><30><4>
<SETTING_VALUE_TYPE><RA0><VCAP functionality is enabled on RA0><0>
<SETTING_VALUE_TYPE><RA5><VCAP functionality is enabled on RA5><10>
<SETTING_VALUE_TYPE><RA6><VCAP functionality is enabled on RA6><20>
<SETTING_VALUE_TYPE><DIS><All VCAP pin functions are disabled><30>
<PART_INFO_TYPE><a722><PIC16F722A><16xxxx><2><1><7ff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><400><2>
<SETTING_VALUE_TYPE><25><Brown-out Reset Voltage (VBOR) set to 2.5 V nominal><0>
<SETTING_VALUE_TYPE><19><Brown-out Reset Voltage (VBOR) set to 1.9 V nominal><400>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLL Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16MHz (32x)><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In-circuit debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-circuit debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><1>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bits><30><4>
<SETTING_VALUE_TYPE><RA0><VCAP functionality is enabled on RA0><0>
<SETTING_VALUE_TYPE><RA5><VCAP functionality is enabled on RA5><10>
<SETTING_VALUE_TYPE><RA6><VCAP functionality is enabled on RA6><20>
<SETTING_VALUE_TYPE><DIS><All VCAP pin functions are disabled><30>
<PART_INFO_TYPE><f723><PIC16F723><16xxxx><2><2><fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><400><2>
<SETTING_VALUE_TYPE><25><Brown-out Reset Voltage (VBOR) set to 2.5 V nominal><0>
<SETTING_VALUE_TYPE><19><Brown-out Reset Voltage (VBOR) set to 1.9 V nominal><400>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLLEN Enable Bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16MHz (32x)><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><1>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bits><30><4>
<SETTING_VALUE_TYPE><RA0><VCAP functionality is enabled on RA0><0>
<SETTING_VALUE_TYPE><RA5><VCAP functionality is enabled on RA5><10>
<SETTING_VALUE_TYPE><RA6><VCAP functionality is enabled on RA6><20>
<SETTING_VALUE_TYPE><DIS><All VCAP pin functions are disabled><30>
<PART_INFO_TYPE><a723><PIC16F723A><16xxxx><2><2><fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><400><2>
<SETTING_VALUE_TYPE><25><Brown-out Reset Voltage (VBOR) set to 2.5 V nominal><0>
<SETTING_VALUE_TYPE><19><Brown-out Reset Voltage (VBOR) set to 1.9 V nominal><400>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLL Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16MHz (32x)><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In-circuit debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-circuit debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><1>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bits><30><4>
<SETTING_VALUE_TYPE><RA0><VCAP functionality is enabled on RA0><0>
<SETTING_VALUE_TYPE><RA5><VCAP functionality is enabled on RA5><10>
<SETTING_VALUE_TYPE><RA6><VCAP functionality is enabled on RA6><20>
<SETTING_VALUE_TYPE><DIS><All VCAP pin functions are disabled><30>
<PART_INFO_TYPE><f724><PIC16F724><16xxxx><2><2><fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><400><2>
<SETTING_VALUE_TYPE><25><Brown-out Reset Voltage (VBOR) set to 2.5 V nominal><0>
<SETTING_VALUE_TYPE><19><Brown-out Reset Voltage (VBOR) set to 1.9 V nominal><400>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLLEN Enable Bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16MHz (32x)><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><1>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bits><30><4>
<SETTING_VALUE_TYPE><RA0><VCAP functionality is enabled on RA0><0>
<SETTING_VALUE_TYPE><RA5><VCAP functionality is enabled on RA5><10>
<SETTING_VALUE_TYPE><RA6><VCAP functionality is enabled on RA6><20>
<SETTING_VALUE_TYPE><DIS><All VCAP pin functions are disabled><30>
<PART_INFO_TYPE><f726><PIC16F726><16xxxx><2><4><1fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><400><2>
<SETTING_VALUE_TYPE><25><Brown-out Reset Voltage (VBOR) set to 2.5 V nominal><0>
<SETTING_VALUE_TYPE><19><Brown-out Reset Voltage (VBOR) set to 1.9 V nominal><400>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLLEN Enable Bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16MHz (32x)><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><1>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bits><30><4>
<SETTING_VALUE_TYPE><RA0><VCAP functionality is enabled on RA0><0>
<SETTING_VALUE_TYPE><RA5><VCAP functionality is enabled on RA5><10>
<SETTING_VALUE_TYPE><RA6><VCAP functionality is enabled on RA6><20>
<SETTING_VALUE_TYPE><DIS><All VCAP pin functions are disabled><30>
<PART_INFO_TYPE><f727><PIC16F727><16xxxx><2><4><1fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><400><2>
<SETTING_VALUE_TYPE><25><Brown-out Reset Voltage (VBOR) set to 2.5 V nominal><0>
<SETTING_VALUE_TYPE><19><Brown-out Reset Voltage (VBOR) set to 1.9 V nominal><400>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLLEN Enable Bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16MHz (32x)><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><1>
<SWITCH_INFO_TYPE><VCAPEN><Voltage Regulator Capacitor Enable bits><30><4>
<SETTING_VALUE_TYPE><RA0><VCAP functionality is enabled on RA0><0>
<SETTING_VALUE_TYPE><RA5><VCAP functionality is enabled on RA5><10>
<SETTING_VALUE_TYPE><RA6><VCAP functionality is enabled on RA6><20>
<SETTING_VALUE_TYPE><DIS><All VCAP pin functions are disabled><30>
<PART_INFO_TYPE><673f><PIC16F73><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><All Memory locations code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6737><PIC16F737><16xxxx><2><2><fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EXTCLK; port I/O function on OSC2/CLKO/RA6><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator; port I/O function on OSC1/CLKI/RA7 and OSC2/CLKO/RA6><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator; CLKO function on OSC2/CLKO/RA6 and port I/O function on OSC1/CLKI/RA7><11>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC oscillator; port I/O function on OSC2/CLKO/RA6><12>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator; CLKO function on OSC2/CLKO/RA6><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR/VPP/RE3 Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP/RE3 pin function is digital input only, MCLR gated to '1'><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP/RE3 pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><180><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><80>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><100>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><180>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Multiplex bit><1000><2>
<SETTING_VALUE_TYPE><RB3><CCP2 is on RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 is on RC1><1000>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bits><2000><2>
<SETTING_VALUE_TYPE><ON><0000h to 0FFFh code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><3>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><1>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><2><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><2>
<SWITCH_INFO_TYPE><BORSEN><Brown-out Reset Software Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<PART_INFO_TYPE><674f><PIC16F74><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><All Memory locations code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6747><PIC16F747><16xxxx><2><2><fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EXTCLK; port I/O function on OSC2/CLKO/RA6><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator; port I/O function on OSC1/CLKI/RA7 and OSC2/CLKO/RA6><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator; CLKO function on OSC2/CLKO/RA6 and port I/O function on OSC1/CLKI/RA7><11>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC oscillator; port I/O function on OSC2/CLKO/RA6><12>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator; CLKO function on OSC2/CLKO/RA6><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR/VPP/RE3 Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP/RE3 pin function is digital input only, MCLR gated to '1'><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP/RE3 pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><180><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><80>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><100>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><180>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Multiplex bit><1000><2>
<SETTING_VALUE_TYPE><RB3><CCP2 is on RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 is on RC1><1000>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bits><2000><2>
<SETTING_VALUE_TYPE><ON><0000h to 0FFFh code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><3>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><1>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><2><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><2>
<SWITCH_INFO_TYPE><BORSEN><Brown-out Reset Software Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<PART_INFO_TYPE><f753><PIC16F753><16xxxx><0><1><7ff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><8>
<SWITCH_INFO_TYPE><FOSC0><FOSC: Oscillator Selection bit><1><2>
<SETTING_VALUE_TYPE><INT><Internal oscillator mode.  I/O function on RA5/CLKIN><0>
<SETTING_VALUE_TYPE><EC><EC oscillator mode.  CLKIN function on RA5/CLKIN><1>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Watchdog Timer disabled><0>
<SETTING_VALUE_TYPE><ON><Watchdog Timer enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><Power-up Timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power-up Timer disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function with internal weak pullup><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><300><3>
<SETTING_VALUE_TYPE><DIS><BOR disabled><0>
<SETTING_VALUE_TYPE><SLEEP_DIS><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><EN><BOR enabled><300>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bit><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFh self-write protected><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFh self-write protected><400>
<SETTING_VALUE_TYPE><FOURTH><000h to 0FFh self-write protected><800>
<SETTING_VALUE_TYPE><OFF><Flash self-write protection off><c00>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1000><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function enabled.  CLKOUT pin is CLKOUT><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function disabled.  CLKOUT pin acts as I/O><1000>
<PART_INFO_TYPE><676f><PIC16F76><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><All Memory locations code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6767><PIC16F767><16xxxx><2><4><1fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EXTCLK; port I/O function on OSC2/CLKO/RA6><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator; port I/O function on OSC1/CLKI/RA7 and OSC2/CLKO/RA6><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator; CLKO function on OSC2/CLKO/RA6 and port I/O function on OSC1/CLKI/RA7><11>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC oscillator; port I/O function on OSC2/CLKO/RA6><12>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator; CLKO function on OSC2/CLKO/RA6><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR/VPP/RE3 Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP/RE3 pin function is digital input only, MCLR gated to '1'><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP/RE3 pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><180><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><80>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><100>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><180>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Multiplex bit><1000><2>
<SETTING_VALUE_TYPE><RB3><CCP2 is on RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 is on RC1><1000>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bits><2000><2>
<SETTING_VALUE_TYPE><ON><0000h to 1FFFh code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><3>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><1>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><2><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><2>
<SWITCH_INFO_TYPE><BORSEN><Brown-out Reset Software Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<PART_INFO_TYPE><677f><PIC16F77><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><All Memory locations code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><6777><PIC16F777><16xxxx><2><4><1fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EXTCLK; port I/O function on OSC2/CLKO/RA6><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator; port I/O function on OSC1/CLKI/RA7 and OSC2/CLKO/RA6><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator; CLKO function on OSC2/CLKO/RA6 and port I/O function on OSC1/CLKI/RA7><11>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC oscillator; port I/O function on OSC2/CLKO/RA6><12>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator; CLKO function on OSC2/CLKO/RA6><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR/VPP/RE3 Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP/RE3 pin function is digital input only, MCLR gated to '1'><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP/RE3 pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><180><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><80>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><100>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><180>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Multiplex bit><1000><2>
<SETTING_VALUE_TYPE><RB3><CCP2 is on RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 is on RC1><1000>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bits><2000><2>
<SETTING_VALUE_TYPE><ON><0000h to 1FFFh code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><3>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><1>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><2><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><2>
<SWITCH_INFO_TYPE><BORSEN><Brown-out Reset Software Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<PART_INFO_TYPE><f785><PIC16F785><16xxxx><0><1><7ff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKINT><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin><6>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<PART_INFO_TYPE><818f><PIC16F818><16xxxx><0><0><3ff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><b>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EXTCLK; port I/O function on RA6/OSC2/CLKO pin><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin><11>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC oscillator; port I/O function on RA6/OSC2/CLKO pin><12>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator; CLKO function on RA6/OSC2/CLKO pin><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR/VPP pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3/PGM pin has digital I/O function, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function, Low-Voltage Programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data EE memory locations code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Write Enable bits><600><3>
<SETTING_VALUE_TYPE><1024><0000h to 03FFh write-protected><200>
<SETTING_VALUE_TYPE><512><0000h to 01FFh write-protected, 0200h to 03FFh may be modified by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off><600>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CCPMX><CCP1 Pin Selection bit><1000><2>
<SETTING_VALUE_TYPE><RB3><CCP1 function on RB3><0>
<SETTING_VALUE_TYPE><RB2><CCP1 function on RB2><1000>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><All memory locations code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><819f><PIC16F819><16xxxx><0><1><7ff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><b>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EXTCLK; port I/O function on RA6/OSC2/CLKO pin><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin><11>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC oscillator; port I/O function on RA6/OSC2/CLKO pin><12>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator; CLKO function on RA6/OSC2/CLKO pin><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR/VPP pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3/PGM pin has digital I/O function, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function, Low-Voltage Programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data EE memory locations code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Write Enable bits><600><4>
<SETTING_VALUE_TYPE><1536><0000h to 05FFh write-protected, 0600h to 07FFh may be modified by EECON control><0>
<SETTING_VALUE_TYPE><1024><0000h to 03FFh write-protected, 0400h to 07FFh may be modified by EECON control><200>
<SETTING_VALUE_TYPE><512><0000h to 01FFh write-protected, 0200h to 07FFh may be modified by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off><600>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CCPMX><CCP1 Pin Selection bit><1000><2>
<SETTING_VALUE_TYPE><RB3><CCP1 function on RB3><0>
<SETTING_VALUE_TYPE><RB2><CCP1 function on RB2><1000>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><All memory locations code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><6c83><PIC16F83><16xxxx><0><0><1ff><2><2f><3f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Power-up Timer is enabled><0>
<SETTING_VALUE_TYPE><OFF><Power-up Timer is disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bit><3ff0><2>
<SETTING_VALUE_TYPE><ON><All program memory is code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection disabled><3ff0>
<PART_INFO_TYPE><684a><PIC16F84><16xxxx><0><0><3ff><2><4f><3f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Power-up Timer is enabled><0>
<SETTING_VALUE_TYPE><OFF><Power-up Timer is disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bit><3ff0><2>
<SETTING_VALUE_TYPE><ON><All program memory is code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection disabled><3ff0>
<PART_INFO_TYPE><6f84><PIC16F84A><16xxxx><0><0><3ff><2><4f><3f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Power-up Timer is enabled><0>
<SETTING_VALUE_TYPE><OFF><Power-up Timer is disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bit><3ff0><2>
<SETTING_VALUE_TYPE><ON><All program memory is code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection disabled><3ff0>
<PART_INFO_TYPE><687f><PIC16F87><16xxxx><2><2><fff><4><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><b>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><ECIO; port I/O function on RA6/OSC2/CLKO><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin><11>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC oscillator; port I/O function on RA6/OSC2/CLKO><12>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator; CLKO function on RA6/OSC2/CLKO><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR/VPP pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function, Low-Voltage Programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data EE memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Write Enable bits><600><4>
<SETTING_VALUE_TYPE><ALL><0000h to 0FFFh write-protected><0>
<SETTING_VALUE_TYPE><2048><0000h to 07FFh write-protected, 0800h to 0FFFh may be modified by EECON control><200>
<SETTING_VALUE_TYPE><256><0000h to 00FFh write-protected, 0100h to 0FFFh may be modified by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off><600>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CCPMX><CCP1 Pin Selection bit><1000><2>
<SETTING_VALUE_TYPE><RB3><CCP1 function on RB3><0>
<SETTING_VALUE_TYPE><RB0><CCP1 function on RB0><1000>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><0000h to 0FFFh code-protected (all protected)><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><2>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><1>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><2><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><2>
<PART_INFO_TYPE><870f><PIC16F870><16xxxx><0><1><7ff><4><7f><3f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bits><3030><2>
<SETTING_VALUE_TYPE><ON><All memory code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><3030>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low Voltage In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection off><100>
<SWITCH_INFO_TYPE><WRT><FLASH Program Memory Write Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Unprotected program memory may not be written to by EECON control><0>
<SETTING_VALUE_TYPE><ALL><Unprotected program memory may be written to by EECON control><200>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<PART_INFO_TYPE><871f><PIC16F871><16xxxx><0><1><7ff><4><7f><3f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bits><3030><2>
<SETTING_VALUE_TYPE><ON><All memory code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><3030>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low Voltage In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection off><100>
<SWITCH_INFO_TYPE><WRT><FLASH Program Memory Write Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Unprotected program memory may not be written to by EECON control><0>
<SETTING_VALUE_TYPE><ALL><Unprotected program memory may be written to by EECON control><200>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<PART_INFO_TYPE><872f><PIC16F872><16xxxx><0><1><7ff><4><7f><3f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bits><3030><2>
<SETTING_VALUE_TYPE><ON><All memory code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><3030>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low Voltage In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection off><100>
<SWITCH_INFO_TYPE><WRT><FLASH Program Memory Write Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Unprotected program memory may not be written to by EECON control><0>
<SETTING_VALUE_TYPE><ALL><Unprotected program memory may be written to by EECON control><200>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<PART_INFO_TYPE><873f><PIC16F873><16xxxx><0><2><fff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bits><3030><4>
<SETTING_VALUE_TYPE><ALL><0000h to 0FFFh code protected><0>
<SETTING_VALUE_TYPE><HALF><0800h to 0FFFh code protected><1010>
<SETTING_VALUE_TYPE><UPPER_256><0F00h to 0FFFh code protected><2020>
<SETTING_VALUE_TYPE><OFF><Code protection off><3030>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low Voltage In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection off><100>
<SWITCH_INFO_TYPE><WRT><FLASH Program Memory Write Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Unprotected program memory may not be written to by EECON control><0>
<SETTING_VALUE_TYPE><ON><Unprotected program memory may be written to by EECON control><200>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<PART_INFO_TYPE><873a><PIC16F873A><16xxxx><0><2><fff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage (Single-Supply) In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection off><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Write Enable bits><600><4>
<SETTING_VALUE_TYPE><HALF><0000h to 07FFh write-protected; 0800h to 0FFFh may be written to by EECON control><0>
<SETTING_VALUE_TYPE><1FOURTH><0000h to 03FFh write-protected; 0400h to 0FFFh may be written to by EECON control><200>
<SETTING_VALUE_TYPE><256><0000h to 00FFh write-protected; 0100h to 0FFFh may be written to by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off; all program memory may be written to by EECON control><600>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><All program memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><874f><PIC16F874><16xxxx><0><2><fff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bits><3030><4>
<SETTING_VALUE_TYPE><ALL><0000h to 0FFFh code protected><0>
<SETTING_VALUE_TYPE><HALF><0800h to 0FFFh code protected><1010>
<SETTING_VALUE_TYPE><UPPER_256><0F00h to 0FFFh code protected><2020>
<SETTING_VALUE_TYPE><OFF><Code protection off><3030>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low Voltage In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection off><100>
<SWITCH_INFO_TYPE><WRT><FLASH Program Memory Write Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Unprotected program memory may not be written to by EECON control><0>
<SETTING_VALUE_TYPE><ON><Unprotected program memory may be written to by EECON control><200>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<PART_INFO_TYPE><874a><PIC16F874A><16xxxx><0><2><fff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage (Single-Supply) In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection off><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Write Enable bits><600><4>
<SETTING_VALUE_TYPE><HALF><0000h to 07FFh write-protected; 0800h to 0FFFh may be written to by EECON control><0>
<SETTING_VALUE_TYPE><1FOURTH><0000h to 03FFh write-protected; 0400h to 0FFFh may be written to by EECON control><200>
<SETTING_VALUE_TYPE><256><0000h to 00FFh write-protected; 0100h to 0FFFh may be written to by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off; all program memory may be written to by EECON control><600>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><All program memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><876f><PIC16F876><16xxxx><0><4><1fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bits><3030><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh code protected><0>
<SETTING_VALUE_TYPE><HALF><1000h to 1FFFh code protected><1010>
<SETTING_VALUE_TYPE><UPPER_256><1F00h to 1FFFh code protected><2020>
<SETTING_VALUE_TYPE><OFF><Code protection off><3030>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low Voltage In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection off><100>
<SWITCH_INFO_TYPE><WRT><FLASH Program Memory Write Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Unprotected program memory may not be written to by EECON control><0>
<SETTING_VALUE_TYPE><ON><Unprotected program memory may be written to by EECON control><200>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<PART_INFO_TYPE><876a><PIC16F876A><16xxxx><0><4><1fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage (Single-Supply) In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection off><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Write Enable bits><600><4>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write-protected; 1000h to 1FFFh may be written to by EECON control><0>
<SETTING_VALUE_TYPE><1FOURTH><0000h to 07FFh write-protected; 0800h to 1FFFh may be written to by EECON control><200>
<SETTING_VALUE_TYPE><256><0000h to 00FFh write-protected; 0100h to 1FFFh may be written to by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off; all program memory may be written to by EECON control><600>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><All program memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><877f><PIC16F877><16xxxx><0><4><1fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><3fff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bits><3030><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh code protected><0>
<SETTING_VALUE_TYPE><HALF><1000h to 1FFFh code protected><1010>
<SETTING_VALUE_TYPE><UPPER_256><1F00h to 1FFFh code protected><2020>
<SETTING_VALUE_TYPE><OFF><Code protection off><3030>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low Voltage In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection off><100>
<SWITCH_INFO_TYPE><WRT><FLASH Program Memory Write Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Unprotected program memory may not be written to by EECON control><0>
<SETTING_VALUE_TYPE><ON><Unprotected program memory may be written to by EECON control><200>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<PART_INFO_TYPE><877a><PIC16F877A><16xxxx><0><4><1fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><3fff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage (Single-Supply) In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection off><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Write Enable bits><600><4>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write-protected; 1000h to 1FFFh may be written to by EECON control><0>
<SETTING_VALUE_TYPE><1FOURTH><0000h to 07FFh write-protected; 0800h to 1FFFh may be written to by EECON control><200>
<SETTING_VALUE_TYPE><256><0000h to 00FFh write-protected; 0100h to 1FFFh may be written to by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off; all program memory may be written to by EECON control><600>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><All program memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><688f><PIC16F88><16xxxx><2><2><fff><4><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><b>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><ECIO; port I/O function on RA6/OSC2/CLKO><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin><11>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC oscillator; port I/O function on RA6/OSC2/CLKO><12>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator; CLKO function on RA6/OSC2/CLKO><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR/VPP pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function, Low-Voltage Programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data EE memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Write Enable bits><600><4>
<SETTING_VALUE_TYPE><ALL><0000h to 0FFFh write-protected><0>
<SETTING_VALUE_TYPE><2048><0000h to 07FFh write-protected, 0800h to 0FFFh may be modified by EECON control><200>
<SETTING_VALUE_TYPE><256><0000h to 00FFh write-protected, 0100h to 0FFFh may be modified by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off><600>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CCPMX><CCP1 Pin Selection bit><1000><2>
<SETTING_VALUE_TYPE><RB3><CCP1 function on RB3><0>
<SETTING_VALUE_TYPE><RB0><CCP1 function on RB0><1000>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><0000h to 0FFFh code-protected (all protected)><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><2>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><1>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><2><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><2>
<PART_INFO_TYPE><882f><PIC16F882><16xxxx><2><1><7ff><4><7f><7f><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><b>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRC_NOCLKOUT><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRC_CLKOUT><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRC_NOCLKOUT><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRC_CLKOUT><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown Out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><RB3 pin has digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function, low voltage programming enabled><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In_Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><2>
<SWITCH_INFO_TYPE><BOR4V><Brown-out Reset Selection bit><100><2>
<SETTING_VALUE_TYPE><BOR21V><Brown-out Reset set to 2.1V><0>
<SETTING_VALUE_TYPE><BOR40V><Brown-out Reset set to 4.0V><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><600><3>
<SETTING_VALUE_TYPE><HALF><0000h to 03FFh write protected, 0400h to 07FFh may be modified by EECON control><0>
<SETTING_VALUE_TYPE><1FOURTH><0000h to 00FFh write protected, 0100h to 07FFh may be modified by EECON control><200>
<SETTING_VALUE_TYPE><OFF><Write protection off><600>
<PART_INFO_TYPE><883f><PIC16F883><16xxxx><2><2><fff><4><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><b>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRC_NOCLKOUT><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRC_CLKOUT><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRC_NOCLKOUT><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRC_CLKOUT><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown Out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><RB3 pin has digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function, low voltage programming enabled><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In_Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><2>
<SWITCH_INFO_TYPE><BOR4V><Brown-out Reset Selection bit><100><2>
<SETTING_VALUE_TYPE><BOR21V><Brown-out Reset set to 2.1V><0>
<SETTING_VALUE_TYPE><BOR40V><Brown-out Reset set to 4.0V><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><600><4>
<SETTING_VALUE_TYPE><HALF><0000h to 07FFh write protected, 0800h to 0FFFh may be modified by EECON control><0>
<SETTING_VALUE_TYPE><1FOURTH><0000h to 03FFh write protected, 0400h to 0FFFh may be modified by EECON control><200>
<SETTING_VALUE_TYPE><256><0000h to 00FFh write protected, 0100h to 0FFFh may be modified by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off><600>
<PART_INFO_TYPE><884f><PIC16F884><16xxxx><2><2><fff><4><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><b>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRC_NOCLKOUT><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRC_CLKOUT><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRC_NOCLKOUT><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRC_CLKOUT><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown Out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><RB3 pin has digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function, low voltage programming enabled><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In_Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><2>
<SWITCH_INFO_TYPE><BOR4V><Brown-out Reset Selection bit><100><2>
<SETTING_VALUE_TYPE><BOR21V><Brown-out Reset set to 2.1V><0>
<SETTING_VALUE_TYPE><BOR40V><Brown-out Reset set to 4.0V><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><600><4>
<SETTING_VALUE_TYPE><HALF><0000h to 07FFh write protected, 0800h to 0FFFh may be modified by EECON control><0>
<SETTING_VALUE_TYPE><1FOURTH><0000h to 03FFh write protected, 0400h to 0FFFh may be modified by EECON control><200>
<SETTING_VALUE_TYPE><256><0000h to 00FFh write protected, 0100h to 0FFFh may be modified by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off><600>
<PART_INFO_TYPE><886f><PIC16F886><16xxxx><2><4><1fff><4><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><b>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRC_NOCLKOUT><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRC_CLKOUT><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRC_NOCLKOUT><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRC_CLKOUT><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown Out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><RB3 pin has digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function, low voltage programming enabled><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In_Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><2>
<SWITCH_INFO_TYPE><BOR4V><Brown-out Reset Selection bit><100><2>
<SETTING_VALUE_TYPE><BOR21V><Brown-out Reset set to 2.1V><0>
<SETTING_VALUE_TYPE><BOR40V><Brown-out Reset set to 4.0V><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><600><4>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write protected, 1000h to 1FFFh may be modified by EECON control><0>
<SETTING_VALUE_TYPE><1FOURTH><0000h to 07FFh write protected, 0800h to 1FFFh may be modified by EECON control><200>
<SETTING_VALUE_TYPE><256><0000h to 00FFh write protected, 0100h to 1FFFh may be modified by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off><600>
<PART_INFO_TYPE><887f><PIC16F887><16xxxx><2><4><1fff><4><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><b>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRC_NOCLKOUT><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRC_CLKOUT><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRC_NOCLKOUT><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRC_CLKOUT><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown Out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><RB3 pin has digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function, low voltage programming enabled><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In_Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><2>
<SWITCH_INFO_TYPE><BOR4V><Brown-out Reset Selection bit><100><2>
<SETTING_VALUE_TYPE><BOR21V><Brown-out Reset set to 2.1V><0>
<SETTING_VALUE_TYPE><BOR40V><Brown-out Reset set to 4.0V><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><600><4>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write protected, 1000h to 1FFFh may be modified by EECON control><0>
<SETTING_VALUE_TYPE><1FOURTH><0000h to 07FFh write protected, 0800h to 1FFFh may be modified by EECON control><200>
<SETTING_VALUE_TYPE><256><0000h to 00FFh write protected, 0100h to 1FFFh may be modified by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off><600>
<PART_INFO_TYPE><f913><PIC16F913><16xxxx><0><2><fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, CLKIN on RA7/OSC1/CLKIN/T1OSI><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, I/O function on RA7/OSC1/CLKIN/T1OSI><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT/T1OSO pin, I/O function on RA7/OSC1/CLKIN/T1OSI><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, RC on RA7/OSC1/CLKIN/T1OSI><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT/T1OSO pin, RC on RA7/OSC1/CLKIN/T1OSI><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power Up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><1000><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ISCPCLK and RB7/ICSPDAT are general purpose I/O pins><1000>
<PART_INFO_TYPE><f914><PIC16F914><16xxxx><0><2><fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, CLKIN on RA7/OSC1/CLKIN/T1OSI><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, I/O function on RA7/OSC1/CLKIN/T1OSI><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT/T1OSO pin, I/O function on RA7/OSC1/CLKIN/T1OSI><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, RC on RA7/OSC1/CLKIN/T1OSI><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT/T1OSO pin, RC on RA7/OSC1/CLKIN/T1OSI><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power Up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><1000><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ISCPCLK and RB7/ICSPDAT are general purpose I/O pins><1000>
<PART_INFO_TYPE><f916><PIC16F916><16xxxx><0><4><1fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, CLKIN on RA7/OSC1/CLKIN/T1OSI><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, I/O function on RA7/OSC1/CLKIN/T1OSI><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT/T1OSO pin, I/O function on RA7/OSC1/CLKIN/T1OSI><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, RC on RA7/OSC1/CLKIN/T1OSI><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT/T1OSO pin, RC on RA7/OSC1/CLKIN/T1OSI><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power Up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><1000><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ISCPCLK and RB7/ICSPDAT are general purpose I/O pins><1000>
<PART_INFO_TYPE><f917><PIC16F917><16xxxx><0><4><1fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, CLKIN on RA7/OSC1/CLKIN/T1OSI><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, I/O function on RA7/OSC1/CLKIN/T1OSI><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT/T1OSO pin, I/O function on RA7/OSC1/CLKIN/T1OSI><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, RC on RA7/OSC1/CLKIN/T1OSI><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT/T1OSO pin, RC on RA7/OSC1/CLKIN/T1OSI><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power Up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><1000><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ISCPCLK and RB7/ICSPDAT are general purpose I/O pins><1000>
<PART_INFO_TYPE><f946><PIC16F946><16xxxx><0><4><1fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT/T1OSO and RA7/OSC1/CLKIN/T1OSI><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, CLKIN on RA7/OSC1/CLKIN/T1OSI><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, I/O function on RA7/OSC1/CLKIN/T1OSI><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT/T1OSO pin, I/O function on RA7/OSC1/CLKIN/T1OSI><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT/T1OSO pin, RC on RA7/OSC1/CLKIN/T1OSI><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT/T1OSO pin, RC on RA7/OSC1/CLKIN/T1OSI><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power Up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><1000><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ISCPCLK and RB7/ICSPDAT are general purpose I/O pins><1000>
<PART_INFO_TYPE><6540><PIC16HV540><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<PART_INFO_TYPE><6610><PIC16HV610><16xxxx><0><0><3ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select bit><80><2>
<SETTING_VALUE_TYPE><4MHZ><4 MHz><0>
<SETTING_VALUE_TYPE><8MHZ><8 MHz><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR Disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<PART_INFO_TYPE><6616><PIC16HV616><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select bit><80><2>
<SETTING_VALUE_TYPE><4MHZ><4 MHz><0>
<SETTING_VALUE_TYPE><8MHZ><8 MHz><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR Disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<PART_INFO_TYPE><6753><PIC16HV753><16xxxx><0><1><7ff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><8>
<SWITCH_INFO_TYPE><FOSC0><FOSC: Oscillator Selection bit><1><2>
<SETTING_VALUE_TYPE><INT><Internal oscillator mode.  I/O function on RA5/CLKIN><0>
<SETTING_VALUE_TYPE><EC><EC oscillator mode.  CLKIN function on RA5/CLKIN><1>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Watchdog Timer disabled><0>
<SETTING_VALUE_TYPE><ON><Watchdog Timer enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><Power-up Timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power-up Timer disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function with internal weak pullup><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><300><3>
<SETTING_VALUE_TYPE><DIS><BOR disabled><0>
<SETTING_VALUE_TYPE><SLEEP_DIS><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><EN><BOR enabled><300>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bit><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFh self-write protected><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFh self-write protected><400>
<SETTING_VALUE_TYPE><FOURTH><000h to 0FFh self-write protected><800>
<SETTING_VALUE_TYPE><OFF><Flash self-write protection off><c00>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1000><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function enabled.  CLKOUT pin is CLKOUT><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function disabled.  CLKOUT pin acts as I/O><1000>
<PART_INFO_TYPE><6785><PIC16HV785><16xxxx><0><1><7ff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKINT><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin><6>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><300><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><SBODEN><BOR controlled by SBOREN bit of the PCON register><100>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><400><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode is enabled><400>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enabled bit><800><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><800>
<PART_INFO_TYPE><a454><PIC16LF1454><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 0FFFh write protected, 1000h to 1FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Selection Bit><30><4>
<SETTING_VALUE_TYPE><NOCLKDIV><NO CPU system divide><0>
<SETTING_VALUE_TYPE><CLKDIV2><CPU system clock divided by 2><10>
<SETTING_VALUE_TYPE><CLKDIV3><CPU system clock divided by 3><20>
<SETTING_VALUE_TYPE><CLKDIV6><CPU system clock divided by 6><30>
<SWITCH_INFO_TYPE><USBLSCLK><USB Low SPeed Clock Selection bit><40><2>
<SETTING_VALUE_TYPE><24MHz><System clock expects 24 MHz, FS/LS USB CLKENs divide-by is set to 4.><0>
<SETTING_VALUE_TYPE><48MHz><System clock expects 48 MHz, FS/LS USB CLKENs divide-by is set to 8.><40>
<SWITCH_INFO_TYPE><PLLMULT><PLL Multipler Selection Bit><80><2>
<SETTING_VALUE_TYPE><4x><4x Output Frequency Selected><0>
<SETTING_VALUE_TYPE><3x><3x Output Frequency Selected><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><DISABLED><3x or 4x PLL Disabled><0>
<SETTING_VALUE_TYPE><ENABLED><3x or 4x PLL Enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a455><PIC16LF1455><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 0FFFh write protected, 1000h to 1FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Selection Bit><30><4>
<SETTING_VALUE_TYPE><NOCLKDIV><NO CPU system divide><0>
<SETTING_VALUE_TYPE><CLKDIV2><CPU system clock divided by 2><10>
<SETTING_VALUE_TYPE><CLKDIV3><CPU system clock divided by 3><20>
<SETTING_VALUE_TYPE><CLKDIV6><CPU system clock divided by 6><30>
<SWITCH_INFO_TYPE><USBLSCLK><USB Low SPeed Clock Selection bit><40><2>
<SETTING_VALUE_TYPE><24MHz><System clock expects 24 MHz, FS/LS USB CLKENs divide-by is set to 4.><0>
<SETTING_VALUE_TYPE><48MHz><System clock expects 48 MHz, FS/LS USB CLKENs divide-by is set to 8.><40>
<SWITCH_INFO_TYPE><PLLMULT><PLL Multipler Selection Bit><80><2>
<SETTING_VALUE_TYPE><4x><4x Output Frequency Selected><0>
<SETTING_VALUE_TYPE><3x><3x Output Frequency Selected><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><DISABLED><3x or 4x PLL Disabled><0>
<SETTING_VALUE_TYPE><ENABLED><3x or 4x PLL Enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a459><PIC16LF1459><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 0FFFh write protected, 1000h to 1FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Selection Bit><30><4>
<SETTING_VALUE_TYPE><NOCLKDIV><NO CPU system divide><0>
<SETTING_VALUE_TYPE><CLKDIV2><CPU system clock divided by 2><10>
<SETTING_VALUE_TYPE><CLKDIV3><CPU system clock divided by 3><20>
<SETTING_VALUE_TYPE><CLKDIV6><CPU system clock divided by 6><30>
<SWITCH_INFO_TYPE><USBLSCLK><USB Low SPeed Clock Selection bit><40><2>
<SETTING_VALUE_TYPE><24MHz><System clock expects 24 MHz, FS/LS USB CLKENs divide-by is set to 4.><0>
<SETTING_VALUE_TYPE><48MHz><System clock expects 48 MHz, FS/LS USB CLKENs divide-by is set to 8.><40>
<SWITCH_INFO_TYPE><PLLMULT><PLL Multipler Selection Bit><80><2>
<SETTING_VALUE_TYPE><4x><4x Output Frequency Selected><0>
<SETTING_VALUE_TYPE><3x><3x Output Frequency Selected><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><DISABLED><3x or 4x PLL Disabled><0>
<SETTING_VALUE_TYPE><ENABLED><3x or 4x PLL Enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a503><PIC16LF1503><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a507><PIC16LF1507><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><Internal Oscillator, I/O function on OSC1><0>
<SETTING_VALUE_TYPE><ECL><External Clock, Low Power Mode><1>
<SETTING_VALUE_TYPE><ECM><External Clock, Medium Power Mode><2>
<SETTING_VALUE_TYPE><ECH><External Clock, High Power Mode><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a508><PIC16LF1508><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a509><PIC16LF1509><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a512><PIC16LF1512><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a513><PIC16LF1513><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a516><PIC16LF1516><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a517><PIC16LF1517><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a518><PIC16LF1518><16Exxx><2><8><3fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFFh write protected, 2000h to 3FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 3FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a519><PIC16LF1519><16Exxx><2><8><3fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFFh write protected, 2000h to 3FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 3FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a526><PIC16LF1526><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 2000h to 3FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 3FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a527><PIC16LF1527><16Exxx><2><8><3fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 2000h to 3FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 3FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a2b0><PIC16LF15313><16EXxx><2><1><7ff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><Reserved><Reserved><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><Reserved><Reserved><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><* half of user program memory><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2b1><PIC16LF15323><16EXxx><2><1><7ff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><Reserved><Reserved><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><Reserved><Reserved><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><* half of user program memory><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2ac><PIC16LF15324><16EXxx><2><2><fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><Reserved><Reserved><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><Reserved><Reserved><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><* half of user program memory><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2a0><PIC16LF15325><16EXxx><2><4><1fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><* half of user program memory><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2ad><PIC16LF15344><16EXxx><2><2><fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><Reserved><Reserved><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><Reserved><Reserved><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><* half of user program memory><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2a1><PIC16LF15345><16EXxx><2><4><1fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><* half of user program memory><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a282><PIC16LF15354><16EXxx><2><2><fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a281><PIC16LF15355><16EXxx><2><4><1fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a291><PIC16LF15356><16EXxx><2><8><3fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a293><PIC16LF15375><16EXxx><2><4><1fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><* half of user program memory><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a295><PIC16LF15376><16EXxx><2><8><3fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a297><PIC16LF15385><16EXxx><2><4><1fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a299><PIC16LF15386><16EXxx><2><8><3fff><40><7f><0><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><8>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a554><PIC16LF1554><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled. SWDTEN bit is ignored.><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep. SWDTEN bit is ignored.><10>
<SETTING_VALUE_TYPE><ON><WDT enabled. SWDTEN bit is ignored.><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled. SBOREN bit is ignored.><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep. SBOREN bit is ignored.><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), 2.7V trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), 1.9V trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a559><PIC16LF1559><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled. SWDTEN bit is ignored.><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep. SWDTEN bit is ignored.><10>
<SETTING_VALUE_TYPE><ON><WDT enabled. SWDTEN bit is ignored.><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled. SBOREN bit is ignored.><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep. SBOREN bit is ignored.><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), 2.7V trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), 1.9V trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a566><PIC16LF1566><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled. SWDTEN bit is ignored.><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep. SWDTEN bit is ignored.><10>
<SETTING_VALUE_TYPE><ON><WDT enabled. SWDTEN bit is ignored.><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled. SBOREN bit is ignored.><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep. SBOREN bit is ignored.><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), 2.7V trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), 1.9V trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a567><PIC16LF1567><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled. SWDTEN bit is ignored.><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep. SWDTEN bit is ignored.><10>
<SETTING_VALUE_TYPE><ON><WDT enabled. SWDTEN bit is ignored.><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled. SBOREN bit is ignored.><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep. SBOREN bit is ignored.><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), 2.7V trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), 1.9V trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a574><PIC16LF1574><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator; I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCKED Bit Can Be Cleared & Set Repeatedly><0>
<SETTING_VALUE_TYPE><ON><PPSLOCKED Bit Can Be Cleared & Set Once><4>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOREN><Low Power Brown-out Reset enable bit><800><2>
<SETTING_VALUE_TYPE><ON><LPBOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><LPBOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a575><PIC16LF1575><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator; I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCKED Bit Can Be Cleared & Set Repeatedly><0>
<SETTING_VALUE_TYPE><ON><PPSLOCKED Bit Can Be Cleared & Set Once><4>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOREN><Low Power Brown-out Reset enable bit><800><2>
<SETTING_VALUE_TYPE><ON><LPBOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><LPBOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a578><PIC16LF1578><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator; I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCKED Bit Can Be Cleared & Set Repeatedly><0>
<SETTING_VALUE_TYPE><ON><PPSLOCKED Bit Can Be Cleared & Set Once><4>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOREN><Low Power Brown-out Reset enable bit><800><2>
<SETTING_VALUE_TYPE><ON><LPBOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><LPBOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a579><PIC16LF1579><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator; I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCKED Bit Can Be Cleared & Set Repeatedly><0>
<SETTING_VALUE_TYPE><ON><PPSLOCKED Bit Can Be Cleared & Set Once><4>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOREN><Low Power Brown-out Reset enable bit><800><2>
<SETTING_VALUE_TYPE><ON><LPBOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><LPBOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a613><PIC16LF1613><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><3>
<CONFIGREG_INFO_TYPE><8007><0><3fff><6>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pins><3>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><3fff><7>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><ZCD><Zero Cross Detect Disable Bit><80><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disable.  ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select><1f><14>
<SETTING_VALUE_TYPE><WDTCPS0><1:32 (1 ms period)><0>
<SETTING_VALUE_TYPE><WDTCPS1><1:64 (2 ms period)><1>
<SETTING_VALUE_TYPE><WDTCPS2><1:128 (4 ms period)><2>
<SETTING_VALUE_TYPE><WDTCPS3><1:256 (8 ms period)><3>
<SETTING_VALUE_TYPE><WDTCPS4><1:512 (16 ms period)><4>
<SETTING_VALUE_TYPE><WDTCPS5><1:1024 (32 ms period)><5>
<SETTING_VALUE_TYPE><WDTCPS6><1:2048 (64 ms period)><6>
<SETTING_VALUE_TYPE><WDTCPS7><1:4096 (128 ms period)><7>
<SETTING_VALUE_TYPE><WDTCPS8><1:8192 (256 ms period)><8>
<SETTING_VALUE_TYPE><WDTCPS9><1:16384 (512 ms period)><9>
<SETTING_VALUE_TYPE><WDTCPSA><1:32768 (1 s period)><a>
<SETTING_VALUE_TYPE><WDTCPSB><1:65536 (2 s period)><b>
<SETTING_VALUE_TYPE><WDTCPSC><1:131072 (4 s period)><c>
<SETTING_VALUE_TYPE><WDTCPSD><1:262144 (8 s period)><d>
<SETTING_VALUE_TYPE><WDTCPSE><1:524299 (16 s period)><e>
<SETTING_VALUE_TYPE><WDTCPSF><1:1048576 (32 s period)><f>
<SETTING_VALUE_TYPE><WDTCPS10><1:2097152 (64 s period)><10>
<SETTING_VALUE_TYPE><WDTCPS11><1:4194304 (128 s period)><11>
<SETTING_VALUE_TYPE><WDTCPS12><1:8388608 (256 s period)><12>
<SETTING_VALUE_TYPE><WDTCPS1F><Software Control (WDTPS)><1f>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><60><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><40>
<SETTING_VALUE_TYPE><ON><WDT enabled><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select><700><8>
<SETTING_VALUE_TYPE><WDTCWS125><12.5 percent window open time><0>
<SETTING_VALUE_TYPE><WDTCWS25><25 percent window open time><100>
<SETTING_VALUE_TYPE><WDTCWS375><37.5 percent window open time><200>
<SETTING_VALUE_TYPE><WDTCWS50><50 percent window open time><300>
<SETTING_VALUE_TYPE><WDTCWS625><62.5 percent window open time><400>
<SETTING_VALUE_TYPE><WDTCWS75><75 percent window open time><500>
<SETTING_VALUE_TYPE><WDTCWS100><100 percent window open time (Legacy WDT) ><600>
<SETTING_VALUE_TYPE><WDTCWSSW><Software WDT window size control (WDTWS bits)><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT Input Clock Selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><31.25 kHz HFINTOSC (MFINTOSC)><800>
<SETTING_VALUE_TYPE><SWC><Software control, controlled by WDTCS bits><3800>
<PART_INFO_TYPE><a614><PIC16LF1614><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><3>
<CONFIGREG_INFO_TYPE><8007><0><3fff><6>
<SWITCH_INFO_TYPE><FOSC><><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><3>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero Cross Detect Disable Bit><80><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disable.  ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select><1f><14>
<SETTING_VALUE_TYPE><WDTCPS0><1:32 (1 ms period)><0>
<SETTING_VALUE_TYPE><WDTCPS1><1:64 (2 ms period)><1>
<SETTING_VALUE_TYPE><WDTCPS2><1:128 (4 ms period)><2>
<SETTING_VALUE_TYPE><WDTCPS3><1:256 (8 ms period)><3>
<SETTING_VALUE_TYPE><WDTCPS4><1:512 (16 ms period)><4>
<SETTING_VALUE_TYPE><WDTCPS5><1:1024 (32 ms period)><5>
<SETTING_VALUE_TYPE><WDTCPS6><1:2048 (64 ms period)><6>
<SETTING_VALUE_TYPE><WDTCPS7><1:4096 (128 ms period)><7>
<SETTING_VALUE_TYPE><WDTCPS8><1:8192 (256 ms period)><8>
<SETTING_VALUE_TYPE><WDTCPS9><1:16384 (512 ms period)><9>
<SETTING_VALUE_TYPE><WDTCPSA><1:32768 (1 s period)><a>
<SETTING_VALUE_TYPE><WDTCPSB><1:65536 (2 s period)><b>
<SETTING_VALUE_TYPE><WDTCPSC><1:131072 (4 s period)><c>
<SETTING_VALUE_TYPE><WDTCPSD><1:262144 (8 s period)><d>
<SETTING_VALUE_TYPE><WDTCPSE><1:524299 (16 s period)><e>
<SETTING_VALUE_TYPE><WDTCPSF><1:1048576 (32 s period)><f>
<SETTING_VALUE_TYPE><WDTCPS10><1:2097152 (64 s period)><10>
<SETTING_VALUE_TYPE><WDTCPS11><1:4194304 (128 s period)><11>
<SETTING_VALUE_TYPE><WDTCPS12><1:8388608 (256 s period)><12>
<SETTING_VALUE_TYPE><WDTCPS1F><Software Control (WDTPS)><1f>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><60><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><40>
<SETTING_VALUE_TYPE><ON><WDT enabled><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select><700><8>
<SETTING_VALUE_TYPE><WDTCWS125><12.5 percent window open time><0>
<SETTING_VALUE_TYPE><WDTCWS25><25 percent window open time><100>
<SETTING_VALUE_TYPE><WDTCWS375><37.5 percent window open time><200>
<SETTING_VALUE_TYPE><WDTCWS50><50 percent window open time><300>
<SETTING_VALUE_TYPE><WDTCWS625><62.5 percent window open time><400>
<SETTING_VALUE_TYPE><WDTCWS75><75 percent window open time><500>
<SETTING_VALUE_TYPE><WDTCWS100><100 percent window open time (Legacy WDT) ><600>
<SETTING_VALUE_TYPE><WDTCWSSW><Software WDT window size control (WDTWS bits)><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT Input Clock Selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><31.0kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><31.25 kHz HFINTOSC (MFINTOSC)><800>
<SETTING_VALUE_TYPE><SWC><Software control, controlled by WDTCS bits><3800>
<PART_INFO_TYPE><a615><PIC16LF1615><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><3>
<CONFIGREG_INFO_TYPE><8007><0><3fff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><5>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switch Over><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switch Over mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switch Over mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero Cross Detect Disable Bit><80><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disable.  ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select><1f><14>
<SETTING_VALUE_TYPE><WDTCPS0><1:32 (1 ms period)><0>
<SETTING_VALUE_TYPE><WDTCPS1><1:64 (2 ms period)><1>
<SETTING_VALUE_TYPE><WDTCPS2><1:128 (4 ms period)><2>
<SETTING_VALUE_TYPE><WDTCPS3><1:256 (8 ms period)><3>
<SETTING_VALUE_TYPE><WDTCPS4><1:512 (16 ms period)><4>
<SETTING_VALUE_TYPE><WDTCPS5><1:1024 (32 ms period)><5>
<SETTING_VALUE_TYPE><WDTCPS6><1:2048 (64 ms period)><6>
<SETTING_VALUE_TYPE><WDTCPS7><1:4096 (128 ms period)><7>
<SETTING_VALUE_TYPE><WDTCPS8><1:8192 (256 ms period)><8>
<SETTING_VALUE_TYPE><WDTCPS9><1:16384 (512 ms period)><9>
<SETTING_VALUE_TYPE><WDTCPSA><1:32768 (1 s period)><a>
<SETTING_VALUE_TYPE><WDTCPSB><1:65536 (2 s period)><b>
<SETTING_VALUE_TYPE><WDTCPSC><1:131072 (4 s period)><c>
<SETTING_VALUE_TYPE><WDTCPSD><1:262144 (8 s period)><d>
<SETTING_VALUE_TYPE><WDTCPSE><1:524299 (16 s period)><e>
<SETTING_VALUE_TYPE><WDTCPSF><1:1048576 (32 s period)><f>
<SETTING_VALUE_TYPE><WDTCPS10><1:2097152 (64 s period)><10>
<SETTING_VALUE_TYPE><WDTCPS11><1:4194304 (128 s period)><11>
<SETTING_VALUE_TYPE><WDTCPS12><1:8388608 (256 s period)><12>
<SETTING_VALUE_TYPE><WDTCPS1F><Software Control (WDTPS)><1f>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><60><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><40>
<SETTING_VALUE_TYPE><ON><WDT enabled><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select><700><8>
<SETTING_VALUE_TYPE><WDTCWS125><12.5 percent window open time><0>
<SETTING_VALUE_TYPE><WDTCWS25><25 percent window open time><100>
<SETTING_VALUE_TYPE><WDTCWS375><37.5 percent window open time><200>
<SETTING_VALUE_TYPE><WDTCWS50><50 percent window open time><300>
<SETTING_VALUE_TYPE><WDTCWS625><62.5 percent window open time><400>
<SETTING_VALUE_TYPE><WDTCWS75><75 percent window open time><500>
<SETTING_VALUE_TYPE><WDTCWS100><100 percent window open time (Legacy WDT) ><600>
<SETTING_VALUE_TYPE><WDTCWSSW><Software WDT window size control (WDTWS bits)><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT Input Clock Selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><31.0kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><31.25 kHz HFINTOSC (MFINTOSC)><800>
<SETTING_VALUE_TYPE><SWC><Software control, controlled by WDTCS bits><3800>
<PART_INFO_TYPE><a618><PIC16LF1618><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><3>
<CONFIGREG_INFO_TYPE><8007><0><3fff><6>
<SWITCH_INFO_TYPE><FOSC><><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><3>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero Cross Detect Disable Bit><80><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disable.  ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select><1f><14>
<SETTING_VALUE_TYPE><WDTCPS0><1:32 (1 ms period)><0>
<SETTING_VALUE_TYPE><WDTCPS1><1:64 (2 ms period)><1>
<SETTING_VALUE_TYPE><WDTCPS2><1:128 (4 ms period)><2>
<SETTING_VALUE_TYPE><WDTCPS3><1:256 (8 ms period)><3>
<SETTING_VALUE_TYPE><WDTCPS4><1:512 (16 ms period)><4>
<SETTING_VALUE_TYPE><WDTCPS5><1:1024 (32 ms period)><5>
<SETTING_VALUE_TYPE><WDTCPS6><1:2048 (64 ms period)><6>
<SETTING_VALUE_TYPE><WDTCPS7><1:4096 (128 ms period)><7>
<SETTING_VALUE_TYPE><WDTCPS8><1:8192 (256 ms period)><8>
<SETTING_VALUE_TYPE><WDTCPS9><1:16384 (512 ms period)><9>
<SETTING_VALUE_TYPE><WDTCPSA><1:32768 (1 s period)><a>
<SETTING_VALUE_TYPE><WDTCPSB><1:65536 (2 s period)><b>
<SETTING_VALUE_TYPE><WDTCPSC><1:131072 (4 s period)><c>
<SETTING_VALUE_TYPE><WDTCPSD><1:262144 (8 s period)><d>
<SETTING_VALUE_TYPE><WDTCPSE><1:524299 (16 s period)><e>
<SETTING_VALUE_TYPE><WDTCPSF><1:1048576 (32 s period)><f>
<SETTING_VALUE_TYPE><WDTCPS10><1:2097152 (64 s period)><10>
<SETTING_VALUE_TYPE><WDTCPS11><1:4194304 (128 s period)><11>
<SETTING_VALUE_TYPE><WDTCPS12><1:8388608 (256 s period)><12>
<SETTING_VALUE_TYPE><WDTCPS1F><Software Control (WDTPS)><1f>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><60><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><40>
<SETTING_VALUE_TYPE><ON><WDT enabled><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select><700><8>
<SETTING_VALUE_TYPE><WDTCWS125><12.5 percent window open time><0>
<SETTING_VALUE_TYPE><WDTCWS25><25 percent window open time><100>
<SETTING_VALUE_TYPE><WDTCWS375><37.5 percent window open time><200>
<SETTING_VALUE_TYPE><WDTCWS50><50 percent window open time><300>
<SETTING_VALUE_TYPE><WDTCWS625><62.5 percent window open time><400>
<SETTING_VALUE_TYPE><WDTCWS75><75 percent window open time><500>
<SETTING_VALUE_TYPE><WDTCWS100><100 percent window open time (Legacy WDT) ><600>
<SETTING_VALUE_TYPE><WDTCWSSW><Software WDT window size control (WDTWS bits)><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT Input Clock Selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><31.0kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><31.25 kHz HFINTOSC (MFINTOSC)><800>
<SETTING_VALUE_TYPE><SWC><Software control, controlled by WDTCS bits><3800>
<PART_INFO_TYPE><a619><PIC16LF1619><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><3>
<CONFIGREG_INFO_TYPE><8007><0><3fff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><5>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switch Over><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switch Over mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switch Over mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero Cross Detect Disable Bit><80><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disable.  ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><80>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable Bit><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select><1f><14>
<SETTING_VALUE_TYPE><WDTCPS0><1:32 (1 ms period)><0>
<SETTING_VALUE_TYPE><WDTCPS1><1:64 (2 ms period)><1>
<SETTING_VALUE_TYPE><WDTCPS2><1:128 (4 ms period)><2>
<SETTING_VALUE_TYPE><WDTCPS3><1:256 (8 ms period)><3>
<SETTING_VALUE_TYPE><WDTCPS4><1:512 (16 ms period)><4>
<SETTING_VALUE_TYPE><WDTCPS5><1:1024 (32 ms period)><5>
<SETTING_VALUE_TYPE><WDTCPS6><1:2048 (64 ms period)><6>
<SETTING_VALUE_TYPE><WDTCPS7><1:4096 (128 ms period)><7>
<SETTING_VALUE_TYPE><WDTCPS8><1:8192 (256 ms period)><8>
<SETTING_VALUE_TYPE><WDTCPS9><1:16384 (512 ms period)><9>
<SETTING_VALUE_TYPE><WDTCPSA><1:32768 (1 s period)><a>
<SETTING_VALUE_TYPE><WDTCPSB><1:65536 (2 s period)><b>
<SETTING_VALUE_TYPE><WDTCPSC><1:131072 (4 s period)><c>
<SETTING_VALUE_TYPE><WDTCPSD><1:262144 (8 s period)><d>
<SETTING_VALUE_TYPE><WDTCPSE><1:524299 (16 s period)><e>
<SETTING_VALUE_TYPE><WDTCPSF><1:1048576 (32 s period)><f>
<SETTING_VALUE_TYPE><WDTCPS10><1:2097152 (64 s period)><10>
<SETTING_VALUE_TYPE><WDTCPS11><1:4194304 (128 s period)><11>
<SETTING_VALUE_TYPE><WDTCPS12><1:8388608 (256 s period)><12>
<SETTING_VALUE_TYPE><WDTCPS1F><Software Control (WDTPS)><1f>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><60><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><40>
<SETTING_VALUE_TYPE><ON><WDT enabled><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select><700><8>
<SETTING_VALUE_TYPE><WDTCWS125><12.5 percent window open time><0>
<SETTING_VALUE_TYPE><WDTCWS25><25 percent window open time><100>
<SETTING_VALUE_TYPE><WDTCWS375><37.5 percent window open time><200>
<SETTING_VALUE_TYPE><WDTCWS50><50 percent window open time><300>
<SETTING_VALUE_TYPE><WDTCWS625><62.5 percent window open time><400>
<SETTING_VALUE_TYPE><WDTCWS75><75 percent window open time><500>
<SETTING_VALUE_TYPE><WDTCWS100><100 percent window open time (Legacy WDT) ><600>
<SETTING_VALUE_TYPE><WDTCWSSW><Software WDT window size control (WDTWS bits)><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT Input Clock Selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><31.0kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><31.25 kHz HFINTOSC (MFINTOSC)><800>
<SETTING_VALUE_TYPE><SWC><Software control, controlled by WDTCS bits><3800>
<PART_INFO_TYPE><a703><PIC16LF1703><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><Internal HFINTOSC. I/O function on RA4 and RA5.><0>
<SETTING_VALUE_TYPE><ECL><External oscillator, low power. I/O function on RA4><1>
<SETTING_VALUE_TYPE><ECM><External oscillator, medium power. I/O function on RA4><2>
<SETTING_VALUE_TYPE><ECH><External oscillator, high power. I/O function on RA4><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a704><PIC16LF1704><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><3fff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a705><PIC16LF1705><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a707><PIC16LF1707><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><3><4>
<SETTING_VALUE_TYPE><INTOSC><Internal HFINTOSC. I/O function on RA4 and RA5.><0>
<SETTING_VALUE_TYPE><ECL><External oscillator, low power. I/O function on RA4><1>
<SETTING_VALUE_TYPE><ECM><External oscillator, medium power. I/O function on RA4><2>
<SETTING_VALUE_TYPE><ECH><External oscillator, high power. I/O function on RA4><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a708><PIC16LF1708><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><3fff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a709><PIC16LF1709><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a713><PIC16LF1713><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input if LVP bit is also 0.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is always enabled.><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR and can be enabled with ZCDSEN bit.><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><b716><PIC16LF1716><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input if LVP bit is also 0.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 03FFh write protected, 0400h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is always enabled.><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR and can be enabled with ZCDSEN bit.><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a717><PIC16LF1717><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input if LVP bit is also 0.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 03FFh write protected, 0400h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is always enabled.><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR and can be enabled with ZCDSEN bit.><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a718><PIC16LF1718><16Exxx><2><8><3fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input if LVP bit is also 0.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 03FFh write protected, 0400h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is always enabled.><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR and can be enabled with ZCDSEN bit.><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a719><PIC16LF1719><16Exxx><2><8><3fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input if LVP bit is also 0.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 03FFh write protected, 0400h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is always enabled.><0>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is disabled at POR and can be enabled with ZCDSEN bit.><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a764><PIC16LF1764><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a765><PIC16LF1765><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a768><PIC16LF1768><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a769><PIC16LF1769><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a773><PIC16LF1773><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a776><PIC16LF1776><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a26d><PIC16LF1777><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a778><PIC16LF1778><16Exxx><2><8><3fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a779><PIC16LF1779><16Exxx><2><8><3fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection Bits><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover Mode><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover Mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover Mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><8>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><4><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit cannot be cleared once it is set by software><4>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><80><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is enabled at POR><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR><80>
<SWITCH_INFO_TYPE><PLLEN><Phase Lock Loop enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL is enabled when software sets the SPLLEN bit><0>
<SETTING_VALUE_TYPE><ON><4x PLL is always enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown Out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a782><PIC16LF1782><16Exxx><2><1><7ff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 3FFh write protected, 400h to 7FFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 7FFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low Power Brown-Out Reset Enable Bit><800><2>
<SETTING_VALUE_TYPE><ON><Low power brown-out is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power brown-out is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a783><PIC16LF1783><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low Power Brown-Out Reset Enable Bit><800><2>
<SETTING_VALUE_TYPE><ON><Low power brown-out is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power brown-out is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a784><PIC16LF1784><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low Power Brown-Out Reset Enable Bit><800><2>
<SETTING_VALUE_TYPE><ON><Low power brown-out is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power brown-out is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a786><PIC16LF1786><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low Power Brown-Out Reset Enable Bit><800><2>
<SETTING_VALUE_TYPE><ON><Low power brown-out is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power brown-out is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a787><PIC16LF1787><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low Power Brown-Out Reset Enable Bit><800><2>
<SETTING_VALUE_TYPE><ON><Low power brown-out is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power brown-out is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a788><PIC16LF1788><16Exxx><2><8><3fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low Power Brown-Out Reset Enable Bit><800><2>
<SETTING_VALUE_TYPE><ON><Low power brown-out is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power brown-out is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a789><PIC16LF1789><16Exxx><2><8><3fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><6>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low Power Brown-Out Reset Enable Bit><800><2>
<SETTING_VALUE_TYPE><ON><Low power brown-out is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power brown-out is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a823><PIC16LF1823><16Exxx><2><1><7ff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 3FFh write protected, 400h to 7FFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 7FFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a824><PIC16LF1824><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><c824><PIC16LF1824T39A><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a825><PIC16LF1825><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a826><PIC16LF1826><16Exxx><2><1><7ff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 3FFh write protected, 400h to 7FFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 7FFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a827><PIC16LF1827><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a828><PIC16LF1828><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a829><PIC16LF1829><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a832><PIC16LF18313><16Exxx><a><1><7ff><20><7f><ff><0-0><0-0><0><4>
<CONFIGREG_INFO_TYPE><8007><0><ffff><5>
<SWITCH_INFO_TYPE><FEXTOSC><FEXTOSC External Oscillator mode Selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) from 100 kHz to 4 MHz><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4 MHz><2>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 100 kHz to 8 MHz><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><6>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with 2x PLL (32MHz)><0>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><10>
<SETTING_VALUE_TYPE><SOSC><SOSC (31kHz)><30>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC (31kHz)><40>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; I/O or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of port pin's WPU control bit.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR; Weak pull-up enabled ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bits><c><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><4>
<SETTING_VALUE_TYPE><SLEEP><WDT enabled while running and disabled while in SLEEP/IDLE; SWDTEN is ignored><8>
<SETTING_VALUE_TYPE><ON><WDT enabled, SWDTEN is ignored><c>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><SLEEP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled, SBOREN bit ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><200><2>
<SETTING_VALUE_TYPE><HIGH><Brown-out voltage (Vbor) set to 2.7V><0>
<SETTING_VALUE_TYPE><LOW><Brown-out voltage (Vbor) set to 2.45V><200>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Debugger enable bit><2000><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><ffff><2>
<SWITCH_INFO_TYPE><WRT><User NVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 07FFh write protected, no addresses may be modified><0>
<SETTING_VALUE_TYPE><HALF><0000h to 03FFh write-protected, 0400h to 07FFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 01FFh write-protected, 0200h to 07FFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming.><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored.><2000>
<CONFIGREG_INFO_TYPE><800a><0><ffff><2>
<SWITCH_INFO_TYPE><CP><User NVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><User NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><User NVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><Data NVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data NVM code protection disabled><2>
<PART_INFO_TYPE><a833><PIC16LF18323><16Exxx><a><1><7ff><20><7f><ff><0-0><0-0><0><4>
<CONFIGREG_INFO_TYPE><8007><0><ffff><5>
<SWITCH_INFO_TYPE><FEXTOSC><FEXTOSC External Oscillator mode Selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) from 100 kHz to 4 MHz><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4 MHz><2>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 100 kHz to 8 MHz><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><6>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with 2x PLL (32MHz)><0>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><10>
<SETTING_VALUE_TYPE><SOSC><SOSC (31kHz)><30>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC (31kHz)><40>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; I/O or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of port pin's WPU control bit.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR; Weak pull-up enabled><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bits><c><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><4>
<SETTING_VALUE_TYPE><SLEEP><WDT enabled while running and disabled in SLEEP/IDLE; SWDTEN is ignored><8>
<SETTING_VALUE_TYPE><ON><WDT enabled, SWDTEN is ignored><c>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><SLEEP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled, SBOREN bit ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><200><2>
<SETTING_VALUE_TYPE><HIGH><Brown-out voltage (Vbor) set to 2.7V><0>
<SETTING_VALUE_TYPE><LOW><Brown-out voltage (Vbor) set to 2.45V><200>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Debugger enable bit><2000><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><ffff><2>
<SWITCH_INFO_TYPE><WRT><User NVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 07FFh write protected, no addresses may be modified><0>
<SETTING_VALUE_TYPE><HALF><0000h to 03FFh write-protected, 0400h to 07FFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 01FFh write-protected, 0200h to 07FFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/VPP must be used for programming.><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored.><2000>
<CONFIGREG_INFO_TYPE><800a><0><ffff><2>
<SWITCH_INFO_TYPE><CP><User NVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><User NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><User NVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><Data NVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data NVM code protection disabled><2>
<PART_INFO_TYPE><a324><PIC16LF18324><16Exxx><a><2><fff><20><7f><ff><0-0><0-0><0><4>
<CONFIGREG_INFO_TYPE><8007><0><ffff><5>
<SWITCH_INFO_TYPE><FEXTOSC><FEXTOSC External Oscillator mode Selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) from 100 kHz to 4 MHz><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4 MHz><2>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 100 kHz to 8 MHz><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><6>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with 2x PLL (32MHz)><0>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><10>
<SETTING_VALUE_TYPE><SOSC><SOSC (31kHz)><30>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC (31kHz)><40>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits ><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; I/O or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of port pin's WPU control bit.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR; Weak pull-up enabled><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bits><c><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><4>
<SETTING_VALUE_TYPE><SLEEP><WDT enabled while running and disabled in SLEEP/IDLE; SWDTEN is ignored><8>
<SETTING_VALUE_TYPE><ON><WDT enabled, SWDTEN is ignored><c>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><SLEEP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled, SBOREN bit ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><200><2>
<SETTING_VALUE_TYPE><HIGH><Brown-out voltage (Vbor) set to 2.7V><0>
<SETTING_VALUE_TYPE><LOW><Brown-out voltage (Vbor) set to 2.45V><200>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Debugger enable bit><2000><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><ffff><2>
<SWITCH_INFO_TYPE><WRT><User NVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 0FFFh write protected, no addresses may be modified><0>
<SETTING_VALUE_TYPE><HALF><0000h to 07FFh write-protected, 0800h to 0FFFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 01FFh write-protected, 0200h to 0FFFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/VPP must be used for programming.><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored.><2000>
<CONFIGREG_INFO_TYPE><800a><0><ffff><2>
<SWITCH_INFO_TYPE><CP><User NVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><User NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><User NVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><Data NVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data NVM code protection disabled><2>
<PART_INFO_TYPE><a325><PIC16LF18325><16Exxx><a><4><1fff><20><7f><ff><0-0><0-0><0><4>
<CONFIGREG_INFO_TYPE><8007><0><ffff><5>
<SWITCH_INFO_TYPE><FEXTOSC><FEXTOSC External Oscillator mode Selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) from 100 kHz to 4 MHz><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4 MHz><2>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 100 kHz to 8 MHz><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><6>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with 2x PLL (32MHz)><0>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><10>
<SETTING_VALUE_TYPE><SOSC><SOSC (31kHz)><30>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC (31kHz)><40>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits ><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; I/O or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of port pin's WPU control bit.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR; Weak pull-up enabled><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bits><c><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><4>
<SETTING_VALUE_TYPE><SLEEP><WDT enabled while running and disabled in SLEEP/IDLE; SWDTEN is ignored><8>
<SETTING_VALUE_TYPE><ON><WDT enabled, SWDTEN is ignored><c>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><SLEEP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled, SBOREN bit ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><200><2>
<SETTING_VALUE_TYPE><HIGH><Brown-out voltage (Vbor) set to 2.7V><0>
<SETTING_VALUE_TYPE><LOW><Brown-out voltage (Vbor) set to 2.45V><200>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Debugger enable bit><2000><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><ffff><2>
<SWITCH_INFO_TYPE><WRT><User NVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh write protected, no addresses may be modified><0>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write-protected, 1000h to 1FFFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 01FFh write-protected, 0200h to 1FFFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/VPP must be used for programming.><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored.><2000>
<CONFIGREG_INFO_TYPE><800a><0><ffff><2>
<SWITCH_INFO_TYPE><CP><User NVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><User NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><User NVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><Data NVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data NVM code protection disabled><2>
<PART_INFO_TYPE><a274><PIC16LF18326><16Exxx><a><8><3fff><20><7f><ff><0-0><0-0><0><4>
<CONFIGREG_INFO_TYPE><8007><0><ffff><5>
<SWITCH_INFO_TYPE><FEXTOSC><FEXTOSC External Oscillator mode Selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) from 100 kHz to 4 MHz><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4 MHz><2>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 100 kHz to 8 MHz><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><6>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with 2x PLL (32MHz)><0>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><10>
<SETTING_VALUE_TYPE><SOSC><SOSC (31kHz)><30>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC (31kHz)><40>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits ><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; I/O or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of port pin's WPU control bit.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR; Weak pull-up enabled><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bits><c><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><4>
<SETTING_VALUE_TYPE><SLEEP><WDT enabled while running and disabled in SLEEP/IDLE; SWDTEN is ignored><8>
<SETTING_VALUE_TYPE><ON><WDT enabled, SWDTEN is ignored><c>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><SLEEP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled, SBOREN bit ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><200><2>
<SETTING_VALUE_TYPE><HIGH><Brown-out voltage (Vbor) set to 2.7V><0>
<SETTING_VALUE_TYPE><LOW><Brown-out voltage (Vbor) set to 2.45V><200>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Debugger enable bit><2000><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><ffff><2>
<SWITCH_INFO_TYPE><WRT><User NVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 3FFFh write protected, no addresses may be modified><0>
<SETTING_VALUE_TYPE><HALF><0000h to 1FFFh write-protected, 2000h to 3FFFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 01FFh write-protected, 0200h to 3FFFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/VPP must be used for programming.><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored.><2000>
<CONFIGREG_INFO_TYPE><800a><0><ffff><2>
<SWITCH_INFO_TYPE><CP><User NVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><User NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><User NVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><Data NVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data NVM code protection disabled><2>
<PART_INFO_TYPE><a344><PIC16LF18344><16Exxx><a><2><fff><20><7f><ff><0-0><0-0><0><4>
<CONFIGREG_INFO_TYPE><8007><0><ffff><5>
<SWITCH_INFO_TYPE><FEXTOSC><FEXTOSC External Oscillator mode Selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) from 100 kHz to 4 MHz><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4 MHz><2>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 100 kHz to 8 MHz><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><6>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with 2x PLL (32MHz)><0>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><10>
<SETTING_VALUE_TYPE><SOSC><SOSC (31kHz)><30>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC (31kHz)><40>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits ><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; I/O or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of port pin's WPU control bit.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR; Weak pull-up enabled><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bits><c><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><4>
<SETTING_VALUE_TYPE><SLEEP><WDT enabled while running and disabled in SLEEP/IDLE; SWDTEN is ignored><8>
<SETTING_VALUE_TYPE><ON><WDT enabled, SWDTEN is ignored><c>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><SLEEP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled, SBOREN bit ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><200><2>
<SETTING_VALUE_TYPE><HIGH><Brown-out voltage (Vbor) set to 2.7V><0>
<SETTING_VALUE_TYPE><LOW><Brown-out voltage (Vbor) set to 2.45V><200>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Debugger enable bit><2000><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><ffff><2>
<SWITCH_INFO_TYPE><WRT><User NVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 0FFFh write protected, no addresses may be modified><0>
<SETTING_VALUE_TYPE><HALF><0000h to 07FFh write-protected, 0800h to 0FFFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 01FFh write-protected, 0200h to 0FFFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/VPP must be used for programming.><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored.><2000>
<CONFIGREG_INFO_TYPE><800a><0><ffff><2>
<SWITCH_INFO_TYPE><CP><User NVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><User NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><User NVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><Data NVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data NVM code protection disabled><2>
<PART_INFO_TYPE><a345><PIC16LF18345><16Exxx><a><4><1fff><20><7f><ff><0-0><0-0><0><4>
<CONFIGREG_INFO_TYPE><8007><0><ffff><5>
<SWITCH_INFO_TYPE><FEXTOSC><FEXTOSC External Oscillator mode Selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) from 100 kHz to 4 MHz><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4 MHz><2>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 100 kHz to 8 MHz><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><6>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with 2x PLL (32MHz)><0>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><10>
<SETTING_VALUE_TYPE><SOSC><SOSC (31kHz)><30>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC (31kHz)><40>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits ><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; I/O or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of port pin's WPU control bit.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR; Weak pull-up enabled><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bits><c><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><4>
<SETTING_VALUE_TYPE><SLEEP><WDT enabled while running and disabled in SLEEP/IDLE; SWDTEN is ignored><8>
<SETTING_VALUE_TYPE><ON><WDT enabled, SWDTEN is ignored><c>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><SLEEP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled, SBOREN bit ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><200><2>
<SETTING_VALUE_TYPE><HIGH><Brown-out voltage (Vbor) set to 2.7V><0>
<SETTING_VALUE_TYPE><LOW><Brown-out voltage (Vbor) set to 2.45V><200>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Debugger enable bit><2000><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><ffff><2>
<SWITCH_INFO_TYPE><WRT><User NVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh write protected, no addresses may be modified><0>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write-protected, 1000h to 1FFFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 01FFh write-protected, 0200h to 1FFFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/VPP must be used for programming.><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored.><2000>
<CONFIGREG_INFO_TYPE><800a><0><ffff><2>
<SWITCH_INFO_TYPE><CP><User NVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><User NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><User NVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><Data NVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data NVM code protection disabled><2>
<PART_INFO_TYPE><a275><PIC16LF18346><16Exxx><a><8><3fff><20><7f><ff><0-0><0-0><0><4>
<CONFIGREG_INFO_TYPE><8007><0><ffff><5>
<SWITCH_INFO_TYPE><FEXTOSC><FEXTOSC External Oscillator mode Selection bits><7><7>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) from 100 kHz to 4 MHz><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4 MHz><2>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 100 kHz to 8 MHz><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><6>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with 2x PLL (32MHz)><0>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><10>
<SETTING_VALUE_TYPE><SOSC><SOSC (31kHz)><30>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC (31kHz)><40>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits ><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; I/O or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of port pin's WPU control bit.><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR; Weak pull-up enabled><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bits><c><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><4>
<SETTING_VALUE_TYPE><SLEEP><WDT enabled while running and disabled in SLEEP/IDLE; SWDTEN is ignored><8>
<SETTING_VALUE_TYPE><ON><WDT enabled, SWDTEN is ignored><c>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><SLEEP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled, SBOREN bit ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><200><2>
<SETTING_VALUE_TYPE><HIGH><Brown-out voltage (Vbor) set to 2.7V><0>
<SETTING_VALUE_TYPE><LOW><Brown-out voltage (Vbor) set to 2.45V><200>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Debugger enable bit><2000><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><ffff><2>
<SWITCH_INFO_TYPE><WRT><User NVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ALL><0000h to 3FFFh write protected, no addresses may be modified><0>
<SETTING_VALUE_TYPE><HALF><0000h to 1FFFh write-protected, 2000h to 3FFFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0000h to 01FFh write-protected, 0200h to 3FFFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/VPP must be used for programming.><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored.><2000>
<CONFIGREG_INFO_TYPE><800a><0><ffff><2>
<SWITCH_INFO_TYPE><CP><User NVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><User NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><User NVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><Data NVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data NVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data NVM code protection disabled><2>
<PART_INFO_TYPE><a2dc><PIC16LF18424><16EXxx><a><2><fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up Timer Enable bit><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V><200>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM write protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2de><PIC16LF18425><16EXxx><a><4><1fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up Timer Enable bit><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V><200>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM write protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2d7><PIC16LF18426><16EXxx><a><8><3fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up Timer Enable bit><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V><200>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM write protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2e0><PIC16LF18444><16EXxx><a><2><fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up Timer Enable bit><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM write protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2da><PIC16LF18445><16EXxx><a><4><1fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up Timer Enable bit><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM write protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2d9><PIC16LF18446><16EXxx><a><8><3fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up Timer Enable bit><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM write protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2e5><PIC16LF18455><16EXxx><a><4><1fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up Timer Enable bit><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V><200>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM write protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2e6><PIC16LF18456><16EXxx><a><8><3fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up Timer Enable bit><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V><200>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the 32kHz secondary oscillator><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><BB64K><* half of user program memory><0>
<SETTING_VALUE_TYPE><BB32K><* half of user program memory><1>
<SETTING_VALUE_TYPE><BB16K><* half of user program memory><2>
<SETTING_VALUE_TYPE><BB8K><8192 words boot block size><3>
<SETTING_VALUE_TYPE><BB4K><4096 words boot block size><4>
<SETTING_VALUE_TYPE><BB2K><2048 words boot block size><5>
<SETTING_VALUE_TYPE><BB1K><1024 words boot block size><6>
<SETTING_VALUE_TYPE><BB512><512 words boot block size><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block not write protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Register write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Register not write protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM write protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not write protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a847><PIC16LF1847><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a854><PIC16LF18854><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger><2000><2>
<SETTING_VALUE_TYPE><ON><background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><3>
<SWITCH_INFO_TYPE><WRT><UserNVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ON><0x0000 to 0x0FFF write protected><0>
<SETTING_VALUE_TYPE><WRT_lower><0x0000 to x07FF write protected><1>
<SETTING_VALUE_TYPE><WRT_upper><0x0000 to 0x01FF write protected><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><1000><2>
<SETTING_VALUE_TYPE><not_available><Scanner module is not available for use><0>
<SETTING_VALUE_TYPE><available><Scanner module is available for use><1000>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM code protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection disabled><2>
<PART_INFO_TYPE><a855><PIC16LF18855><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><a>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger><2000><2>
<SETTING_VALUE_TYPE><ON><background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><3>
<SWITCH_INFO_TYPE><WRT><UserNVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ON><0x0000 to 0x1FFF write protected><0>
<SETTING_VALUE_TYPE><WRT_lower><0x0000 to x0FFF write protected><1>
<SETTING_VALUE_TYPE><WRT_upper><0x0000 to 0x01FF write protected><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><1000><2>
<SETTING_VALUE_TYPE><not_available><Scanner module is not available for use><0>
<SETTING_VALUE_TYPE><available><Scanner module is available for use><1000>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM code protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection disabled><2>
<PART_INFO_TYPE><a856><PIC16LF18856><16Exxx><2><8><3fff><20><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ = 32MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger><2000><2>
<SETTING_VALUE_TYPE><ON><background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><3>
<SWITCH_INFO_TYPE><WRT><UserNVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ON><0x0000 to 0x3FFF write protected><0>
<SETTING_VALUE_TYPE><WRT_lower><0x0000 to x1FFF write protected><1>
<SETTING_VALUE_TYPE><WRT_upper><0x0000 to 0x01FF write protected><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><1000><2>
<SETTING_VALUE_TYPE><not_available><Scanner module is not available for use><0>
<SETTING_VALUE_TYPE><available><Scanner module is available for use><1000>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM code protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection disabled><2>
<PART_INFO_TYPE><a857><PIC16LF18857><16EXxx><2><10><7fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><a>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger><2000><2>
<SETTING_VALUE_TYPE><ON><background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><3>
<SWITCH_INFO_TYPE><WRT><UserNVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ON><0x0000 to 0x7FFF write protected><0>
<SETTING_VALUE_TYPE><WRT_lower><0x0000 to x3FFF write protected><1>
<SETTING_VALUE_TYPE><WRT_upper><0x0000 to 0x01FF write protected><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><1000><2>
<SETTING_VALUE_TYPE><not_available><Scanner module is not available for use><0>
<SETTING_VALUE_TYPE><available><Scanner module is available for use><1000>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM code protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection disabled><2>
<PART_INFO_TYPE><a875><PIC16LF18875><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><a>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger><2000><2>
<SETTING_VALUE_TYPE><ON><background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><3>
<SWITCH_INFO_TYPE><WRT><UserNVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ON><0x0000 to 0x1FFF write protected><0>
<SETTING_VALUE_TYPE><WRT_lower><0x0000 to x0FFF write protected><1>
<SETTING_VALUE_TYPE><WRT_upper><0x0000 to 0x01FF write protected><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><1000><2>
<SETTING_VALUE_TYPE><not_available><Scanner module is not available for use><0>
<SETTING_VALUE_TYPE><available><Scanner module is available for use><1000>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM code protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection disabled><2>
<PART_INFO_TYPE><a876><PIC16LF18876><16Exxx><2><8><3fff><20><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ = 32MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL and OSCFRQ = 16MHz and CDIV=1:1 (FOSC=32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><9>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger><2000><2>
<SETTING_VALUE_TYPE><ON><background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><3>
<SWITCH_INFO_TYPE><WRT><UserNVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ON><0x0000 to 0x3FFF write protected><0>
<SETTING_VALUE_TYPE><WRT_lower><0x0000 to x1FFF write protected><1>
<SETTING_VALUE_TYPE><WRT_upper><0x0000 to 0x01FF write protected><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><1000><2>
<SETTING_VALUE_TYPE><not_available><Scanner module is not available for use><0>
<SETTING_VALUE_TYPE><available><Scanner module is available for use><1000>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM code protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<PART_INFO_TYPE><a877><PIC16LF18877><16EXxx><2><10><7fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><5>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 4MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><Reserved><Reserved><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><a>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><ZCDDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger><2000><2>
<SETTING_VALUE_TYPE><ON><background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><3>
<SWITCH_INFO_TYPE><WRT><UserNVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ON><0x0000 to 0x7FFF write protected><0>
<SETTING_VALUE_TYPE><WRT_lower><0x0000 to x3FFF write protected><1>
<SETTING_VALUE_TYPE><WRT_upper><0x0000 to 0x01FF write protected><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><1000><2>
<SETTING_VALUE_TYPE><not_available><Scanner module is not available for use><0>
<SETTING_VALUE_TYPE><available><Scanner module is available for use><1000>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM code protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection disabled><2>
<PART_INFO_TYPE><a902><PIC16LF1902><16Exxx><2><1><7ff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 3FFh write protected, 400h to 7FFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 7FFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown-out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a903><PIC16LF1903><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 3FFh write protected, 400h to 7FFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 7FFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown-out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a904><PIC16LF1904><16Exxx><2><2><fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown-out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a906><PIC16LF1906><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown-out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a907><PIC16LF1907><16Exxx><2><4><1fff><20><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><3><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><0>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><1>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><2>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by PMCON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by PMCON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LPBOR><Low-Power Brown-out Reset><800><2>
<SETTING_VALUE_TYPE><ON><Low-Power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power BOR is disabled><800>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a2b8><PIC16LF19155><16EXxx><2><4><1fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2b9><PIC16LF19156><16EXxx><2><8><3fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2ba><PIC16LF19175><16EXxx><2><4><1fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2bb><PIC16LF19176><16EXxx><2><8><3fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2bc><PIC16LF19185><16EXxx><2><4><1fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a2bd><PIC16LF19186><16EXxx><2><8><3fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a27c><PIC16LF19195><16EXxx><2><4><1fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a27d><PIC16LF19196><16EXxx><2><8><3fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a27e><PIC16LF19197><16EXxx><2><10><7fff><40><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><7>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode selection bits><7><4>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><0>
<SETTING_VALUE_TYPE><ECL><EC below 500kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC for 500kHz to 8MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC above 8MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINT32><HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><HFINTPLL><HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz)><10>
<SETTING_VALUE_TYPE><EXT4X><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><Reserved><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><SOSC><40>
<SETTING_VALUE_TYPE><LFINT><LFINTOSC><50>
<SETTING_VALUE_TYPE><HFINT1><HFINTOSC (1MHz)><60>
<SETTING_VALUE_TYPE><EXT1X><EXTOSC operating per FEXTOSC bits><70>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><100><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled; FOSC/4 clock appears at OSC2><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled; i/o or oscillator function on OSC2><100>
<SWITCH_INFO_TYPE><VBATEN><VBAT Pin Enable bit><200><2>
<SETTING_VALUE_TYPE><ON><VBAT functionality is enabled><0>
<SETTING_VALUE_TYPE><OFF><VBAT functionality is disabled><200>
<SWITCH_INFO_TYPE><LCDPEN><LCD Charge Pump Mode bit><400><2>
<SETTING_VALUE_TYPE><OFF><LCD Charge Pump is disabled.><0>
<SETTING_VALUE_TYPE><ON><LCD Charge Pump is enabled><400>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><FSCM timer disabled><0>
<SETTING_VALUE_TYPE><ON><FSCM timer enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1 ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16 ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64 ms><4>
<SETTING_VALUE_TYPE><OFF><PWRT disable><6>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><200><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (VBOR) is set to 2.7V><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices><200>
<SWITCH_INFO_TYPE><ZCD><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Zero-cross detect circuit is always enabled><0>
<SETTING_VALUE_TYPE><OFF><Zero-cross detect circuit is disabled at POR.><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is the SOSC><1000>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><9>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size Selection bits><7><8>
<SETTING_VALUE_TYPE><65536><Boot Block Size (Words) 65536><0>
<SETTING_VALUE_TYPE><32768><Boot Block Size (Words) 32768><1>
<SETTING_VALUE_TYPE><16384><Boot Block Size (Words) 16384><2>
<SETTING_VALUE_TYPE><8192><Boot Block Size (Words) 8192><3>
<SETTING_VALUE_TYPE><4096><Boot Block Size (Words) 4069><4>
<SETTING_VALUE_TYPE><2048><Boot Block Size (Words) 2048><5>
<SETTING_VALUE_TYPE><1024><Boot Block Size (Words) 1024><6>
<SETTING_VALUE_TYPE><512><Boot Block Size (Words) 512><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot Block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot Block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><SAF Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block NOT write-protected><80>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Boot Block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block NOT write-protected><100>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><200><2>
<SETTING_VALUE_TYPE><ON><Configuration Word write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words NOT write-protected><200>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><400><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM NOT write-protected><400>
<SWITCH_INFO_TYPE><WRTSAF><Storage Area Flash Write Protection bit><800><2>
<SETTING_VALUE_TYPE><ON><SAF write-protected><0>
<SETTING_VALUE_TYPE><OFF><SAF NOT write-protected><800>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><1>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<PART_INFO_TYPE><a933><PIC16LF1933><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a934><PIC16LF1934><16Exxx><2><2><fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a936><PIC16LF1936><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a937><PIC16LF1937><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a938><PIC16LF1938><16Exxx><2><8><3fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFFh write protected, 2000h to 3FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 3FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a939><PIC16LF1939><16Exxx><2><8><3fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFFh write protected, 2000h to 3FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 3FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a946><PIC16LF1946><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a947><PIC16LF1947><16Exxx><2><8><3fff><20><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><8007><0><ffff><a>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins><2>
<SETTING_VALUE_TYPE><EXTRC><EXTRC oscillator: External RC circuit connected to CLKIN pin><3>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: I/O function on CLKIN pin><4>
<SETTING_VALUE_TYPE><ECL><ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin><5>
<SETTING_VALUE_TYPE><ECM><ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin><6>
<SETTING_VALUE_TYPE><ECH><ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable><18><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT controlled by the SWDTEN bit in the WDTCON register><8>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while running and disabled in Sleep><10>
<SETTING_VALUE_TYPE><ON><WDT enabled><18>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable><20><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select><40><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP pin function is digital input><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP pin function is MCLR><40>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection><80><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><600><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><SBODEN><Brown-out Reset controlled by the SBOREN bit in the BORCON register><200>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running and disabled in Sleep><400>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><600>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable><800><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled on the CLKOUT pin><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin><800>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover><1000><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode is disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode is enabled><1000>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor is disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor is enabled><2000>
<CONFIGREG_INFO_TYPE><8008><0><ffff><5>
<SWITCH_INFO_TYPE><WRT><Flash Memory Self-Write Protection><3><4>
<SETTING_VALUE_TYPE><ALL><000h to 3FFFh write protected, no addresses may be modified by EECON control><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFFh write protected, 2000h to 3FFFh may be modified by EECON control><1>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 3FFFh may be modified by EECON control><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><PLLEN><PLL Enable><100><2>
<SETTING_VALUE_TYPE><OFF><4x PLL disabled><0>
<SETTING_VALUE_TYPE><ON><4x PLL enabled><100>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a Reset><200>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection><400><2>
<SETTING_VALUE_TYPE><HI><Brown-out Reset Voltage (Vbor), high trip point selected.><0>
<SETTING_VALUE_TYPE><LO><Brown-out Reset Voltage (Vbor), low trip point selected.><400>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable><2000><2>
<SETTING_VALUE_TYPE><OFF><High-voltage on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low-voltage programming enabled><2000>
<PART_INFO_TYPE><a627><PIC16LF627><16xxxx><0><0><3ff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><ECIO><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><11>
<SETTING_VALUE_TYPE><ERIO><ER oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor on RA7/OSC1/CLKIN><12>
<SETTING_VALUE_TYPE><ERCLK><ER oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor on RA7/OSC1/CLKIN><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR pin function select><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOD Reset disabled><0>
<SETTING_VALUE_TYPE><ON><BOD Reset enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB4/PGM pin has digital I/O function, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB4/PGM pin has PGM function, low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protected><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection off><100>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3c00><4>
<SETTING_VALUE_TYPE><ALL><0000h-03FFh code protected><0>
<SETTING_VALUE_TYPE><75><0200h-03FFh code protected><1400>
<SETTING_VALUE_TYPE><50><Program memory code protection off><2800>
<SETTING_VALUE_TYPE><OFF><Program memory code protection off><3c00>
<PART_INFO_TYPE><c627><PIC16LF627A><16xxxx><0><0><3ff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><ECIO><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSC oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><11>
<SETTING_VALUE_TYPE><EXTRCIO><RC oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN><12>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR/VPP pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR/VPP pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Detect Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOD disabled><0>
<SETTING_VALUE_TYPE><ON><BOD enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB4/PGM pin has digital I/O function, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB4/PGM pin has PGM function, low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection off><100>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><0000h to 03FFh code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><b628><PIC16LF628><16xxxx><0><1><7ff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><ECIO><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><11>
<SETTING_VALUE_TYPE><ERIO><ER oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor on RA7/OSC1/CLKIN><12>
<SETTING_VALUE_TYPE><ERCLK><ER oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor on RA7/OSC1/CLKIN><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR pin function select><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOD Reset disabled><0>
<SETTING_VALUE_TYPE><ON><BOD Reset enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB4/PGM pin has digital I/O function, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB4/PGM pin has PGM function, low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protected><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection off><100>
<SWITCH_INFO_TYPE><CP><Code Protection bits><3c00><4>
<SETTING_VALUE_TYPE><ALL><0000h-07FFh code protected><0>
<SETTING_VALUE_TYPE><75><0200h-07FFh code protected><1400>
<SETTING_VALUE_TYPE><50><0400h-07FFh code protected><2800>
<SETTING_VALUE_TYPE><OFF><Program memory code protection off><3c00>
<PART_INFO_TYPE><c628><PIC16LF628A><16xxxx><0><1><7ff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><ECIO><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSC oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><11>
<SETTING_VALUE_TYPE><EXTRCIO><RC oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN><12>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR/VPP pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR/VPP pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Detect Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOD disabled><0>
<SETTING_VALUE_TYPE><ON><BOD enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB4/PGM pin has digital I/O function, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB4/PGM pin has PGM function, low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection off><100>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><0000h to 07FFh code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><c648><PIC16LF648A><16xxxx><0><2><fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><ECIO><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSC oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><11>
<SETTING_VALUE_TYPE><EXTRCIO><RC oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN><12>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor and Capacitor on RA7/OSC1/CLKIN><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR/VPP pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR/VPP pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Detect Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOD disabled><0>
<SETTING_VALUE_TYPE><ON><BOD enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB4/PGM pin has digital I/O function, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB4/PGM pin has PGM function, low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection off><100>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><0000h to 0FFFh code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><d707><PIC16LF707><16xxxx><2><4><1fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><8>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP_OSC><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT_OSC><XT oscillator: Crystal/resonator on RA6/OSC2/CLKIN and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS_OSC><HS oscillator: High Speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC_OSC><EC oscillator: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN pins><4>
<SETTING_VALUE_TYPE><INTOSC><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function  on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled (Preconditioned State)><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bit><400><2>
<SETTING_VALUE_TYPE><25><Brown-out Reset Voltage (VBOR) set to 2.5 V nominal><0>
<SETTING_VALUE_TYPE><19><Brown-out Reset Voltage (VBOR) set to 1.9 V nominal><400>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLLEN Enable Bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16 MHz (32x)><1000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><0>
<PART_INFO_TYPE><d720><PIC16LF720><16xxxx><2><1><7ff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA4/CLKO pin, I/O function on RA5/CLKI><0>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKO function on RA4/CLKO pin, I/O function on RA5/CLKI><1>
<SETTING_VALUE_TYPE><ECIO><EC oscillator: I/O function on RA4/CLKO pin, CLKI on RA5/CLKI><2>
<SETTING_VALUE_TYPE><ECCLK><EC oscillator: CLKO function on RA4/CLKO pin, CLKI on RA5/CLKI><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RA3/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA3/MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up disabled><0>
<SETTING_VALUE_TYPE><ON><RA3/MCLR/VPP pin function is MCLR; Weak pull-up enabled.><20>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><0000h to 07FFh code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><300><3>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled (Preconditioned State)><0>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><300>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLLEN Enable Bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16 MHz (32x)><1000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><1>
<SWITCH_INFO_TYPE><WRTEN><Flash memory self-write protection bits><3><4>
<SETTING_VALUE_TYPE><FULL><0h to FFFh of flash memory write protected, no address may be modified><0>
<SETTING_VALUE_TYPE><HALF><0h to 7FFh of flash memory write protected, 800h to FFFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0h to 1FFh of flash memory write protected, 200h to FFFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<PART_INFO_TYPE><d721><PIC16LF721><16xxxx><2><2><fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA4/CLKO pin, I/O function on RA5/CLKI><0>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKO function on RA4/CLKO pin, I/O function on RA5/CLKI><1>
<SETTING_VALUE_TYPE><ECIO><EC oscillator: I/O function on RA4/CLKO pin, CLKI on RA5/CLKI><2>
<SETTING_VALUE_TYPE><ECCLK><EC oscillator: CLKO function on RA4/CLKO pin, CLKI on RA5/CLKI><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RA3/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA3/MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up disabled><0>
<SETTING_VALUE_TYPE><ON><RA3/MCLR/VPP pin function is MCLR; Weak pull-up enabled.><20>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><0000h to 0FFFh code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><300><3>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled (Preconditioned State)><0>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><300>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLLEN Enable Bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16 MHz (32x)><1000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><1>
<SWITCH_INFO_TYPE><WRTEN><Flash memory self-write protection bits><3><4>
<SETTING_VALUE_TYPE><FULL><0h to FFFh of flash memory write protected, no address may be modified><0>
<SETTING_VALUE_TYPE><HALF><0h to 7FFh of flash memory write protected, 800h to FFFh may be modified><1>
<SETTING_VALUE_TYPE><BOOT><0h to 1FFh of flash memory write protected, 200h to FFFh may be modified><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<PART_INFO_TYPE><d722><PIC16LF722><16xxxx><2><1><7ff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><400><2>
<SETTING_VALUE_TYPE><25><Brown-out Reset Voltage (VBOR) set to 2.5 V nominal><0>
<SETTING_VALUE_TYPE><19><Brown-out Reset Voltage (VBOR) set to 1.9 V nominal><400>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLLEN Enable Bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16MHz (32x)><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><0>
<PART_INFO_TYPE><b722><PIC16LF722A><16xxxx><2><1><7ff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><400><2>
<SETTING_VALUE_TYPE><25><Brown-out Reset Voltage (VBOR) set to 2.5 V nominal><0>
<SETTING_VALUE_TYPE><19><Brown-out Reset Voltage (VBOR) set to 1.9 V nominal><400>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLL Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16MHz (32x)><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In-circuit debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-circuit debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><0>
<PART_INFO_TYPE><d723><PIC16LF723><16xxxx><2><2><fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><400><2>
<SETTING_VALUE_TYPE><25><Brown-out Reset Voltage (VBOR) set to 2.5 V nominal><0>
<SETTING_VALUE_TYPE><19><Brown-out Reset Voltage (VBOR) set to 1.9 V nominal><400>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLLEN Enable Bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16MHz (32x)><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><0>
<PART_INFO_TYPE><b723><PIC16LF723A><16xxxx><2><2><fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><400><2>
<SETTING_VALUE_TYPE><25><Brown-out Reset Voltage (VBOR) set to 2.5 V nominal><0>
<SETTING_VALUE_TYPE><19><Brown-out Reset Voltage (VBOR) set to 1.9 V nominal><400>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLL Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16MHz (32x)><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In-circuit debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-circuit debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><0>
<PART_INFO_TYPE><d724><PIC16LF724><16xxxx><2><2><fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><400><2>
<SETTING_VALUE_TYPE><25><Brown-out Reset Voltage (VBOR) set to 2.5 V nominal><0>
<SETTING_VALUE_TYPE><19><Brown-out Reset Voltage (VBOR) set to 1.9 V nominal><400>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLLEN Enable Bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16MHz (32x)><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><0>
<PART_INFO_TYPE><d726><PIC16LF726><16xxxx><2><4><1fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><400><2>
<SETTING_VALUE_TYPE><25><Brown-out Reset Voltage (VBOR) set to 2.5 V nominal><0>
<SETTING_VALUE_TYPE><19><Brown-out Reset Voltage (VBOR) set to 1.9 V nominal><400>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLLEN Enable Bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16MHz (32x)><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><0>
<PART_INFO_TYPE><d727><PIC16LF727><16xxxx><2><4><1fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTOSCCLK><INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><RE3/MCLR pin function select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RE3/MCLR pin function is digital input, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RE3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Selection bits><300><3>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><NSLEEP><BOR enabled during operation and disabled in Sleep><200>
<SETTING_VALUE_TYPE><ON><BOR enabled><300>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage selection bit><400><2>
<SETTING_VALUE_TYPE><25><Brown-out Reset Voltage (VBOR) set to 2.5 V nominal><0>
<SETTING_VALUE_TYPE><19><Brown-out Reset Voltage (VBOR) set to 1.9 V nominal><400>
<SWITCH_INFO_TYPE><PLLEN><INTOSC PLLEN Enable Bit><1000><2>
<SETTING_VALUE_TYPE><OFF><INTOSC Frequency is 500 kHz><0>
<SETTING_VALUE_TYPE><ON><INTOSC Frequency is 16MHz (32x)><1000>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><2000><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><0>
<PART_INFO_TYPE><a2e9><PIC16LF73><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><All Memory locations code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><a674><PIC16LF74><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><All Memory locations code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><a747><PIC16LF747><16xxxx><2><2><fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EXTCLK; port I/O function on OSC2/CLKO/RA6><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator; port I/O function on OSC1/CLKI/RA7 and OSC2/CLKO/RA6><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator; CLKO function on OSC2/CLKO/RA6 and port I/O function on OSC1/CLKI/RA7><11>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC oscillator; port I/O function on OSC2/CLKO/RA6><12>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator; CLKO function on OSC2/CLKO/RA6><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR/VPP/RE3 Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP/RE3 pin function is digital input only, MCLR gated to '1'><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP/RE3 pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><180><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><80>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><100>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><180>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Multiplex bit><1000><2>
<SETTING_VALUE_TYPE><RB3><CCP2 is on RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 is on RC1><1000>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bits><2000><2>
<SETTING_VALUE_TYPE><ON><0000h to 0FFFh code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><3>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><1>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><2><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><2>
<SWITCH_INFO_TYPE><BORSEN><Brown-out Reset Software Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<PART_INFO_TYPE><a676><PIC16LF76><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><All Memory locations code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><a767><PIC16LF767><16xxxx><2><4><1fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EXTCLK; port I/O function on OSC2/CLKO/RA6><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator; port I/O function on OSC1/CLKI/RA7 and OSC2/CLKO/RA6><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator; CLKO function on OSC2/CLKO/RA6 and port I/O function on OSC1/CLKI/RA7><11>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC oscillator; port I/O function on OSC2/CLKO/RA6><12>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator; CLKO function on OSC2/CLKO/RA6><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR/VPP/RE3 Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP/RE3 pin function is digital input only, MCLR gated to '1'><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP/RE3 pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><180><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><80>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><100>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><180>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Multiplex bit><1000><2>
<SETTING_VALUE_TYPE><RB3><CCP2 is on RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 is on RC1><1000>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bits><2000><2>
<SETTING_VALUE_TYPE><ON><0000h to 1FFFh code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><3>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><1>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><2><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><2>
<SWITCH_INFO_TYPE><BORSEN><Brown-out Reset Software Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<PART_INFO_TYPE><a677><PIC16LF77><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><All Memory locations code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<PART_INFO_TYPE><a777><PIC16LF777><16xxxx><2><4><1fff><4><7f><0><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EXTCLK; port I/O function on OSC2/CLKO/RA6><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator; port I/O function on OSC1/CLKI/RA7 and OSC2/CLKO/RA6><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator; CLKO function on OSC2/CLKO/RA6 and port I/O function on OSC1/CLKI/RA7><11>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC oscillator; port I/O function on OSC2/CLKO/RA6><12>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator; CLKO function on OSC2/CLKO/RA6><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR/VPP/RE3 Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR/VPP/RE3 pin function is digital input only, MCLR gated to '1'><0>
<SETTING_VALUE_TYPE><ON><MCLR/VPP/RE3 pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><180><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><80>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><100>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><180>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Multiplex bit><1000><2>
<SETTING_VALUE_TYPE><RB3><CCP2 is on RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 is on RC1><1000>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bits><2000><2>
<SETTING_VALUE_TYPE><ON><0000h to 1FFFh code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><3>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><1>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><2><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><2>
<SWITCH_INFO_TYPE><BORSEN><Brown-out Reset Software Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<PART_INFO_TYPE><a818><PIC16LF818><16xxxx><0><0><3ff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><b>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EXTCLK; port I/O function on RA6/OSC2/CLKO pin><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin><11>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC oscillator; port I/O function on RA6/OSC2/CLKO pin><12>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator; CLKO function on RA6/OSC2/CLKO pin><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR/VPP pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3/PGM pin has digital I/O function, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function, Low-Voltage Programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data EE memory locations code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Write Enable bits><600><3>
<SETTING_VALUE_TYPE><1024><0000h to 03FFh write-protected><200>
<SETTING_VALUE_TYPE><512><0000h to 01FFh write-protected, 0200h to 03FFh may be modified by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off><600>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CCPMX><CCP1 Pin Selection bit><1000><2>
<SETTING_VALUE_TYPE><RB3><CCP1 function on RB3><0>
<SETTING_VALUE_TYPE><RB2><CCP1 function on RB2><1000>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><All memory locations code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><a819><PIC16LF819><16xxxx><0><1><7ff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><b>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EXTCLK; port I/O function on RA6/OSC2/CLKO pin><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin><11>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC oscillator; port I/O function on RA6/OSC2/CLKO pin><12>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator; CLKO function on RA6/OSC2/CLKO pin><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR/VPP pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3/PGM pin has digital I/O function, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function, Low-Voltage Programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data EE memory locations code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Write Enable bits><600><4>
<SETTING_VALUE_TYPE><1536><0000h to 05FFh write-protected, 0600h to 07FFh may be modified by EECON control><0>
<SETTING_VALUE_TYPE><1024><0000h to 03FFh write-protected, 0400h to 07FFh may be modified by EECON control><200>
<SETTING_VALUE_TYPE><512><0000h to 01FFh write-protected, 0200h to 07FFh may be modified by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off><600>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CCPMX><CCP1 Pin Selection bit><1000><2>
<SETTING_VALUE_TYPE><RB3><CCP1 function on RB3><0>
<SETTING_VALUE_TYPE><RB2><CCP1 function on RB2><1000>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><All memory locations code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><a683><PIC16LF83><16xxxx><0><0><1ff><2><2f><3f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Power-up Timer is enabled><0>
<SETTING_VALUE_TYPE><OFF><Power-up Timer is disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bit><3ff0><2>
<SETTING_VALUE_TYPE><ON><All program memory is code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection disabled><3ff0>
<PART_INFO_TYPE><a684><PIC16LF84><16xxxx><0><0><3ff><2><4f><3f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Power-up Timer is enabled><0>
<SETTING_VALUE_TYPE><OFF><Power-up Timer is disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bit><3ff0><2>
<SETTING_VALUE_TYPE><ON><All program memory is code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection disabled><3ff0>
<PART_INFO_TYPE><a685><PIC16LF84A><16xxxx><0><0><3ff><2><4f><3f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Power-up Timer is enabled><0>
<SETTING_VALUE_TYPE><OFF><Power-up Timer is disabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bit><3ff0><2>
<SETTING_VALUE_TYPE><ON><All program memory is code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection disabled><3ff0>
<PART_INFO_TYPE><a807><PIC16LF87><16xxxx><2><2><fff><4><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><b>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><ECIO; port I/O function on RA6/OSC2/CLKO><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin><11>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC oscillator; port I/O function on RA6/OSC2/CLKO><12>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator; CLKO function on RA6/OSC2/CLKO><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR/VPP pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function, Low-Voltage Programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data EE memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Write Enable bits><600><4>
<SETTING_VALUE_TYPE><ALL><0000h to 0FFFh write-protected><0>
<SETTING_VALUE_TYPE><2048><0000h to 07FFh write-protected, 0800h to 0FFFh may be modified by EECON control><200>
<SETTING_VALUE_TYPE><256><0000h to 00FFh write-protected, 0100h to 0FFFh may be modified by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off><600>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CCPMX><CCP1 Pin Selection bit><1000><2>
<SETTING_VALUE_TYPE><RB3><CCP1 function on RB3><0>
<SETTING_VALUE_TYPE><RB0><CCP1 function on RB0><1000>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><0000h to 0FFFh code-protected (all protected)><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><2>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><1>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><2><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><2>
<PART_INFO_TYPE><a870><PIC16LF870><16xxxx><0><1><7ff><4><7f><3f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bits><3030><2>
<SETTING_VALUE_TYPE><ON><All memory code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><3030>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low Voltage In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection off><100>
<SWITCH_INFO_TYPE><WRT><FLASH Program Memory Write Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Unprotected program memory may not be written to by EECON control><0>
<SETTING_VALUE_TYPE><ALL><Unprotected program memory may be written to by EECON control><200>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<PART_INFO_TYPE><a871><PIC16LF871><16xxxx><0><1><7ff><4><7f><3f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bits><3030><2>
<SETTING_VALUE_TYPE><ON><All memory code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><3030>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low Voltage In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection off><100>
<SWITCH_INFO_TYPE><WRT><FLASH Program Memory Write Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Unprotected program memory may not be written to by EECON control><0>
<SETTING_VALUE_TYPE><ALL><Unprotected program memory may be written to by EECON control><200>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<PART_INFO_TYPE><a800><PIC16LF872><16xxxx><0><1><7ff><4><7f><3f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bits><3030><2>
<SETTING_VALUE_TYPE><ON><All memory code protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><3030>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low Voltage In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection off><100>
<SWITCH_INFO_TYPE><WRT><FLASH Program Memory Write Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Unprotected program memory may not be written to by EECON control><0>
<SETTING_VALUE_TYPE><ALL><Unprotected program memory may be written to by EECON control><200>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<PART_INFO_TYPE><a873><PIC16LF873><16xxxx><0><2><fff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bits><3030><4>
<SETTING_VALUE_TYPE><ALL><0000h to 0FFFh code protected><0>
<SETTING_VALUE_TYPE><HALF><0800h to 0FFFh code protected><1010>
<SETTING_VALUE_TYPE><UPPER_256><0F00h to 0FFFh code protected><2020>
<SETTING_VALUE_TYPE><OFF><Code protection off><3030>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low Voltage In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection off><100>
<SWITCH_INFO_TYPE><WRT><FLASH Program Memory Write Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Unprotected program memory may not be written to by EECON control><0>
<SETTING_VALUE_TYPE><ON><Unprotected program memory may be written to by EECON control><200>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<PART_INFO_TYPE><a803><PIC16LF873A><16xxxx><0><2><fff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage (Single-Supply) In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection off><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Write Enable bits><600><4>
<SETTING_VALUE_TYPE><HALF><0000h to 07FFh write-protected; 0800h to 0FFFh may be written to by EECON control><0>
<SETTING_VALUE_TYPE><1FOURTH><0000h to 03FFh write-protected; 0400h to 0FFFh may be written to by EECON control><200>
<SETTING_VALUE_TYPE><256><0000h to 00FFh write-protected; 0100h to 0FFFh may be written to by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off; all program memory may be written to by EECON control><600>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><All program memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><a874><PIC16LF874><16xxxx><0><2><fff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bits><3030><4>
<SETTING_VALUE_TYPE><ALL><0000h to 0FFFh code protected><0>
<SETTING_VALUE_TYPE><HALF><0800h to 0FFFh code protected><1010>
<SETTING_VALUE_TYPE><UPPER_256><0F00h to 0FFFh code protected><2020>
<SETTING_VALUE_TYPE><OFF><Code protection off><3030>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low Voltage In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection off><100>
<SWITCH_INFO_TYPE><WRT><FLASH Program Memory Write Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Unprotected program memory may not be written to by EECON control><0>
<SETTING_VALUE_TYPE><ON><Unprotected program memory may be written to by EECON control><200>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<PART_INFO_TYPE><a804><PIC16LF874A><16xxxx><0><2><fff><4><7f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage (Single-Supply) In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection off><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Write Enable bits><600><4>
<SETTING_VALUE_TYPE><HALF><0000h to 07FFh write-protected; 0800h to 0FFFh may be written to by EECON control><0>
<SETTING_VALUE_TYPE><1FOURTH><0000h to 03FFh write-protected; 0400h to 0FFFh may be written to by EECON control><200>
<SETTING_VALUE_TYPE><256><0000h to 00FFh write-protected; 0100h to 0FFFh may be written to by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off; all program memory may be written to by EECON control><600>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><All program memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><a801><PIC16LF876><16xxxx><0><4><1fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bits><3030><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh code protected><0>
<SETTING_VALUE_TYPE><HALF><1000h to 1FFFh code protected><1010>
<SETTING_VALUE_TYPE><UPPER_256><1F00h to 1FFFh code protected><2020>
<SETTING_VALUE_TYPE><OFF><Code protection off><3030>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low Voltage In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection off><100>
<SWITCH_INFO_TYPE><WRT><FLASH Program Memory Write Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Unprotected program memory may not be written to by EECON control><0>
<SETTING_VALUE_TYPE><ON><Unprotected program memory may be written to by EECON control><200>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<PART_INFO_TYPE><a805><PIC16LF876A><16xxxx><0><4><1fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage (Single-Supply) In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection off><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Write Enable bits><600><4>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write-protected; 1000h to 1FFFh may be written to by EECON control><0>
<SETTING_VALUE_TYPE><1FOURTH><0000h to 07FFh write-protected; 0800h to 1FFFh may be written to by EECON control><200>
<SETTING_VALUE_TYPE><256><0000h to 00FFh write-protected; 0100h to 1FFFh may be written to by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off; all program memory may be written to by EECON control><600>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><All program memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><a802><PIC16LF877><16xxxx><0><4><1fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><3fff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><CP><FLASH Program Memory Code Protection bits><3030><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh code protected><0>
<SETTING_VALUE_TYPE><HALF><1000h to 1FFFh code protected><1010>
<SETTING_VALUE_TYPE><UPPER_256><1F00h to 1FFFh code protected><2020>
<SETTING_VALUE_TYPE><OFF><Code protection off><3030>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low Voltage In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code Protection off><100>
<SWITCH_INFO_TYPE><WRT><FLASH Program Memory Write Enable><200><2>
<SETTING_VALUE_TYPE><OFF><Unprotected program memory may not be written to by EECON control><0>
<SETTING_VALUE_TYPE><ON><Unprotected program memory may be written to by EECON control><200>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<PART_INFO_TYPE><a806><PIC16LF877A><16xxxx><0><4><1fff><4><7f><ff><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><9>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EXTRC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage (Single-Supply) In-Circuit Serial Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function; low-voltage programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection off><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Write Enable bits><600><4>
<SETTING_VALUE_TYPE><HALF><0000h to 0FFFh write-protected; 1000h to 1FFFh may be written to by EECON control><0>
<SETTING_VALUE_TYPE><1FOURTH><0000h to 07FFh write-protected; 0800h to 1FFFh may be written to by EECON control><200>
<SETTING_VALUE_TYPE><256><0000h to 00FFh write-protected; 0100h to 1FFFh may be written to by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off; all program memory may be written to by EECON control><600>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><All program memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<PART_INFO_TYPE><a808><PIC16LF88><16xxxx><2><2><fff><4><7f><ff><0-0><0-0><0><2>
<CONFIGREG_INFO_TYPE><2007><0><ffff><b>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><13><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><ECIO; port I/O function on RA6/OSC2/CLKO><3>
<SETTING_VALUE_TYPE><INTOSCIO><INTRC oscillator; port I/O function on both RA6/OSC2/CLKO pin and RA7/OSC1/CLKI pin><10>
<SETTING_VALUE_TYPE><INTOSCCLK><INTRC oscillator; CLKO function on RA6/OSC2/CLKO pin and port I/O function on RA7/OSC1/CLKI pin><11>
<SETTING_VALUE_TYPE><EXTRCIO><EXTRC oscillator; port I/O function on RA6/OSC2/CLKO><12>
<SETTING_VALUE_TYPE><EXTRCCLK><EXTRC oscillator; CLKO function on RA6/OSC2/CLKO><13>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><MCLRE><RA5/MCLR/VPP Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><RA5/MCLR/VPP pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><RA5/MCLR/VPP pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><LVP><Low-Voltage Programming Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RB3 is digital I/O, HV on MCLR must be used for programming><0>
<SETTING_VALUE_TYPE><ON><RB3/PGM pin has PGM function, Low-Voltage Programming enabled><80>
<SWITCH_INFO_TYPE><CPD><Data EE Memory Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data EE memory code-protected><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Write Enable bits><600><4>
<SETTING_VALUE_TYPE><ALL><0000h to 0FFFh write-protected><0>
<SETTING_VALUE_TYPE><2048><0000h to 07FFh write-protected, 0800h to 0FFFh may be modified by EECON control><200>
<SETTING_VALUE_TYPE><256><0000h to 00FFh write-protected, 0100h to 0FFFh may be modified by EECON control><400>
<SETTING_VALUE_TYPE><OFF><Write protection off><600>
<SWITCH_INFO_TYPE><DEBUG><In-Circuit Debugger Mode bit><800><2>
<SETTING_VALUE_TYPE><ON><In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger><0>
<SETTING_VALUE_TYPE><OFF><In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins><800>
<SWITCH_INFO_TYPE><CCPMX><CCP1 Pin Selection bit><1000><2>
<SETTING_VALUE_TYPE><RB3><CCP1 function on RB3><0>
<SETTING_VALUE_TYPE><RB0><CCP1 function on RB0><1000>
<SWITCH_INFO_TYPE><CP><Flash Program Memory Code Protection bit><2000><2>
<SETTING_VALUE_TYPE><ON><0000h to 0FFFh code-protected (all protected)><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><2000>
<CONFIGREG_INFO_TYPE><2008><0><ffff><2>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><1>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><2><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><2>
<PART_INFO_TYPE><8242><PIC18C242><18xxxx><2><1><3fff><10><ff><0><0-7f><f80-fff><0><6>
<CONFIGREG_INFO_TYPE><300000><0><ff><1>
<SWITCH_INFO_TYPE><CP><Code Protection bits><ff><2>
<SETTING_VALUE_TYPE><ON><All of program memory code protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection off><ff>
<CONFIGREG_INFO_TYPE><300001><0><e7><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300005><0><1><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><3><1>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<PART_INFO_TYPE><8252><PIC18C252><18xxxx><2><1><7fff><10><ff><0><0-7f><f80-fff><0><6>
<CONFIGREG_INFO_TYPE><300000><0><ff><1>
<SWITCH_INFO_TYPE><CP><Code Protection bits><ff><2>
<SETTING_VALUE_TYPE><ON><All of program memory code protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection off><ff>
<CONFIGREG_INFO_TYPE><300001><0><e7><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300005><0><1><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><3><1>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<PART_INFO_TYPE><8442><PIC18C442><18xxxx><2><1><3fff><10><ff><0><0-7f><f80-fff><0><6>
<CONFIGREG_INFO_TYPE><300000><0><ff><1>
<SWITCH_INFO_TYPE><CP><Code Protection bits><ff><2>
<SETTING_VALUE_TYPE><ON><All of program memory code protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection off><ff>
<CONFIGREG_INFO_TYPE><300001><0><e7><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300005><0><1><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><3><1>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<PART_INFO_TYPE><8452><PIC18C452><18xxxx><2><1><7fff><10><ff><0><0-7f><f80-fff><0><6>
<CONFIGREG_INFO_TYPE><300000><0><ff><1>
<SWITCH_INFO_TYPE><CP><Code Protection bits><ff><2>
<SETTING_VALUE_TYPE><ON><All of program memory code protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection off><ff>
<CONFIGREG_INFO_TYPE><300001><0><e7><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300005><0><1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><3><1>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<PART_INFO_TYPE><8601><PIC18C601><18xxxx><2><1><1fffff><10><ff><0><0-7f><f80-fff><0><4>
<CONFIGREG_INFO_TYPE><300001><0><3><1>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><EC><EC Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><RC><RC Oscillator><3>
<CONFIGREG_INFO_TYPE><300002><0><41><2>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BW><External Bus Data Width bit><40><2>
<SETTING_VALUE_TYPE><8><8-bit External Bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit External Bus mode><40>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><81><1>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow RESET Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<PART_INFO_TYPE><8658><PIC18C658><18xxxx><2><1><7fff><10><ff><0><0-5f><f60-fff><0><5>
<CONFIGREG_INFO_TYPE><300000><0><ff><1>
<SWITCH_INFO_TYPE><CP><Code Protection bits><ff><2>
<SETTING_VALUE_TYPE><ON><All of program memory code protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection off><ff>
<CONFIGREG_INFO_TYPE><300001><0><e7><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS4 oscillator with PLL enabled/Clock frequency = (4 x Fosc)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (Oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (Main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><3><1>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow RESET Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<PART_INFO_TYPE><8801><PIC18C801><18xxxx><2><1><1fffff><10><ff><0><0-7f><f80-fff><0><4>
<CONFIGREG_INFO_TYPE><300001><0><3><1>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><EC><EC Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><RC><RC Oscillator><3>
<CONFIGREG_INFO_TYPE><300002><0><41><2>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BW><External Bus Data Width bit><40><2>
<SETTING_VALUE_TYPE><8><8-bit External Bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit External Bus mode><40>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><81><1>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow RESET Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<PART_INFO_TYPE><8858><PIC18C858><18xxxx><2><1><7fff><10><ff><0><0-5f><f60-fff><0><5>
<CONFIGREG_INFO_TYPE><300000><0><ff><1>
<SWITCH_INFO_TYPE><CP><Code Protection bits><ff><2>
<SETTING_VALUE_TYPE><ON><All of program memory code protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection off><ff>
<CONFIGREG_INFO_TYPE><300001><0><e7><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS4 oscillator with PLL enabled/Clock frequency = (4 x Fosc)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (Oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (Main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><3><1>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow RESET Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<PART_INFO_TYPE><a122><PIC18F1220><18xxxx><2><1><fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FSCM><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><3>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><80><1>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA5 input pin enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RA5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (00200-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (00200-0007FFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (00200-000F7Fh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (00200-0007FFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (00200-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (00200-0007FFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><1230><PIC18F1230><18xxxx><6><1><fff><10><ff><7f><0-7f><f80-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal oscillator, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal oscillator, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><e><3>
<SWITCH_INFO_TYPE><PWMPIN><PWM Output Pins Reset State Control bit><2><2>
<SETTING_VALUE_TYPE><ON><PWM outputs drive active states upon Reset><0>
<SETTING_VALUE_TYPE><OFF><PWM outputs disabled upon Reset><2>
<SWITCH_INFO_TYPE><LPOL><Low-Side Transistors Polarity bit (Even PWM Output Polarity Control bit)><4><2>
<SETTING_VALUE_TYPE><LOW><PWM0, PWM2 and PWM4 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM0, PWM2 and PWM4 are active-high (default)><4>
<SWITCH_INFO_TYPE><HPOL><High Side Transistors Polarity bit (Odd PWM Output Polarity Control bit)><8><2>
<SETTING_VALUE_TYPE><LOW><PWM1, PWM3 and PWM5 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM1, PWM3 and PWM5 are active-high (default)><8>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><FLTAMX><FLTA Mux bit><1><2>
<SETTING_VALUE_TYPE><RA7><FLTA input is muxed onto RA7><0>
<SETTING_VALUE_TYPE><RA5><FLTA input is muxed onto RA5><1>
<SWITCH_INFO_TYPE><T1OSCMX><T1OSO/T1CKI MUX bit><8><2>
<SETTING_VALUE_TYPE><LOW><T1OSO/T1CKI pin resides on RB2><0>
<SETTING_VALUE_TYPE><HIGH><T1OSO/T1CKI pin resides on RA6><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA5 input pin enabled, MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RA5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><4>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><2>
<SETTING_VALUE_TYPE><BB256><256 Words (512 Bytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB512><512 Words (1024 Bytes) Boot Block size><30>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0 (000400-0007FF)><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1 (000800-000FFF)><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protection bit (Boot Block Memory Area)><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Code Protection bit (Data EEPROM)><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0 (000400-0007FF)><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1 (000800-000FFF)><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Write Protection bit (Configuration Registers)><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Write Protection bit (Boot Block Memory Area)><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Write Protection bit (Data EEPROM)><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0 (000400-0007FF)><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1 (000800-000FFF)><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protection bit (Boot Block Memory Area)><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a132><PIC18F1320><18xxxx><2><1><1fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FSCM><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><3>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><80><1>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA5 input pin enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RA5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (00200-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (00200-000FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (00200-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (00200-000FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (00200-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (00200-000FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><1330><PIC18F1330><18xxxx><6><1><1fff><10><ff><7f><0-7f><f80-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal oscillator, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal oscillator, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><e><3>
<SWITCH_INFO_TYPE><PWMPIN><PWM Output Pins Reset State Control bit><2><2>
<SETTING_VALUE_TYPE><ON><PWM outputs drive active states upon Reset><0>
<SETTING_VALUE_TYPE><OFF><PWM outputs disabled upon Reset><2>
<SWITCH_INFO_TYPE><LPOL><Low-Side Transistors Polarity bit (Even PWM Output Polarity Control bit)><4><2>
<SETTING_VALUE_TYPE><LOW><PWM0, PWM2 and PWM4 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM0, PWM2 and PWM4 are active-high (default)><4>
<SWITCH_INFO_TYPE><HPOL><High Side Transistors Polarity bit (Odd PWM Output Polarity Control bit)><8><2>
<SETTING_VALUE_TYPE><LOW><PWM1, PWM3 and PWM5 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM1, PWM3 and PWM5 are active-high (default)><8>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><FLTAMX><FLTA Mux bit><1><2>
<SETTING_VALUE_TYPE><RA7><FLTA input is muxed onto RA7><0>
<SETTING_VALUE_TYPE><RA5><FLTA input is muxed onto RA5><1>
<SWITCH_INFO_TYPE><T1OSCMX><T1OSO/T1CKI MUX bit><8><2>
<SETTING_VALUE_TYPE><LOW><T1OSO/T1CKI pin resides on RB2><0>
<SETTING_VALUE_TYPE><HIGH><T1OSO/T1CKI pin resides on RA6><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA5 input pin enabled, MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RA5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><4>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB256><256 Words (512 Bytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB512><512 Words (1024 Bytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB1K><1K Words (2048 Bytes) Boot Block size><30>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0 (000800-000FFF)><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1 (001000-001FFF)><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protection bit (Boot Block Memory Area)><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Code Protection bit (Data EEPROM)><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0 (000800-000FFF)><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1 (001000-001FFF)><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Write Protection bit (Configuration Registers)><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Write Protection bit (Boot Block Memory Area)><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Write Protection bit (Data EEPROM)><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0 (000800-000FFF)><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1 (001000-001FFF)><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protection bit (Boot Block Memory Area)><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><b132><PIC18F13K22><18xxxx><6><1><1fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><27><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><d>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><ERCCLKOUT><External RC oscillator, CLKOUT function on OSC2><3>
<SETTING_VALUE_TYPE><ECCLKOUTH><EC, CLKOUT function on OSC2 (high)><4>
<SETTING_VALUE_TYPE><ECH><EC (high)><5>
<SETTING_VALUE_TYPE><ERC><External RC oscillator><7>
<SETTING_VALUE_TYPE><IRC><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><IRCCLKOUT><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECCLKOUTM><EC, CLKOUT function on OSC2 (medium)><a>
<SETTING_VALUE_TYPE><ECM><EC (medium)><b>
<SETTING_VALUE_TYPE><ECCLKOUTL><EC, CLKOUT function on OSC2 (low)><c>
<SETTING_VALUE_TYPE><ECL><EC (low)><d>
<SWITCH_INFO_TYPE><PLLEN><4 X PLL Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><PLL is under software control><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PCLKEN><Primary Clock Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock is under software control><0>
<SETTING_VALUE_TYPE><ON><Primary clock enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><19><VBOR set to 1.9 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect.><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><88><2>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up bit><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RA3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><8><2>
<SETTING_VALUE_TYPE><OFF><512W boot block size><0>
<SETTING_VALUE_TYPE><ON><1kW boot block size><8>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RA0 and RA1 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RA0 and RA1 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a135><PIC18F13K50><18xxxx><6><1><1fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Selection bits><18><4>
<SETTING_VALUE_TYPE><NOCLKDIV><No CPU System Clock divide><0>
<SETTING_VALUE_TYPE><CLKDIV2><CPU System Clock divided by 2><8>
<SETTING_VALUE_TYPE><CLKDIV3><CPU System Clock divided by 3><10>
<SETTING_VALUE_TYPE><CLKDIV4><CPU System Clock divided by 4><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB clock comes directly from the OSC1/OSC2 oscillator block; no divide><0>
<SETTING_VALUE_TYPE><ON><USB clock comes from the OSC1/OSC2 divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><27><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><d>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><ERCCLKOUT><External RC oscillator, CLKOUT function on OSC2><3>
<SETTING_VALUE_TYPE><ECCLKOUTH><EC, CLKOUT function on OSC2 (high)><4>
<SETTING_VALUE_TYPE><ECH><EC (high)><5>
<SETTING_VALUE_TYPE><ERC><External RC oscillator><7>
<SETTING_VALUE_TYPE><IRC><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><IRCCLKOUT><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECCLKOUTM><EC, CLKOUT function on OSC2 (medium)><a>
<SETTING_VALUE_TYPE><ECM><EC (medium)><b>
<SETTING_VALUE_TYPE><ECCLKOUTL><EC, CLKOUT function on OSC2 (low)><c>
<SETTING_VALUE_TYPE><ECL><EC (low)><d>
<SWITCH_INFO_TYPE><PLLEN><4 X PLL Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><PLL is under software control><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PCLKEN><Primary Clock Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock is under software control><0>
<SETTING_VALUE_TYPE><ON><Primary clock enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><3f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><19><VBOR set to 1.9 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect.><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><88><2>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up bit><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RA3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><8><2>
<SETTING_VALUE_TYPE><OFF><512W boot block size><0>
<SETTING_VALUE_TYPE><ON><1kW boot block size><8>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RA0 and RA1 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RA0 and RA1 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Table Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><b142><PIC18F14K22><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><27><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><d>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><ERCCLKOUT><External RC oscillator, CLKOUT function on OSC2><3>
<SETTING_VALUE_TYPE><ECCLKOUTH><EC, CLKOUT function on OSC2 (high)><4>
<SETTING_VALUE_TYPE><ECH><EC (high)><5>
<SETTING_VALUE_TYPE><ERC><External RC oscillator><7>
<SETTING_VALUE_TYPE><IRC><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><IRCCLKOUT><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECCLKOUTM><EC, CLKOUT function on OSC2 (medium)><a>
<SETTING_VALUE_TYPE><ECM><EC (medium)><b>
<SETTING_VALUE_TYPE><ECCLKOUTL><EC, CLKOUT function on OSC2 (low)><c>
<SETTING_VALUE_TYPE><ECL><EC (low)><d>
<SWITCH_INFO_TYPE><PLLEN><4 X PLL Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><PLL is under software control><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PCLKEN><Primary Clock Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock is under software control><0>
<SETTING_VALUE_TYPE><ON><Primary clock enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><19><VBOR set to 1.9 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect.><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><88><2>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up bit><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RA3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><8><2>
<SETTING_VALUE_TYPE><OFF><1kW boot block size><0>
<SETTING_VALUE_TYPE><ON><2kW boot block size><8>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RA0 and RA1 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RA0 and RA1 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><c142><PIC18F14K22LIN><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><27><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><d>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><ERCCLKOUT><External RC oscillator, CLKOUT function on OSC2><3>
<SETTING_VALUE_TYPE><ECCLKOUTH><EC, CLKOUT function on OSC2 (high)><4>
<SETTING_VALUE_TYPE><ECH><EC (high)><5>
<SETTING_VALUE_TYPE><ERC><External RC oscillator><7>
<SETTING_VALUE_TYPE><IRC><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><IRCCLKOUT><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECCLKOUTM><EC, CLKOUT function on OSC2 (medium)><a>
<SETTING_VALUE_TYPE><ECM><EC (medium)><b>
<SETTING_VALUE_TYPE><ECCLKOUTL><EC, CLKOUT function on OSC2 (low)><c>
<SETTING_VALUE_TYPE><ECL><EC (low)><d>
<SWITCH_INFO_TYPE><PLLEN><4 X PLL Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><PLL is under software control><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PCLKEN><Primary Clock Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock is under software control><0>
<SETTING_VALUE_TYPE><ON><Primary clock enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><19><VBOR set to 1.9 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect.><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><88><2>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up bit><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RA3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><8><2>
<SETTING_VALUE_TYPE><OFF><1kW boot block size><0>
<SETTING_VALUE_TYPE><ON><2kW boot block size><8>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RA0 and RA1 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RA0 and RA1 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a145><PIC18F14K50><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Selection bits><18><4>
<SETTING_VALUE_TYPE><NOCLKDIV><No CPU System Clock divide><0>
<SETTING_VALUE_TYPE><CLKDIV2><CPU System Clock divided by 2><8>
<SETTING_VALUE_TYPE><CLKDIV3><CPU System Clock divided by 3><10>
<SETTING_VALUE_TYPE><CLKDIV4><CPU System Clock divided by 4><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB clock comes directly from the OSC1/OSC2 oscillator block; no divide><0>
<SETTING_VALUE_TYPE><ON><USB clock comes from the OSC1/OSC2 divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><27><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><d>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><ERCCLKOUT><External RC oscillator, CLKOUT function on OSC2><3>
<SETTING_VALUE_TYPE><ECCLKOUTH><EC, CLKOUT function on OSC2 (high)><4>
<SETTING_VALUE_TYPE><ECH><EC (high)><5>
<SETTING_VALUE_TYPE><ERC><External RC oscillator><7>
<SETTING_VALUE_TYPE><IRC><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><IRCCLKOUT><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECCLKOUTM><EC, CLKOUT function on OSC2 (medium)><a>
<SETTING_VALUE_TYPE><ECM><EC (medium)><b>
<SETTING_VALUE_TYPE><ECCLKOUTL><EC, CLKOUT function on OSC2 (low)><c>
<SETTING_VALUE_TYPE><ECL><EC (low)><d>
<SWITCH_INFO_TYPE><PLLEN><4 X PLL Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><PLL is under software control><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PCLKEN><Primary Clock Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock is under software control><0>
<SETTING_VALUE_TYPE><ON><Primary clock enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><19><VBOR set to 1.9 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect.><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><88><2>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up bit><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RA3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><8><2>
<SETTING_VALUE_TYPE><OFF><1kW boot block size><0>
<SETTING_VALUE_TYPE><ON><2kW boot block size><8>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RA0 and RA1 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RA0 and RA1 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Table Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a222><PIC18F2220><18xxxx><2><1><fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FSCM><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBAD><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><DIG><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ANA><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR disabled; RE3 input is enabled in 40-pin devices only (PIC18F4X20)><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2221><PIC18F2221><18xxxx><6><1><fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum Setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum Setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><RB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><DIG><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ANA><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><2>
<SETTING_VALUE_TYPE><BB256>< 256 Word><0>
<SETTING_VALUE_TYPE><BB512>< 512 Word><30>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bitProtect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a232><PIC18F2320><18xxxx><2><1><1fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FSCM><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBAD><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><DIG><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ANA><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR disabled; RE3 input is enabled in 40-pin devices only (PIC18F4X20)><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (001000-0017FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (001000-0017FFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (001800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (001800-001FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (001000-0017FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (001000-0017FFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (001800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (001800-001FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (001000-0017FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (001000-0017FFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (001800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (001800-001FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2321><PIC18F2321><18xxxx><6><1><1fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum Setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum Setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><RB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><DIG><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ANA><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB256>< 256 Word><0>
<SETTING_VALUE_TYPE><BB512>< 512 Word><10>
<SETTING_VALUE_TYPE><BB1K><1024 Word><30>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bitProtect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2331><PIC18F2331><18xxxx><2><1><1fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC2><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO><Internal oscillator block, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><IRC><Internal oscillator block, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC1><101X External RC oscillator, CLKO function on RA6><a>
<SETTING_VALUE_TYPE><RC><11XX External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><Reserved><c>
<CONFIGREG_INFO_TYPE><300003><0><3f><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<SWITCH_INFO_TYPE><WINEN><Watchdog Timer Window Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><WDT window enabledbled><0>
<SETTING_VALUE_TYPE><OFF><WDT window disabled><20>
<CONFIGREG_INFO_TYPE><300004><0><3c><4>
<SWITCH_INFO_TYPE><PWMPIN><PWM output pins Reset state control><4><2>
<SETTING_VALUE_TYPE><ON><PWM outputs drive active states upon Reset><0>
<SETTING_VALUE_TYPE><OFF><PWM outputs disabled upon Reset (default)><4>
<SWITCH_INFO_TYPE><LPOL><Low-Side Transistors Polarity><8><2>
<SETTING_VALUE_TYPE><LOW><PWM0, 2, 4 and 6 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM0, 2, 4 and 6 are active-high><8>
<SWITCH_INFO_TYPE><HPOL><High-Side Transistors Polarity><10><2>
<SETTING_VALUE_TYPE><LOW><PWM1, 3, 5 and 7 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM1, 3, 5 and 7 are active-high><10>
<SWITCH_INFO_TYPE><T1OSCMX><Timer1 Oscillator MUX><20><2>
<SETTING_VALUE_TYPE><OFF><Standard (legacy) Timer1 oscillator operation><0>
<SETTING_VALUE_TYPE><ON><Low-power Timer1 operation when microcontroller is in Sleep mode><20>
<CONFIGREG_INFO_TYPE><300005><0><9d><1>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><d320><PIC18F23K20><18xxxx><6><1><1fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKOUT function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><18><VBOR set to 1.8 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><8b><5>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><d322><PIC18F23K22><18xxxx><6><1><1fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><25><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSHP><HS oscillator (high power > 16 MHz)><2>
<SETTING_VALUE_TYPE><HSMP><HS oscillator (medium power 4-16 MHz)><3>
<SETTING_VALUE_TYPE><ECHP><EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)><4>
<SETTING_VALUE_TYPE><ECHPIO6><EC oscillator (high power, >16 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECMP><EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)><a>
<SETTING_VALUE_TYPE><ECMPIO6><EC oscillator (medium power, 500 kHz-16 MHz)><b>
<SETTING_VALUE_TYPE><ECLP><EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)><c>
<SETTING_VALUE_TYPE><ECLPIO6><EC oscillator (low power, <500 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><4X PLL Enable><10><2>
<SETTING_VALUE_TYPE><OFF><Oscillator used directly><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PRICLKEN><Primary clock enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock can be disabled by software><0>
<SETTING_VALUE_TYPE><ON><Primary clock enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><285><VBOR set to 2.85 V nominal><0>
<SETTING_VALUE_TYPE><250><VBOR set to 2.50 V nominal><8>
<SETTING_VALUE_TYPE><220><VBOR set to 2.20 V nominal><10>
<SETTING_VALUE_TYPE><190><VBOR set to 1.90 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><Watch dog timer is always disabled. SWDTEN has no effect.><0>
<SETTING_VALUE_TYPE><NOSLP><WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect><1>
<SETTING_VALUE_TYPE><SWON><WDT is controlled by SWDTEN bit of the WDTCON register><2>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><bf><7>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><CCP3MX><P3A/CCP3 Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTC6><P3A/CCP3 input/output is mulitplexed with RC6><0>
<SETTING_VALUE_TYPE><PORTB5><P3A/CCP3 input/output is multiplexed with RB5><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><HFINTOSC output and ready status are delayed by the oscillator stable status><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC output and ready status are not delayed by the oscillator stable status><8>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock input mux bit><10><2>
<SETTING_VALUE_TYPE><PORTB5><T3CKI is on RB5><0>
<SETTING_VALUE_TYPE><PORTC0><T3CKI is on RC0><10>
<SWITCH_INFO_TYPE><P2BMX><ECCP2 B output mux bit><20><2>
<SETTING_VALUE_TYPE><PORTC0><P2B is on RC0><0>
<SETTING_VALUE_TYPE><PORTB5><P2B is on RB5><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><INTMCLR><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin enabled, RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2410><PIC18F2410><18xxxx><6><1><3fff><10><ff><0><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><242f><PIC18F242><18xxxx><2><1><3fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300005><0><1><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><2420><PIC18F2420><18xxxx><6><1><3fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2423><PIC18F2423><18xxxx><6><1><3fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2431><PIC18F2431><18xxxx><2><1><3fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC2><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO><Internal oscillator block, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><IRC><Internal oscillator block, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC1><101X External RC oscillator, CLKO function on RA6><a>
<SETTING_VALUE_TYPE><RC><11XX External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><Reserved><c>
<CONFIGREG_INFO_TYPE><300003><0><3f><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<SWITCH_INFO_TYPE><WINEN><Watchdog Timer Window Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><WDT window enabledbled><0>
<SETTING_VALUE_TYPE><OFF><WDT window disabled><20>
<CONFIGREG_INFO_TYPE><300004><0><3c><4>
<SWITCH_INFO_TYPE><PWMPIN><PWM output pins Reset state control><4><2>
<SETTING_VALUE_TYPE><ON><PWM outputs drive active states upon Reset><0>
<SETTING_VALUE_TYPE><OFF><PWM outputs disabled upon Reset (default)><4>
<SWITCH_INFO_TYPE><LPOL><Low-Side Transistors Polarity><8><2>
<SETTING_VALUE_TYPE><LOW><PWM0, 2, 4 and 6 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM0, 2, 4 and 6 are active-high><8>
<SWITCH_INFO_TYPE><HPOL><High-Side Transistors Polarity><10><2>
<SETTING_VALUE_TYPE><LOW><PWM1, 3, 5 and 7 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM1, 3, 5 and 7 are active-high><10>
<SWITCH_INFO_TYPE><T1OSCMX><Timer1 Oscillator MUX><20><2>
<SETTING_VALUE_TYPE><OFF><Standard (legacy) Timer1 oscillator operation><0>
<SETTING_VALUE_TYPE><ON><Low-power Timer1 operation when microcontroller is in Sleep mode><20>
<CONFIGREG_INFO_TYPE><300005><0><9d><1>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (002000-002FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (002000-002FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (003000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (003000-003FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (002000-002FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (002000-002FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (003000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (003000-003FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (002000-002FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (002000-002FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (003000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (003000-003FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2439><PIC18F2439><18xxxx><2><1><2fff><10><ff><ff><0-7f><f80-fff><0><a>
<CONFIGREG_INFO_TYPE><300001><0><22><1>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200h-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200h-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200h-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200h-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><2450><PIC18F2450><18xxxx><6><1><3fff><10><ff><0><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><46><4.6V><0>
<SETTING_VALUE_TYPE><43><4.3V><8>
<SETTING_VALUE_TYPE><28><2.8V><10>
<SETTING_VALUE_TYPE><21><2.1V><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><8><2>
<SETTING_VALUE_TYPE><BB1K><1KW Boot block size><0>
<SETTING_VALUE_TYPE><BB2K><2KW Boot block size><8>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) or (001000-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) or (001000-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) or (000000-000FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) or (000000-000FFFh) is not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) or (001000-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) or (001000-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) or (000000-000FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) or (000000-000FFFh) is not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) or (001000-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) or (001000-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) or (000000-000FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) or (000000-000FFFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2455><PIC18F2455><18xxxx><6><1><5fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting 4.59V><0>
<SETTING_VALUE_TYPE><1><Setting 2 4.33V><8>
<SETTING_VALUE_TYPE><2><Setting 1 2.79V><10>
<SETTING_VALUE_TYPE><3><Minimum setting 2.05V><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2458><PIC18F2458><18xxxx><6><1><5fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><8248><PIC18F248><18xxxx><2><1><3fff><10><ff><ff><0-5f><f60-fff><0><a>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><2480><PIC18F2480><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><10><2>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) boot block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) boot block><10>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><d410><PIC18F24J10><18xxxx><6><1><3ff7><10><ff><0><0-7f><f80-fff><0><5>
<CONFIGREG_INFO_TYPE><3ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><3ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><3ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLKO function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><3ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><3ffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><d411><PIC18F24J11><18xxxx><6><1><3ff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><3ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><3ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><3ffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><3ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><3ffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><3ffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><3ffe><0><cf><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><f><10>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><3fff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><d450><PIC18F24J50><18xxxx><6><1><3ff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><3ff8><0><ef><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset ><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><3ff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><3ffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><3ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><3ffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><3ffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><3ffe><0><cf><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><f><10>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><3fff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><d420><PIC18F24K20><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKOUT function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><18><VBOR set to 1.8 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><8b><5>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><d422><PIC18F24K22><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><25><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSHP><HS oscillator (high power > 16 MHz)><2>
<SETTING_VALUE_TYPE><HSMP><HS oscillator (medium power 4-16 MHz)><3>
<SETTING_VALUE_TYPE><ECHP><EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)><4>
<SETTING_VALUE_TYPE><ECHPIO6><EC oscillator (high power, >16 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECMP><EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)><a>
<SETTING_VALUE_TYPE><ECMPIO6><EC oscillator (medium power, 500 kHz-16 MHz)><b>
<SETTING_VALUE_TYPE><ECLP><EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)><c>
<SETTING_VALUE_TYPE><ECLPIO6><EC oscillator (low power, <500 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><4X PLL Enable><10><2>
<SETTING_VALUE_TYPE><OFF><Oscillator used directly><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PRICLKEN><Primary clock enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock can be disabled by software><0>
<SETTING_VALUE_TYPE><ON><Primary clock enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><285><VBOR set to 2.85 V nominal><0>
<SETTING_VALUE_TYPE><250><VBOR set to 2.50 V nominal><8>
<SETTING_VALUE_TYPE><220><VBOR set to 2.20 V nominal><10>
<SETTING_VALUE_TYPE><190><VBOR set to 1.90 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><Watch dog timer is always disabled. SWDTEN has no effect.><0>
<SETTING_VALUE_TYPE><NOSLP><WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect><1>
<SETTING_VALUE_TYPE><SWON><WDT is controlled by SWDTEN bit of the WDTCON register><2>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><bf><7>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><CCP3MX><P3A/CCP3 Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTC6><P3A/CCP3 input/output is mulitplexed with RC6><0>
<SETTING_VALUE_TYPE><PORTB5><P3A/CCP3 input/output is multiplexed with RB5><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><HFINTOSC output and ready status are delayed by the oscillator stable status><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC output and ready status are not delayed by the oscillator stable status><8>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock input mux bit><10><2>
<SETTING_VALUE_TYPE><PORTB5><T3CKI is on RB5><0>
<SETTING_VALUE_TYPE><PORTC0><T3CKI is on RC0><10>
<SWITCH_INFO_TYPE><P2BMX><ECCP2 B output mux bit><20><2>
<SETTING_VALUE_TYPE><PORTC0><P2B is on RC0><0>
<SETTING_VALUE_TYPE><PORTB5><P2B is on RB5><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><INTMCLR><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin enabled, RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2440><PIC18F24K40><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><a29a><PIC18F24K42><18XVxx><6><1><3fff><40><ff><ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><4>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><d451><PIC18F24K50><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><4>
<SWITCH_INFO_TYPE><PLLSEL><PLL Selection><1><2>
<SETTING_VALUE_TYPE><PLL4X><4x clock multiplier><0>
<SETTING_VALUE_TYPE><PLL3X><3x clock multiplier><1>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration bit><2><2>
<SETTING_VALUE_TYPE><OFF><PLL Disabled (firmware controlled)><0>
<SETTING_VALUE_TYPE><ON><PLL Enabled><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><18><4>
<SETTING_VALUE_TYPE><NOCLKDIV><CPU uses system clock (no divide)><0>
<SETTING_VALUE_TYPE><CLKDIV2><CPU uses system clock divided by 2><8>
<SETTING_VALUE_TYPE><CLKDIV3><CPU uses system clock divided by 3><10>
<SETTING_VALUE_TYPE><CLKDIV6><CPU uses system clock divided by 6><18>
<SWITCH_INFO_TYPE><LS48MHZ><Low Speed USB mode with 48 MHz system clock><20><2>
<SETTING_VALUE_TYPE><SYS24X4><System clock at 24 MHz, USB clock divider is set to 4><0>
<SETTING_VALUE_TYPE><SYS48X8><System clock at 48 MHz, USB clock divider is set to 8><20>
<CONFIGREG_INFO_TYPE><300001><0><25><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSH><HS oscillator, high power 16MHz to 25MHz><2>
<SETTING_VALUE_TYPE><HSM><HS oscillator, medium power 4MHz to 16MHz><3>
<SETTING_VALUE_TYPE><ECHCLKO><EC oscillator, high power 16MHz to 48MHz, clock output on OSC2><4>
<SETTING_VALUE_TYPE><ECHIO><EC oscillator, high power 16MHz to 48MHz><5>
<SETTING_VALUE_TYPE><RCCLKO><External RC oscillator, clock output on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTOSCIO><Internal oscillator><8>
<SETTING_VALUE_TYPE><INTOSCCLKO><Internal oscillator, clock output on OSC2><9>
<SETTING_VALUE_TYPE><ECMCLKO><EC oscillator, medium power 4MHz to 16MHz, clock output on OSC2><a>
<SETTING_VALUE_TYPE><ECMIO><EC oscillator, medium power 4MHz to 16MHz><b>
<SETTING_VALUE_TYPE><ECLCLKO><EC oscillator, low power <4MHz, clock output on OSC2><c>
<SETTING_VALUE_TYPE><ECLIO><EC oscillator, low power <4MHz><d>
<SWITCH_INFO_TYPE><PCLKEN><Primary Oscillator Shutdown><20><2>
<SETTING_VALUE_TYPE><OFF><Primary oscillator shutdown firmware controlled><0>
<SETTING_VALUE_TYPE><ON><Primary oscillator enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><5f><4>
<SWITCH_INFO_TYPE><nPWRTEN><Power-up Timer Enable><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><6><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled in hardware (SBOREN is ignored)><0>
<SETTING_VALUE_TYPE><ON><BOR controlled by firmware (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><BOR enabled in hardware, disabled in Sleep mode (SBOREN is ignored)><4>
<SETTING_VALUE_TYPE><SBORDIS><BOR enabled in hardware (SBOREN is ignored)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><18><4>
<SETTING_VALUE_TYPE><285><BOR set to 2.85V nominal><0>
<SETTING_VALUE_TYPE><250><BOR set to 2.5V nominal><8>
<SETTING_VALUE_TYPE><220><BOR set to 2.2V nominal><10>
<SETTING_VALUE_TYPE><190><BOR set to 1.9V nominal><18>
<SWITCH_INFO_TYPE><nLPBOR><Low-Power Brown-out Reset><40><2>
<SETTING_VALUE_TYPE><ON><Low-Power Brown-out Reset enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power Brown-out Reset disabled><40>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware (SWDTEN ignored)><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled in hardware, disabled in Sleep mode (SWDTEN ignored)><1>
<SETTING_VALUE_TYPE><SWON><WDT controlled by firmware (SWDTEN enabled)><2>
<SETTING_VALUE_TYPE><ON><WDT enabled in hardware (SWDTEN ignored)><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><d3><5>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><RB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock Input MUX bit><10><2>
<SETTING_VALUE_TYPE><RB5><T3CKI function is on RB5><0>
<SETTING_VALUE_TYPE><RC0><T3CKI function is on RC0><10>
<SWITCH_INFO_TYPE><SDOMX><SDO Output MUX bit><40><2>
<SETTING_VALUE_TYPE><RC7><SDO function is on RC7><0>
<SETTING_VALUE_TYPE><RB3><SDO function is on RB3><40>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Reset Pin Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; external MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><ICPRT><Dedicated In-Circuit Debug/Programming Port Enable><20><1>
<SETTING_VALUE_TYPE><OFF><ICPORT disabled><0>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Block 0 Code Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Block 1 Code Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Block 0 Write Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (0800-1FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (0800-1FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Block 1 Write Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (2000-3FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (2000-3FFFh) is not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Registers Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (0000-7FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (0000-7FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Block 0 Table Read Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Block 1 Table Read Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a2a6><PIC18F24Q10><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved (DO NOT USE)><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin (RE3) is an input; If LVP =1, MCLR pin (RE3) is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin (RE3) is MCLR><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Low power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power BOR is disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT disabled in sleep, enabled when not in sleep><40>
<SETTING_VALUE_TYPE><ON><WDT always enabled><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 % of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 % of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 % of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 % of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 % of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 % of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><2510><PIC18F2510><18xxxx><6><1><7fff><10><ff><0><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2515><PIC18F2515><18xxxx><6><1><bfff><10><ff><0><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><252f><PIC18F252><18xxxx><2><1><7fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300005><0><1><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from Table Reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><2520><PIC18F2520><18xxxx><6><1><7fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2523><PIC18F2523><18xxxx><6><1><7fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2525><PIC18F2525><18xxxx><6><1><bfff><10><ff><3ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKOUT function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2539><PIC18F2539><18xxxx><2><1><5fff><10><ff><ff><0-7f><f80-fff><0><a>
<CONFIGREG_INFO_TYPE><300001><0><22><1>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200h-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200h-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200h-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200h-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><2550><PIC18F2550><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting 4.59V><0>
<SETTING_VALUE_TYPE><1><Setting 2 4.33V><8>
<SETTING_VALUE_TYPE><2><Setting 1 2.79V><10>
<SETTING_VALUE_TYPE><3><Minimum setting 2.05V><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2553><PIC18F2553><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><8258><PIC18F258><18xxxx><2><1><7fff><10><ff><ff><0-5f><f60-fff><0><a>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from Table Reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><2580><PIC18F2580><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><10><2>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) boot block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) boot block><10>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2585><PIC18F2585><18xxxx><6><1><bfff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) Boot Block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) Boot Block><10>
<SETTING_VALUE_TYPE><4096><4K words (8K bytes) Boot Block><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><d510><PIC18F25J10><18xxxx><6><1><7ff7><10><ff><0><0-7f><f80-fff><0><5>
<CONFIGREG_INFO_TYPE><7ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLKO function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><d511><PIC18F25J11><18xxxx><6><1><7ff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><7ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><7ffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><7ffe><0><df><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><1f><20>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><7fff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><d550><PIC18F25J50><18xxxx><6><1><7ff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><7ff8><0><ef><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><7ffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><7ffe><0><df><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><1f><20>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><7fff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><d520><PIC18F25K20><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKOUT function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><18><VBOR set to 1.8 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><8b><5>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><d522><PIC18F25K22><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><25><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSHP><HS oscillator (high power > 16 MHz)><2>
<SETTING_VALUE_TYPE><HSMP><HS oscillator (medium power 4-16 MHz)><3>
<SETTING_VALUE_TYPE><ECHP><EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)><4>
<SETTING_VALUE_TYPE><ECHPIO6><EC oscillator (high power, >16 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECMP><EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)><a>
<SETTING_VALUE_TYPE><ECMPIO6><EC oscillator (medium power, 500 kHz-16 MHz)><b>
<SETTING_VALUE_TYPE><ECLP><EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)><c>
<SETTING_VALUE_TYPE><ECLPIO6><EC oscillator (low power, <500 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><4X PLL Enable><10><2>
<SETTING_VALUE_TYPE><OFF><Oscillator used directly><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PRICLKEN><Primary clock enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock can be disabled by software><0>
<SETTING_VALUE_TYPE><ON><Primary clock enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><285><VBOR set to 2.85 V nominal><0>
<SETTING_VALUE_TYPE><250><VBOR set to 2.50 V nominal><8>
<SETTING_VALUE_TYPE><220><VBOR set to 2.20 V nominal><10>
<SETTING_VALUE_TYPE><190><VBOR set to 1.90 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><Watch dog timer is always disabled. SWDTEN has no effect.><0>
<SETTING_VALUE_TYPE><NOSLP><WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect><1>
<SETTING_VALUE_TYPE><SWON><WDT is controlled by SWDTEN bit of the WDTCON register><2>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><bf><7>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><CCP3MX><P3A/CCP3 Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTC6><P3A/CCP3 input/output is mulitplexed with RC6><0>
<SETTING_VALUE_TYPE><PORTB5><P3A/CCP3 input/output is multiplexed with RB5><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><HFINTOSC output and ready status are delayed by the oscillator stable status><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC output and ready status are not delayed by the oscillator stable status><8>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock input mux bit><10><2>
<SETTING_VALUE_TYPE><PORTB5><T3CKI is on RB5><0>
<SETTING_VALUE_TYPE><PORTC0><T3CKI is on RC0><10>
<SWITCH_INFO_TYPE><P2BMX><ECCP2 B output mux bit><20><2>
<SETTING_VALUE_TYPE><PORTC0><P2B is on RC0><0>
<SETTING_VALUE_TYPE><PORTB5><P2B is on RB5><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><INTMCLR><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin enabled, RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2540><PIC18F25K40><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><a29b><PIC18F25K42><18XVxx><6><1><7fff><40><ff><ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><5>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><d551><PIC18F25K50><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><4>
<SWITCH_INFO_TYPE><PLLSEL><PLL Selection><1><2>
<SETTING_VALUE_TYPE><PLL4X><4x clock multiplier><0>
<SETTING_VALUE_TYPE><PLL3X><3x clock multiplier><1>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration bit><2><2>
<SETTING_VALUE_TYPE><OFF><PLL Disabled (firmware controlled)><0>
<SETTING_VALUE_TYPE><ON><PLL Enabled><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><18><4>
<SETTING_VALUE_TYPE><NOCLKDIV><CPU uses system clock (no divide)><0>
<SETTING_VALUE_TYPE><CLKDIV2><CPU uses system clock divided by 2><8>
<SETTING_VALUE_TYPE><CLKDIV3><CPU uses system clock divided by 3><10>
<SETTING_VALUE_TYPE><CLKDIV6><CPU uses system clock divided by 6><18>
<SWITCH_INFO_TYPE><LS48MHZ><Low Speed USB mode with 48 MHz system clock><20><2>
<SETTING_VALUE_TYPE><SYS24X4><System clock at 24 MHz, USB clock divider is set to 4><0>
<SETTING_VALUE_TYPE><SYS48X8><System clock at 48 MHz, USB clock divider is set to 8><20>
<CONFIGREG_INFO_TYPE><300001><0><25><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSH><HS oscillator, high power 16MHz to 25MHz><2>
<SETTING_VALUE_TYPE><HSM><HS oscillator, medium power 4MHz to 16MHz><3>
<SETTING_VALUE_TYPE><ECHCLKO><EC oscillator, high power 16MHz to 48MHz, clock output on OSC2><4>
<SETTING_VALUE_TYPE><ECHIO><EC oscillator, high power 16MHz to 48MHz><5>
<SETTING_VALUE_TYPE><RCCLKO><External RC oscillator, clock output on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTOSCIO><Internal oscillator><8>
<SETTING_VALUE_TYPE><INTOSCCLKO><Internal oscillator, clock output on OSC2><9>
<SETTING_VALUE_TYPE><ECMCLKO><EC oscillator, medium power 4MHz to 16MHz, clock output on OSC2><a>
<SETTING_VALUE_TYPE><ECMIO><EC oscillator, medium power 4MHz to 16MHz><b>
<SETTING_VALUE_TYPE><ECLCLKO><EC oscillator, low power <4MHz, clock output on OSC2><c>
<SETTING_VALUE_TYPE><ECLIO><EC oscillator, low power <4MHz><d>
<SWITCH_INFO_TYPE><PCLKEN><Primary Oscillator Shutdown><20><2>
<SETTING_VALUE_TYPE><OFF><Primary oscillator shutdown firmware controlled><0>
<SETTING_VALUE_TYPE><ON><Primary oscillator enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><5f><4>
<SWITCH_INFO_TYPE><nPWRTEN><Power-up Timer Enable><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><6><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled in hardware (SBOREN is ignored)><0>
<SETTING_VALUE_TYPE><ON><BOR controlled by firmware (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><BOR enabled in hardware, disabled in Sleep mode (SBOREN is ignored)><4>
<SETTING_VALUE_TYPE><SBORDIS><BOR enabled in hardware (SBOREN is ignored)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><18><4>
<SETTING_VALUE_TYPE><285><BOR set to 2.85V nominal><0>
<SETTING_VALUE_TYPE><250><BOR set to 2.5V nominal><8>
<SETTING_VALUE_TYPE><220><BOR set to 2.2V nominal><10>
<SETTING_VALUE_TYPE><190><BOR set to 1.9V nominal><18>
<SWITCH_INFO_TYPE><nLPBOR><Low-Power Brown-out Reset><40><2>
<SETTING_VALUE_TYPE><ON><Low-Power Brown-out Reset enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power Brown-out Reset disabled><40>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware (SWDTEN ignored)><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled in hardware, disabled in Sleep mode (SWDTEN ignored)><1>
<SETTING_VALUE_TYPE><SWON><WDT controlled by firmware (SWDTEN enabled)><2>
<SETTING_VALUE_TYPE><ON><WDT enabled in hardware (SWDTEN ignored)><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><d3><5>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><RB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock Input MUX bit><10><2>
<SETTING_VALUE_TYPE><RB5><T3CKI function is on RB5><0>
<SETTING_VALUE_TYPE><RC0><T3CKI function is on RC0><10>
<SWITCH_INFO_TYPE><SDOMX><SDO Output MUX bit><40><2>
<SETTING_VALUE_TYPE><RC7><SDO function is on RC7><0>
<SETTING_VALUE_TYPE><RB3><SDO function is on RB3><40>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Reset Pin Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; external MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><ICPRT><Dedicated In-Circuit Debug/Programming Port Enable><20><1>
<SETTING_VALUE_TYPE><OFF><ICPORT disabled><0>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Block 0 Code Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Block 1 Code Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Block 2 Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 is not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Block 3 Code Protect><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 is not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Block 0 Write Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (0800-1FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (0800-1FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Block 1 Write Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (2000-3FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (2000-3FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Block 2 Write Protect><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (04000-5FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (04000-5FFFh) is not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Block 3 Write Protect><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (06000-7FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (06000-7FFFh) is not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Registers Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (0000-7FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (0000-7FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Block 0 Table Read Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Block 1 Table Read Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Block 2 Table Read Protect><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 is not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Block 3 Table Read Protect><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 is not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a580><PIC18F25K80><18xxxx><6><1><7fff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Ultra low-power regulator is Enabled (Controlled by SRETEN bit)><0>
<SETTING_VALUE_TYPE><OFF><Ultra low-power regulator is Disabled (Controlled by REGSLP bit)><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300005><0><89><3>
<SWITCH_INFO_TYPE><CANMX><ECAN Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTC><ECAN TX and RX pins are located on RC6 and RC7, respectively><0>
<SETTING_VALUE_TYPE><PORTB><ECAN TX and RX pins are located on RB2 and RB3, respectively><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RE3 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RE3 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><a2c8><PIC18F25K83><18XVxx><6><1><7fff><40><ff><3ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><5>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><a2a8><PIC18F25Q10><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved (DO NOT USE)><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin (RE3) is an input; If LVP =1, MCLR pin (RE3) is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin (RE3) is MCLR><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Low power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power BOR is disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT disabled in sleep, enabled when not in sleep><40>
<SETTING_VALUE_TYPE><ON><WDT always enabled><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 % of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 % of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 % of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 % of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 % of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 % of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><2610><PIC18F2610><18xxxx><6><1><ffff><10><ff><0><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2620><PIC18F2620><18xxxx><6><1><ffff><10><ff><3ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKOUT function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2680><PIC18F2680><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) Boot Block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) Boot Block><10>
<SETTING_VALUE_TYPE><4096><4K words (8K bytes) Boot Block><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2682><PIC18F2682><18xxxx><6><1><13fff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) Boot Block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) Boot Block><10>
<SETTING_VALUE_TYPE><4096><4K words (8K bytes) Boot Block><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3f><5>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3f><5>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3f><5>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2685><PIC18F2685><18xxxx><6><1><17fff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) Boot Block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) Boot Block><10>
<SETTING_VALUE_TYPE><4096><4K words (8K bytes) Boot Block><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3f><6>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3f><6>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3f><6>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><d611><PIC18F26J11><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><fffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffe><0><ff><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><3f><40>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><ffff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><d616><PIC18F26J13><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><fff8><0><ff><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><96MHz PLL Prescaler Selection (PLLSEL=0)><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration Bit><10><2>
<SETTING_VALUE_TYPE><ON><PLL Enabled><0>
<SETTING_VALUE_TYPE><OFF><PLL Disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><ff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><18><4>
<SETTING_VALUE_TYPE><RESERVED><Reserved><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode selected><10>
<SETTING_VALUE_TYPE><HIGH><High Power T1OSC/SOSC circuit selected><18>
<SWITCH_INFO_TYPE><CLKOEC><EC Clock Out Enable Bit ><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><fffd><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><ADCSEL><ADC 10 or 12 Bit Select><2><2>
<SETTING_VALUE_TYPE><BIT12><12 - Bit ADC Enabled><0>
<SETTING_VALUE_TYPE><BIT10><10 - Bit ADC Enabled><2>
<SWITCH_INFO_TYPE><PLLSEL><PLL Selection Bit><4><2>
<SETTING_VALUE_TYPE><PLL96><Selects 96MHz PLL><0>
<SETTING_VALUE_TYPE><PLL4X><Selects 4x PLL><4>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffe><0><bf><2>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><3f><40>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region ><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><ffff><0><f3><2>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<6:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<6:0>/WPEND region ignored><1>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select bit (valid when WPDIS = 0)><2><2>
<SETTING_VALUE_TYPE><PAGE_0><Pages 0 through WPFP<6:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Pages WPFP<6:0> through Configuration Words erase/write protected><2>
<PART_INFO_TYPE><d650><PIC18F26J50><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><fff8><0><ef><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset ><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><fff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><fffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffe><0><ff><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><3f><40>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><ffff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><d655><PIC18F26J53><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><fff8><0><ff><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration Bit><10><2>
<SETTING_VALUE_TYPE><ON><PLL Enabled><0>
<SETTING_VALUE_TYPE><OFF><PLL Disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><fff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><ff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><18><4>
<SETTING_VALUE_TYPE><RESERVED><Reserved><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode selected><10>
<SETTING_VALUE_TYPE><HIGH><High Power T1OSC/SOSC circuit selected><18>
<SWITCH_INFO_TYPE><CLKOEC><EC Clock Out Enable Bit ><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><fffd><0><fb><3>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><ADCSEL><ADC 10 or 12 Bit Select><2><2>
<SETTING_VALUE_TYPE><BIT12><12 - Bit ADC Enabled><0>
<SETTING_VALUE_TYPE><BIT10><10 - Bit ADC Enabled><2>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffe><0><bf><2>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><3f><40>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region ><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><ffff><0><fb><3>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<6:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<6:0>/WPEND region ignored><1>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select bit (valid when WPDIS = 0)><2><2>
<SETTING_VALUE_TYPE><PAGE_0><Pages 0 through WPFP<6:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Pages WPFP<6:0> through Configuration Words erase/write protected><2>
<SWITCH_INFO_TYPE><LS48MHZ><Low Speed USB mode with 48 MHz system clock bit><8><2>
<SETTING_VALUE_TYPE><SYS24X4><System clock at 24 MHz USB CLKEN divide-by is set to 4><0>
<SETTING_VALUE_TYPE><SYS48X8><System clock at 48 MHz USB CLKEN divide-by is set to 8><8>
<PART_INFO_TYPE><d620><PIC18F26K20><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKOUT function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><18><VBOR set to 1.8 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><8b><5>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000h-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000h-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><d622><PIC18F26K22><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><25><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSHP><HS oscillator (high power > 16 MHz)><2>
<SETTING_VALUE_TYPE><HSMP><HS oscillator (medium power 4-16 MHz)><3>
<SETTING_VALUE_TYPE><ECHP><EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)><4>
<SETTING_VALUE_TYPE><ECHPIO6><EC oscillator (high power, >16 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECMP><EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)><a>
<SETTING_VALUE_TYPE><ECMPIO6><EC oscillator (medium power, 500 kHz-16 MHz)><b>
<SETTING_VALUE_TYPE><ECLP><EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)><c>
<SETTING_VALUE_TYPE><ECLPIO6><EC oscillator (low power, <500 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><4X PLL Enable><10><2>
<SETTING_VALUE_TYPE><OFF><Oscillator used directly><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PRICLKEN><Primary clock enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock can be disabled by software><0>
<SETTING_VALUE_TYPE><ON><Primary clock enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><285><VBOR set to 2.85 V nominal><0>
<SETTING_VALUE_TYPE><250><VBOR set to 2.50 V nominal><8>
<SETTING_VALUE_TYPE><220><VBOR set to 2.20 V nominal><10>
<SETTING_VALUE_TYPE><190><VBOR set to 1.90 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><Watch dog timer is always disabled. SWDTEN has no effect.><0>
<SETTING_VALUE_TYPE><NOSLP><WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect><1>
<SETTING_VALUE_TYPE><SWON><WDT is controlled by SWDTEN bit of the WDTCON register><2>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><bf><7>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><CCP3MX><P3A/CCP3 Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTC6><P3A/CCP3 input/output is mulitplexed with RC6><0>
<SETTING_VALUE_TYPE><PORTB5><P3A/CCP3 input/output is multiplexed with RB5><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><HFINTOSC output and ready status are delayed by the oscillator stable status><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC output and ready status are not delayed by the oscillator stable status><8>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock input mux bit><10><2>
<SETTING_VALUE_TYPE><PORTB5><T3CKI is on RB5><0>
<SETTING_VALUE_TYPE><PORTC0><T3CKI is on RC0><10>
<SWITCH_INFO_TYPE><P2BMX><ECCP2 B output mux bit><20><2>
<SETTING_VALUE_TYPE><PORTC0><P2B is on RC0><0>
<SETTING_VALUE_TYPE><PORTB5><P2B is on RB5><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><INTMCLR><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin enabled, RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><2640><PIC18F26K40><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><a2be><PIC18F26K42><18XVxx><6><1><ffff><40><ff><3ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><6>
<SETTING_VALUE_TYPE><BBSIZE_16384><Boot Block size is 16384 words><2>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><a680><PIC18F26K80><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Ultra low-power regulator is Enabled (Controlled by SRETEN bit)><0>
<SETTING_VALUE_TYPE><OFF><Ultra low-power regulator is Disabled (Controlled by REGSLP bit)><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300005><0><89><3>
<SWITCH_INFO_TYPE><CANMX><ECAN Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTC><ECAN TX and RX pins are located on RC6 and RC7, respectively><0>
<SETTING_VALUE_TYPE><PORTB><ECAN TX and RX pins are located on RB2 and RB3, respectively><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RE3 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RE3 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><a2c9><PIC18F26K83><18XVxx><6><1><ffff><40><ff><3ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><6>
<SETTING_VALUE_TYPE><BBSIZE_16384><Boot Block size is 16384 words><2>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><a2d2><PIC18F26Q10><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved (DO NOT USE)><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin (RE3) is an input; If LVP =1, MCLR pin (RE3) is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin (RE3) is MCLR><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Low power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power BOR is disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT disabled in sleep, enabled when not in sleep><40>
<SETTING_VALUE_TYPE><ON><WDT always enabled><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 % of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 % of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 % of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 % of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 % of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 % of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><d711><PIC18F27J13><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><1fff8><0><ff><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><96MHz PLL Prescaler Selection (PLLSEL=0)><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration Bit><10><2>
<SETTING_VALUE_TYPE><ON><PLL Enabled><0>
<SETTING_VALUE_TYPE><OFF><PLL Disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><1fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fffa><0><ff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><18><4>
<SETTING_VALUE_TYPE><RESERVED><Reserved><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode selected><10>
<SETTING_VALUE_TYPE><HIGH><High Power T1OSC/SOSC circuit selected><18>
<SWITCH_INFO_TYPE><CLKOEC><EC Clock Out Enable Bit ><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><1fffd><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><ADCSEL><ADC 10 or 12 Bit Select><2><2>
<SETTING_VALUE_TYPE><BIT12><12 - Bit ADC Enabled><0>
<SETTING_VALUE_TYPE><BIT10><10 - Bit ADC Enabled><2>
<SWITCH_INFO_TYPE><PLLSEL><PLL Selection Bit><4><2>
<SETTING_VALUE_TYPE><PLL96><Selects 96MHz PLL><0>
<SETTING_VALUE_TYPE><PLL4X><Selects 4x PLL><4>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><1fffe><0><ff><2>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><7f><80>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><PAGE_64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><PAGE_65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><PAGE_66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><PAGE_67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><PAGE_68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><PAGE_69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><PAGE_70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><PAGE_71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><PAGE_72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><PAGE_73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><PAGE_74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><PAGE_75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><PAGE_76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><PAGE_77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><PAGE_78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><PAGE_79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><PAGE_80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><PAGE_81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><PAGE_82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><PAGE_83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><PAGE_84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><PAGE_85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><PAGE_86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><PAGE_87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><PAGE_88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><PAGE_89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><PAGE_90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><PAGE_91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><PAGE_92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><PAGE_93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><PAGE_94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><PAGE_95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><PAGE_96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><PAGE_97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><PAGE_98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><PAGE_99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><PAGE_100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><PAGE_101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><PAGE_102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><PAGE_103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><PAGE_104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><PAGE_105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><PAGE_106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><PAGE_107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><PAGE_108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><PAGE_109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><PAGE_110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><PAGE_111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><PAGE_112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><PAGE_113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><PAGE_114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><PAGE_115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><PAGE_116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><PAGE_117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><PAGE_118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><PAGE_119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><PAGE_120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><PAGE_121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><PAGE_122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><PAGE_123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><PAGE_124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><PAGE_125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><PAGE_126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><PAGE_127><Write Protect Program Flash Page 127><7f>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region ><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><1ffff><0><f3><2>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<6:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<6:0>/WPEND region ignored><1>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select bit (valid when WPDIS = 0)><2><2>
<SETTING_VALUE_TYPE><PAGE_0><Pages 0 through WPFP<6:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Pages WPFP<6:0> through Configuration Words erase/write protected><2>
<PART_INFO_TYPE><d750><PIC18F27J53><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><1fff8><0><ff><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration Bit><10><2>
<SETTING_VALUE_TYPE><ON><PLL Enabled><0>
<SETTING_VALUE_TYPE><OFF><PLL Disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><1fff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fffa><0><ff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><18><4>
<SETTING_VALUE_TYPE><RESERVED><Reserved><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode selected><10>
<SETTING_VALUE_TYPE><HIGH><High Power T1OSC/SOSC circuit selected><18>
<SWITCH_INFO_TYPE><CLKOEC><EC Clock Out Enable Bit ><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><1fffd><0><fb><3>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><ADCSEL><ADC 10 or 12 Bit Select><2><2>
<SETTING_VALUE_TYPE><BIT12><12 - Bit ADC Enabled><0>
<SETTING_VALUE_TYPE><BIT10><10 - Bit ADC Enabled><2>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><1fffe><0><ff><2>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><7f><80>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><PAGE_64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><PAGE_65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><PAGE_66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><PAGE_67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><PAGE_68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><PAGE_69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><PAGE_70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><PAGE_71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><PAGE_72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><PAGE_73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><PAGE_74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><PAGE_75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><PAGE_76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><PAGE_77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><PAGE_78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><PAGE_79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><PAGE_80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><PAGE_81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><PAGE_82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><PAGE_83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><PAGE_84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><PAGE_85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><PAGE_86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><PAGE_87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><PAGE_88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><PAGE_89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><PAGE_90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><PAGE_91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><PAGE_92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><PAGE_93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><PAGE_94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><PAGE_95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><PAGE_96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><PAGE_97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><PAGE_98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><PAGE_99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><PAGE_100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><PAGE_101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><PAGE_102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><PAGE_103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><PAGE_104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><PAGE_105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><PAGE_106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><PAGE_107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><PAGE_108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><PAGE_109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><PAGE_110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><PAGE_111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><PAGE_112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><PAGE_113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><PAGE_114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><PAGE_115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><PAGE_116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><PAGE_117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><PAGE_118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><PAGE_119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><PAGE_120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><PAGE_121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><PAGE_122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><PAGE_123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><PAGE_124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><PAGE_125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><PAGE_126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><PAGE_127><Write Protect Program Flash Page 127><7f>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region ><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><1ffff><0><fb><3>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<6:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<6:0>/WPEND region ignored><1>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select bit (valid when WPDIS = 0)><2><2>
<SETTING_VALUE_TYPE><PAGE_0><Pages 0 through WPFP<6:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Pages WPFP<6:0> through Configuration Words erase/write protected><2>
<SWITCH_INFO_TYPE><LS48MHZ><Low Speed USB mode with 48 MHz system clock bit><8><2>
<SETTING_VALUE_TYPE><SYS24X4><System clock at 24 MHz USB CLKEN divide-by is set to 4><0>
<SETTING_VALUE_TYPE><SYS48X8><System clock at 48 MHz USB CLKEN divide-by is set to 8><8>
<PART_INFO_TYPE><2740><PIC18F27K40><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><a2cb><PIC18F27K42><18XVxx><6><1><1ffff><40><ff><3ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><7>
<SETTING_VALUE_TYPE><BBSIZE_32768><Boot Block size is 32768 words><1>
<SETTING_VALUE_TYPE><BBSIZE_16384><Boot Block size is 16384 words><2>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><a2e7><PIC18F27Q10><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved (DO NOT USE)><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin (RE3) is an input; If LVP =1, MCLR pin (RE3) is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin (RE3) is MCLR><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Low power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power BOR is disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT disabled in sleep, enabled when not in sleep><40>
<SETTING_VALUE_TYPE><ON><WDT always enabled><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 % of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 % of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 % of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 % of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 % of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 % of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) not write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><a422><PIC18F4220><18xxxx><2><1><fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FSCM><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBAD><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><DIG><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ANA><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR disabled; RE3 input is enabled in 40-pin devices only (PIC18F4X20)><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4221><PIC18F4221><18xxxx><6><1><fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum Setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum Setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><RB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><DIG><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ANA><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><2>
<SETTING_VALUE_TYPE><BB256>< 256 Word><0>
<SETTING_VALUE_TYPE><BB512>< 512 Word><30>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bitProtect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a432><PIC18F4320><18xxxx><2><1><1fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FSCM><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBAD><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><DIG><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ANA><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR disabled; RE3 input is enabled in 40-pin devices only (PIC18F4X20)><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (001000-0017FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (001000-0017FFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (001800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (001800-001FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (001000-0017FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (001000-0017FFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (001800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (001800-001FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (001000-0017FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (001000-0017FFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (001800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (001800-001FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4321><PIC18F4321><18xxxx><6><1><1fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum Setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum Setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><RB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><DIG><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ANA><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB256>< 256 Word><0>
<SETTING_VALUE_TYPE><BB512>< 512 Word><10>
<SETTING_VALUE_TYPE><BB1K><1024 Word><30>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bitProtect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4331><PIC18F4331><18xxxx><2><1><1fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC2><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO><Internal oscillator block, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><IRC><Internal oscillator block, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC1><101X External RC oscillator, CLKO function on RA6><a>
<SETTING_VALUE_TYPE><RC><11XX External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><Reserved><c>
<CONFIGREG_INFO_TYPE><300003><0><3f><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<SWITCH_INFO_TYPE><WINEN><Watchdog Timer Window Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><WDT window enabledbled><0>
<SETTING_VALUE_TYPE><OFF><WDT window disabled><20>
<CONFIGREG_INFO_TYPE><300004><0><3c><4>
<SWITCH_INFO_TYPE><PWMPIN><PWM output pins Reset state control><4><2>
<SETTING_VALUE_TYPE><ON><PWM outputs drive active states upon Reset><0>
<SETTING_VALUE_TYPE><OFF><PWM outputs disabled upon Reset (default)><4>
<SWITCH_INFO_TYPE><LPOL><Low-Side Transistors Polarity><8><2>
<SETTING_VALUE_TYPE><LOW><PWM0, 2, 4 and 6 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM0, 2, 4 and 6 are active-high><8>
<SWITCH_INFO_TYPE><HPOL><High-Side Transistors Polarity><10><2>
<SETTING_VALUE_TYPE><LOW><PWM1, 3, 5 and 7 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM1, 3, 5 and 7 are active-high><10>
<SWITCH_INFO_TYPE><T1OSCMX><Timer1 Oscillator MUX><20><2>
<SETTING_VALUE_TYPE><OFF><Standard (legacy) Timer1 oscillator operation><0>
<SETTING_VALUE_TYPE><ON><Low-power Timer1 operation when microcontroller is in Sleep mode><20>
<CONFIGREG_INFO_TYPE><300005><0><9d><5>
<SWITCH_INFO_TYPE><FLTAMX><FLTA MUX bit><1><2>
<SETTING_VALUE_TYPE><RD4><FLTA input is multiplexed with RD4><0>
<SETTING_VALUE_TYPE><RC1><FLTA input is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><SSPMX><SSP I/O MUX bit><4><2>
<SETTING_VALUE_TYPE><RD1><SCK/SCL clocks and SDA/SDI data are multiplexed with RD3 and RD2, respectively. SDO output is multiplexed with RD1.><0>
<SETTING_VALUE_TYPE><RC7><SCK/SCL clocks and SDA/SDI data are multiplexed with RC5 and RC4, respectively. SDO output is multiplexed with RC7.><4>
<SWITCH_INFO_TYPE><PWM4MX><PWM4 MUX bit><8><2>
<SETTING_VALUE_TYPE><RD5><PWM4 output is multiplexed with RD5><0>
<SETTING_VALUE_TYPE><RB5><PWM4 output is multiplexed with RB5><8>
<SWITCH_INFO_TYPE><EXCLKMX><TMR0/T5CKI External clock MUX bit><10><2>
<SETTING_VALUE_TYPE><RD0><TMR0/T5CKI external clock input is multiplexed with RD0><0>
<SETTING_VALUE_TYPE><RC3><TMR0/T5CKI external clock input is multiplexed with RC3><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><e320><PIC18F43K20><18xxxx><6><1><1fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKOUT function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><18><VBOR set to 1.8 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><8b><5>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><e322><PIC18F43K22><18xxxx><6><1><1fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><25><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSHP><HS oscillator (high power > 16 MHz)><2>
<SETTING_VALUE_TYPE><HSMP><HS oscillator (medium power 4-16 MHz)><3>
<SETTING_VALUE_TYPE><ECHP><EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)><4>
<SETTING_VALUE_TYPE><ECHPIO6><EC oscillator (high power, >16 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECMP><EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)><a>
<SETTING_VALUE_TYPE><ECMPIO6><EC oscillator (medium power, 500 kHz-16 MHz)><b>
<SETTING_VALUE_TYPE><ECLP><EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)><c>
<SETTING_VALUE_TYPE><ECLPIO6><EC oscillator (low power, <500 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><4X PLL Enable><10><2>
<SETTING_VALUE_TYPE><OFF><Oscillator used directly><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PRICLKEN><Primary clock enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock can be disabled by software><0>
<SETTING_VALUE_TYPE><ON><Primary clock is always enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><285><VBOR set to 2.85 V nominal><0>
<SETTING_VALUE_TYPE><250><VBOR set to 2.50 V nominal><8>
<SETTING_VALUE_TYPE><220><VBOR set to 2.20 V nominal><10>
<SETTING_VALUE_TYPE><190><VBOR set to 1.90 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><Watch dog timer is always disabled. SWDTEN has no effect.><0>
<SETTING_VALUE_TYPE><NOSLP><WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect><1>
<SETTING_VALUE_TYPE><SWON><WDT is controlled by SWDTEN bit of the WDTCON register><2>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><bf><7>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><CCP3MX><P3A/CCP3 Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTE0><P3A/CCP3 input/output is mulitplexed with RE0><0>
<SETTING_VALUE_TYPE><PORTB5><P3A/CCP3 input/output is multiplexed with RB5><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><HFINTOSC output and ready status are delayed by the oscillator stable status><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC output and ready status are not delayed by the oscillator stable status><8>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock input mux bit><10><2>
<SETTING_VALUE_TYPE><PORTB5><T3CKI is on RB5><0>
<SETTING_VALUE_TYPE><PORTC0><T3CKI is on RC0><10>
<SWITCH_INFO_TYPE><P2BMX><ECCP2 B output mux bit><20><2>
<SETTING_VALUE_TYPE><PORTC0><P2B is on RC0><0>
<SETTING_VALUE_TYPE><PORTD2><P2B is on RD2><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><INTMCLR><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin enabled, RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4410><PIC18F4410><18xxxx><6><1><3fff><10><ff><0><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><442f><PIC18F442><18xxxx><2><1><3fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300005><0><1><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><4420><PIC18F4420><18xxxx><6><1><3fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4423><PIC18F4423><18xxxx><6><1><3fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4431><PIC18F4431><18xxxx><2><1><3fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC2><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO><Internal oscillator block, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><IRC><Internal oscillator block, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC1><101X External RC oscillator, CLKO function on RA6><a>
<SETTING_VALUE_TYPE><RC><11XX External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><Reserved><c>
<CONFIGREG_INFO_TYPE><300003><0><3f><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<SWITCH_INFO_TYPE><WINEN><Watchdog Timer Window Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><WDT window enabledbled><0>
<SETTING_VALUE_TYPE><OFF><WDT window disabled><20>
<CONFIGREG_INFO_TYPE><300004><0><3c><4>
<SWITCH_INFO_TYPE><PWMPIN><PWM output pins Reset state control><4><2>
<SETTING_VALUE_TYPE><ON><PWM outputs drive active states upon Reset><0>
<SETTING_VALUE_TYPE><OFF><PWM outputs disabled upon Reset (default)><4>
<SWITCH_INFO_TYPE><LPOL><Low-Side Transistors Polarity><8><2>
<SETTING_VALUE_TYPE><LOW><PWM0, 2, 4 and 6 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM0, 2, 4 and 6 are active-high><8>
<SWITCH_INFO_TYPE><HPOL><High-Side Transistors Polarity><10><2>
<SETTING_VALUE_TYPE><LOW><PWM1, 3, 5 and 7 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM1, 3, 5 and 7 are active-high><10>
<SWITCH_INFO_TYPE><T1OSCMX><Timer1 Oscillator MUX><20><2>
<SETTING_VALUE_TYPE><OFF><Standard (legacy) Timer1 oscillator operation><0>
<SETTING_VALUE_TYPE><ON><Low-power Timer1 operation when microcontroller is in Sleep mode><20>
<CONFIGREG_INFO_TYPE><300005><0><9d><5>
<SWITCH_INFO_TYPE><FLTAMX><FLTA MUX bit><1><2>
<SETTING_VALUE_TYPE><RD4><FLTA input is multiplexed with RD4><0>
<SETTING_VALUE_TYPE><RC1><FLTA input is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><SSPMX><SSP I/O MUX bit><4><2>
<SETTING_VALUE_TYPE><RD1><SCK/SCL clocks and SDA/SDI data are multiplexed with RD3 and RD2, respectively. SDO output is multiplexed with RD1.><0>
<SETTING_VALUE_TYPE><RC7><SCK/SCL clocks and SDA/SDI data are multiplexed with RC5 and RC4, respectively. SDO output is multiplexed with RC7.><4>
<SWITCH_INFO_TYPE><PWM4MX><PWM4 MUX bit><8><2>
<SETTING_VALUE_TYPE><RD5><PWM4 output is multiplexed with RD5><0>
<SETTING_VALUE_TYPE><RB5><PWM4 output is multiplexed with RB5><8>
<SWITCH_INFO_TYPE><EXCLKMX><TMR0/T5CKI External clock MUX bit><10><2>
<SETTING_VALUE_TYPE><RD0><TMR0/T5CKI external clock input is multiplexed with RD0><0>
<SETTING_VALUE_TYPE><RC3><TMR0/T5CKI external clock input is multiplexed with RC3><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (002000-002FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (002000-002FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (003000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (003000-003FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (002000-002FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (002000-002FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (003000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (003000-003FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (002000-002FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (002000-002FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (003000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (003000-003FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4439><PIC18F4439><18xxxx><2><1><2fff><10><ff><ff><0-7f><f80-fff><0><a>
<CONFIGREG_INFO_TYPE><300001><0><22><1>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200h-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200h-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200h-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200h-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><4450><PIC18F4450><18xxxx><6><1><3fff><10><ff><0><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><46><4.6V><0>
<SETTING_VALUE_TYPE><43><4.3V><8>
<SETTING_VALUE_TYPE><28><2.8V><10>
<SETTING_VALUE_TYPE><21><2.1V><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><6>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><8><2>
<SETTING_VALUE_TYPE><BB1K><1KW Boot block size><0>
<SETTING_VALUE_TYPE><BB2K><2KW Boot block size><8>
<SWITCH_INFO_TYPE><ICPRT><Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><ICPORT disabled><0>
<SETTING_VALUE_TYPE><ON><ICPORT enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) or (001000-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) or (001000-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) or (000000-000FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) or (000000-000FFFh) is not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) or (001000-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) or (001000-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) or (000000-000FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) or (000000-000FFFh) is not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) or (001000-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) or (001000-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) or (000000-000FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) or (000000-000FFFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4455><PIC18F4455><18xxxx><6><1><5fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting 4.59V><0>
<SETTING_VALUE_TYPE><1><Setting 2 4.33V><8>
<SETTING_VALUE_TYPE><2><Setting 1 2.79V><10>
<SETTING_VALUE_TYPE><3><Minimum setting 2.05V><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><ICPRT><Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><ICPORT disabled><0>
<SETTING_VALUE_TYPE><ON><ICPORT enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4458><PIC18F4458><18xxxx><6><1><5fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><ICPRT><Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><ICPORT disabled><0>
<SETTING_VALUE_TYPE><ON><ICPORT enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><8448><PIC18F448><18xxxx><2><1><3fff><10><ff><ff><0-5f><f60-fff><0><a>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><4480><PIC18F4480><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><10><2>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) boot block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) boot block><10>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><e410><PIC18F44J10><18xxxx><6><1><3ff7><10><ff><0><0-7f><f80-fff><0><5>
<CONFIGREG_INFO_TYPE><3ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><3ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><3ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLKO function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><3ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><3ffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><e411><PIC18F44J11><18xxxx><6><1><3ff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><3ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><3ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><3ffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><3ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><3ffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><3ffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><3ffe><0><cf><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><f><10>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><3fff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><e450><PIC18F44J50><18xxxx><6><1><3ff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><3ff8><0><ef><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><3ff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><3ffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><3ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><3ffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><3ffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><3ffe><0><cf><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><f><10>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><3fff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><e420><PIC18F44K20><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKOUT function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><18><VBOR set to 1.8 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><8b><5>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><e422><PIC18F44K22><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><25><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSHP><HS oscillator (high power > 16 MHz)><2>
<SETTING_VALUE_TYPE><HSMP><HS oscillator (medium power 4-16 MHz)><3>
<SETTING_VALUE_TYPE><ECHP><EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)><4>
<SETTING_VALUE_TYPE><ECHPIO6><EC oscillator (high power, >16 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECMP><EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)><a>
<SETTING_VALUE_TYPE><ECMPIO6><EC oscillator (medium power, 500 kHz-16 MHz)><b>
<SETTING_VALUE_TYPE><ECLP><EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)><c>
<SETTING_VALUE_TYPE><ECLPIO6><EC oscillator (low power, <500 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><4X PLL Enable><10><2>
<SETTING_VALUE_TYPE><OFF><Oscillator used directly><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PRICLKEN><Primary clock enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock can be disabled by software><0>
<SETTING_VALUE_TYPE><ON><Primary clock is always enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><285><VBOR set to 2.85 V nominal><0>
<SETTING_VALUE_TYPE><250><VBOR set to 2.50 V nominal><8>
<SETTING_VALUE_TYPE><220><VBOR set to 2.20 V nominal><10>
<SETTING_VALUE_TYPE><190><VBOR set to 1.90 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><Watch dog timer is always disabled. SWDTEN has no effect.><0>
<SETTING_VALUE_TYPE><NOSLP><WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect><1>
<SETTING_VALUE_TYPE><SWON><WDT is controlled by SWDTEN bit of the WDTCON register><2>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><bf><7>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><CCP3MX><P3A/CCP3 Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTE0><P3A/CCP3 input/output is mulitplexed with RE0><0>
<SETTING_VALUE_TYPE><PORTB5><P3A/CCP3 input/output is multiplexed with RB5><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><HFINTOSC output and ready status are delayed by the oscillator stable status><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC output and ready status are not delayed by the oscillator stable status><8>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock input mux bit><10><2>
<SETTING_VALUE_TYPE><PORTB5><T3CKI is on RB5><0>
<SETTING_VALUE_TYPE><PORTC0><T3CKI is on RC0><10>
<SWITCH_INFO_TYPE><P2BMX><ECCP2 B output mux bit><20><2>
<SETTING_VALUE_TYPE><PORTC0><P2B is on RC0><0>
<SETTING_VALUE_TYPE><PORTD2><P2B is on RD2><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><INTMCLR><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin enabled, RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4510><PIC18F4510><18xxxx><6><1><7fff><10><ff><0><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4515><PIC18F4515><18xxxx><6><1><bfff><10><ff><0><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><452f><PIC18F452><18xxxx><2><1><7fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300005><0><1><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from Table Reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><4520><PIC18F4520><18xxxx><6><1><7fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4523><PIC18F4523><18xxxx><6><1><7fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4525><PIC18F4525><18xxxx><6><1><bfff><10><ff><3ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKOUT function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4539><PIC18F4539><18xxxx><2><1><5fff><10><ff><ff><0-7f><f80-fff><0><a>
<CONFIGREG_INFO_TYPE><300001><0><22><1>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200h-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200h-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200h-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200h-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><4550><PIC18F4550><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting 4.59V><0>
<SETTING_VALUE_TYPE><1><Setting 2 4.33V><8>
<SETTING_VALUE_TYPE><2><Setting 1 2.79V><10>
<SETTING_VALUE_TYPE><3><Minimum setting 2.05V><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><ICPRT><Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><ICPORT disabled><0>
<SETTING_VALUE_TYPE><ON><ICPORT enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4553><PIC18F4553><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><ICPRT><Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><ICPORT disabled><0>
<SETTING_VALUE_TYPE><ON><ICPORT enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><8458><PIC18F458><18xxxx><2><1><7fff><10><ff><ff><0-5f><f60-fff><0><a>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from Table Reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><4580><PIC18F4580><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><10><2>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) boot block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) boot block><10>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4585><PIC18F4585><18xxxx><6><1><bfff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) Boot Block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) Boot Block><10>
<SETTING_VALUE_TYPE><4096><4K words (8K bytes) Boot Block><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><e510><PIC18F45J10><18xxxx><6><1><7ff7><10><ff><0><0-7f><f80-fff><0><5>
<CONFIGREG_INFO_TYPE><7ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLKO function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><e511><PIC18F45J11><18xxxx><6><1><7ff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><7ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><7ffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><7ffe><0><df><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><1f><20>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><7fff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><e550><PIC18F45J50><18xxxx><6><1><7ff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><7ff8><0><ef><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><7ffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><7ffe><0><df><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><1f><20>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><7fff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><e520><PIC18F45K20><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKOUT function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><18><VBOR set to 1.8 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><8b><5>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><e522><PIC18F45K22><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><25><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSHP><HS oscillator (high power > 16 MHz)><2>
<SETTING_VALUE_TYPE><HSMP><HS oscillator (medium power 4-16 MHz)><3>
<SETTING_VALUE_TYPE><ECHP><EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)><4>
<SETTING_VALUE_TYPE><ECHPIO6><EC oscillator (high power, >16 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECMP><EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)><a>
<SETTING_VALUE_TYPE><ECMPIO6><EC oscillator (medium power, 500 kHz-16 MHz)><b>
<SETTING_VALUE_TYPE><ECLP><EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)><c>
<SETTING_VALUE_TYPE><ECLPIO6><EC oscillator (low power, <500 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><4X PLL Enable><10><2>
<SETTING_VALUE_TYPE><OFF><Oscillator used directly><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PRICLKEN><Primary clock enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock can be disabled by software><0>
<SETTING_VALUE_TYPE><ON><Primary clock is always enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><285><VBOR set to 2.85 V nominal><0>
<SETTING_VALUE_TYPE><250><VBOR set to 2.50 V nominal><8>
<SETTING_VALUE_TYPE><220><VBOR set to 2.20 V nominal><10>
<SETTING_VALUE_TYPE><190><VBOR set to 1.90 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><Watch dog timer is always disabled. SWDTEN has no effect.><0>
<SETTING_VALUE_TYPE><NOSLP><WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect><1>
<SETTING_VALUE_TYPE><SWON><WDT is controlled by SWDTEN bit of the WDTCON register><2>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><bf><7>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><CCP3MX><P3A/CCP3 Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTE0><P3A/CCP3 input/output is mulitplexed with RE0><0>
<SETTING_VALUE_TYPE><PORTB5><P3A/CCP3 input/output is multiplexed with RB5><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><HFINTOSC output and ready status are delayed by the oscillator stable status><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC output and ready status are not delayed by the oscillator stable status><8>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock input mux bit><10><2>
<SETTING_VALUE_TYPE><PORTB5><T3CKI is on RB5><0>
<SETTING_VALUE_TYPE><PORTC0><T3CKI is on RC0><10>
<SWITCH_INFO_TYPE><P2BMX><ECCP2 B output mux bit><20><2>
<SETTING_VALUE_TYPE><PORTC0><P2B is on RC0><0>
<SETTING_VALUE_TYPE><PORTD2><P2B is on RD2><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><INTMCLR><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin enabled, RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4540><PIC18F45K40><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><a2c0><PIC18F45K42><18XVxx><6><1><7fff><40><ff><ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><5>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><e551><PIC18F45K50><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><4>
<SWITCH_INFO_TYPE><PLLSEL><PLL Selection><1><2>
<SETTING_VALUE_TYPE><PLL4X><4x clock multiplier><0>
<SETTING_VALUE_TYPE><PLL3X><3x clock multiplier><1>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration bit><2><2>
<SETTING_VALUE_TYPE><OFF><PLL Disabled (firmware controlled)><0>
<SETTING_VALUE_TYPE><ON><PLL Enabled><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><18><4>
<SETTING_VALUE_TYPE><NOCLKDIV><CPU uses system clock (no divide)><0>
<SETTING_VALUE_TYPE><CLKDIV2><CPU uses system clock divided by 2><8>
<SETTING_VALUE_TYPE><CLKDIV3><CPU uses system clock divided by 3><10>
<SETTING_VALUE_TYPE><CLKDIV6><CPU uses system clock divided by 6><18>
<SWITCH_INFO_TYPE><LS48MHZ><Low Speed USB mode with 48 MHz system clock><20><2>
<SETTING_VALUE_TYPE><SYS24X4><System clock at 24 MHz, USB clock divider is set to 4><0>
<SETTING_VALUE_TYPE><SYS48X8><System clock at 48 MHz, USB clock divider is set to 8><20>
<CONFIGREG_INFO_TYPE><300001><0><25><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSH><HS oscillator, high power 16MHz to 25MHz><2>
<SETTING_VALUE_TYPE><HSM><HS oscillator, medium power 4MHz to 16MHz><3>
<SETTING_VALUE_TYPE><ECHCLKO><EC oscillator, high power 16MHz to 48MHz, clock output on OSC2><4>
<SETTING_VALUE_TYPE><ECHIO><EC oscillator, high power 16MHz to 48MHz><5>
<SETTING_VALUE_TYPE><RCCLKO><External RC oscillator, clock output on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTOSCIO><Internal oscillator><8>
<SETTING_VALUE_TYPE><INTOSCCLKO><Internal oscillator, clock output on OSC2><9>
<SETTING_VALUE_TYPE><ECMCLKO><EC oscillator, medium power 4MHz to 16MHz, clock output on OSC2><a>
<SETTING_VALUE_TYPE><ECMIO><EC oscillator, medium power 4MHz to 16MHz><b>
<SETTING_VALUE_TYPE><ECLCLKO><EC oscillator, low power <4MHz, clock output on OSC2><c>
<SETTING_VALUE_TYPE><ECLIO><EC oscillator, low power <4MHz><d>
<SWITCH_INFO_TYPE><PCLKEN><Primary Oscillator Shutdown><20><2>
<SETTING_VALUE_TYPE><OFF><Primary oscillator shutdown firmware controlled><0>
<SETTING_VALUE_TYPE><ON><Primary oscillator enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><5f><4>
<SWITCH_INFO_TYPE><nPWRTEN><Power-up Timer Enable><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><6><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled in hardware (SBOREN is ignored)><0>
<SETTING_VALUE_TYPE><ON><BOR controlled by firmware (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><BOR enabled in hardware, disabled in Sleep mode (SBOREN is ignored)><4>
<SETTING_VALUE_TYPE><SBORDIS><BOR enabled in hardware (SBOREN is ignored)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><18><4>
<SETTING_VALUE_TYPE><285><BOR set to 2.85V nominal><0>
<SETTING_VALUE_TYPE><250><BOR set to 2.5V nominal><8>
<SETTING_VALUE_TYPE><220><BOR set to 2.2V nominal><10>
<SETTING_VALUE_TYPE><190><BOR set to 1.9V nominal><18>
<SWITCH_INFO_TYPE><nLPBOR><Low-Power Brown-out Reset><40><2>
<SETTING_VALUE_TYPE><ON><Low-Power Brown-out Reset enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power Brown-out Reset disabled><40>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware (SWDTEN ignored)><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled in hardware, disabled in Sleep mode (SWDTEN ignored)><1>
<SETTING_VALUE_TYPE><SWON><WDT controlled by firmware (SWDTEN enabled)><2>
<SETTING_VALUE_TYPE><ON><WDT enabled in hardware (SWDTEN ignored)><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><d3><5>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><RB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock Input MUX bit><10><2>
<SETTING_VALUE_TYPE><RB5><T3CKI function is on RB5><0>
<SETTING_VALUE_TYPE><RC0><T3CKI function is on RC0><10>
<SWITCH_INFO_TYPE><SDOMX><SDO Output MUX bit><40><2>
<SETTING_VALUE_TYPE><RC7><SDO function is on RC7><0>
<SETTING_VALUE_TYPE><RB3><SDO function is on RB3><40>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Reset Pin Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; external MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><ICPRT><Dedicated In-Circuit Debug/Programming Port Enable><20><2>
<SETTING_VALUE_TYPE><OFF><ICPORT disabled><0>
<SETTING_VALUE_TYPE><ON><ICPORT enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Block 0 Code Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Block 1 Code Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Block 2 Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 is not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Block 3 Code Protect><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 is not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Block 0 Write Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (0800-1FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (0800-1FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Block 1 Write Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (2000-3FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (2000-3FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Block 2 Write Protect><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (04000-5FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (04000-5FFFh) is not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Block 3 Write Protect><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (06000-7FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (06000-7FFFh) is not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Registers Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (0000-7FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (0000-7FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Block 0 Table Read Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Block 1 Table Read Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Block 2 Table Read Protect><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 is not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Block 3 Table Read Protect><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 is not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><b580><PIC18F45K80><18xxxx><6><1><7fff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Ultra low-power regulator is Enabled (Controlled by SRETEN bit)><0>
<SETTING_VALUE_TYPE><OFF><Ultra low-power regulator is Disabled (Controlled by REGSLP bit)><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300005><0><89><3>
<SWITCH_INFO_TYPE><CANMX><ECAN Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTC><ECAN TX and RX pins are located on RC6 and RC7, respectively><0>
<SETTING_VALUE_TYPE><PORTB><ECAN TX and RX pins are located on RB2 and RB3, respectively><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RE3 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RE3 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><a2d3><PIC18F45Q10><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved (DO NOT USE)><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin (RE3) is an input; If LVP =1, MCLR pin (RE3) is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin (RE3) is MCLR><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Low power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power BOR is disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT disabled in sleep, enabled when not in sleep><40>
<SETTING_VALUE_TYPE><ON><WDT always enabled><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 % of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 % of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 % of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 % of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 % of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 % of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><4610><PIC18F4610><18xxxx><6><1><ffff><10><ff><0><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4620><PIC18F4620><18xxxx><6><1><ffff><10><ff><3ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKOUT function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4680><PIC18F4680><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) Boot Block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) Boot Block><10>
<SETTING_VALUE_TYPE><4096><4K words (8K bytes) Boot Block><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4682><PIC18F4682><18xxxx><6><1><13fff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) Boot Block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) Boot Block><10>
<SETTING_VALUE_TYPE><4096><4K words (8K bytes) Boot Block><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3f><5>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3f><5>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3f><5>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4685><PIC18F4685><18xxxx><6><1><17fff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) Boot Block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) Boot Block><10>
<SETTING_VALUE_TYPE><4096><4K words (8K bytes) Boot Block><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3f><6>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3f><6>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3f><6>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><e611><PIC18F46J11><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><fffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffe><0><ff><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><3f><40>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><ffff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><e616><PIC18F46J13><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><fff8><0><ff><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><96MHz PLL Prescaler Selection (PLLSEL=0)><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration Bit><10><2>
<SETTING_VALUE_TYPE><ON><PLL Enabled><0>
<SETTING_VALUE_TYPE><OFF><PLL Disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><ff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><18><4>
<SETTING_VALUE_TYPE><RESERVED><Reserved><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode selected><10>
<SETTING_VALUE_TYPE><HIGH><High Power T1OSC/SOSC circuit selected><18>
<SWITCH_INFO_TYPE><CLKOEC><EC Clock Out Enable Bit ><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><fffd><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><ADCSEL><ADC 10 or 12 Bit Select><2><2>
<SETTING_VALUE_TYPE><BIT12><12 - Bit ADC Enabled><0>
<SETTING_VALUE_TYPE><BIT10><10 - Bit ADC Enabled><2>
<SWITCH_INFO_TYPE><PLLSEL><PLL Selection Bit><4><2>
<SETTING_VALUE_TYPE><PLL96><Selects 96MHz PLL><0>
<SETTING_VALUE_TYPE><PLL4X><Selects 4x PLL><4>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffe><0><bf><2>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><3f><40>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region ><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><ffff><0><f3><2>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<6:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<6:0>/WPEND region ignored><1>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select bit (valid when WPDIS = 0)><2><2>
<SETTING_VALUE_TYPE><PAGE_0><Pages 0 through WPFP<6:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Pages WPFP<6:0> through Configuration Words erase/write protected><2>
<PART_INFO_TYPE><e650><PIC18F46J50><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><fff8><0><ef><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><fff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><fffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffe><0><ff><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><3f><40>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><ffff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><e655><PIC18F46J53><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><fff8><0><ff><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration Bit><10><2>
<SETTING_VALUE_TYPE><ON><PLL Enabled><0>
<SETTING_VALUE_TYPE><OFF><PLL Disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><fff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><ff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><18><4>
<SETTING_VALUE_TYPE><RESERVED><Reserved><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode selected><10>
<SETTING_VALUE_TYPE><HIGH><High Power T1OSC/SOSC circuit selected><18>
<SWITCH_INFO_TYPE><CLKOEC><EC Clock Out Enable Bit ><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><fffd><0><fb><3>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><ADCSEL><ADC 10 or 12 Bit Select><2><2>
<SETTING_VALUE_TYPE><BIT12><12 - Bit ADC Enabled><0>
<SETTING_VALUE_TYPE><BIT10><10 - Bit ADC Enabled><2>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffe><0><bf><2>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><3f><40>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region ><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><ffff><0><fb><3>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<6:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<6:0>/WPEND region ignored><1>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select bit (valid when WPDIS = 0)><2><2>
<SETTING_VALUE_TYPE><PAGE_0><Pages 0 through WPFP<6:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Pages WPFP<6:0> through Configuration Words erase/write protected><2>
<SWITCH_INFO_TYPE><LS48MHZ><Low Speed USB mode with 48 MHz system clock bit><8><2>
<SETTING_VALUE_TYPE><SYS24X4><System clock at 24 MHz USB CLKEN divide-by is set to 4><0>
<SETTING_VALUE_TYPE><SYS48X8><System clock at 48 MHz USB CLKEN divide-by is set to 8><8>
<PART_INFO_TYPE><e620><PIC18F46K20><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKOUT function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><18><VBOR set to 1.8 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><8b><5>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000h-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000h-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><e622><PIC18F46K22><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><25><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSHP><HS oscillator (high power > 16 MHz)><2>
<SETTING_VALUE_TYPE><HSMP><HS oscillator (medium power 4-16 MHz)><3>
<SETTING_VALUE_TYPE><ECHP><EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)><4>
<SETTING_VALUE_TYPE><ECHPIO6><EC oscillator (high power, >16 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECMP><EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)><a>
<SETTING_VALUE_TYPE><ECMPIO6><EC oscillator (medium power, 500 kHz-16 MHz)><b>
<SETTING_VALUE_TYPE><ECLP><EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)><c>
<SETTING_VALUE_TYPE><ECLPIO6><EC oscillator (low power, <500 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><4X PLL Enable><10><2>
<SETTING_VALUE_TYPE><OFF><Oscillator used directly><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PRICLKEN><Primary clock enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock can be disabled by software><0>
<SETTING_VALUE_TYPE><ON><Primary clock is always enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><285><VBOR set to 2.85 V nominal><0>
<SETTING_VALUE_TYPE><250><VBOR set to 2.50 V nominal><8>
<SETTING_VALUE_TYPE><220><VBOR set to 2.20 V nominal><10>
<SETTING_VALUE_TYPE><190><VBOR set to 1.90 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><Watch dog timer is always disabled. SWDTEN has no effect.><0>
<SETTING_VALUE_TYPE><NOSLP><WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect><1>
<SETTING_VALUE_TYPE><SWON><WDT is controlled by SWDTEN bit of the WDTCON register><2>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><bf><7>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><CCP3MX><P3A/CCP3 Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTE0><P3A/CCP3 input/output is mulitplexed with RE0><0>
<SETTING_VALUE_TYPE><PORTB5><P3A/CCP3 input/output is multiplexed with RB5><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><HFINTOSC output and ready status are delayed by the oscillator stable status><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC output and ready status are not delayed by the oscillator stable status><8>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock input mux bit><10><2>
<SETTING_VALUE_TYPE><PORTB5><T3CKI is on RB5><0>
<SETTING_VALUE_TYPE><PORTC0><T3CKI is on RC0><10>
<SWITCH_INFO_TYPE><P2BMX><ECCP2 B output mux bit><20><2>
<SETTING_VALUE_TYPE><PORTC0><P2B is on RC0><0>
<SETTING_VALUE_TYPE><PORTD2><P2B is on RD2><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><INTMCLR><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin enabled, RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><4640><PIC18F46K40><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><a2c4><PIC18F46K42><18XVxx><6><1><ffff><40><ff><3ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><6>
<SETTING_VALUE_TYPE><BBSIZE_16384><Boot Block size is 16384 words><2>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><b680><PIC18F46K80><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Ultra low-power regulator is Enabled (Controlled by SRETEN bit)><0>
<SETTING_VALUE_TYPE><OFF><Ultra low-power regulator is Disabled (Controlled by REGSLP bit)><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300005><0><89><3>
<SWITCH_INFO_TYPE><CANMX><ECAN Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTC><ECAN TX and RX pins are located on RC6 and RC7, respectively><0>
<SETTING_VALUE_TYPE><PORTB><ECAN TX and RX pins are located on RB2 and RB3, respectively><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RE3 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RE3 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><a2d4><PIC18F46Q10><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved (DO NOT USE)><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin (RE3) is an input; If LVP =1, MCLR pin (RE3) is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin (RE3) is MCLR><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Low power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power BOR is disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT disabled in sleep, enabled when not in sleep><40>
<SETTING_VALUE_TYPE><ON><WDT always enabled><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 % of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 % of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 % of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 % of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 % of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 % of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><e711><PIC18F47J13><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><1fff8><0><ff><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><96MHz PLL Prescaler Selection (PLLSEL=0)><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration Bit><10><2>
<SETTING_VALUE_TYPE><ON><PLL Enabled><0>
<SETTING_VALUE_TYPE><OFF><PLL Disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><1fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fffa><0><ff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><18><4>
<SETTING_VALUE_TYPE><RESERVED><Reserved><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode selected><10>
<SETTING_VALUE_TYPE><HIGH><High Power T1OSC/SOSC circuit selected><18>
<SWITCH_INFO_TYPE><CLKOEC><EC Clock Out Enable Bit ><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><1fffd><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><ADCSEL><ADC 10 or 12 Bit Select><2><2>
<SETTING_VALUE_TYPE><BIT12><12 - Bit ADC Enabled><0>
<SETTING_VALUE_TYPE><BIT10><10 - Bit ADC Enabled><2>
<SWITCH_INFO_TYPE><PLLSEL><PLL Selection Bit><4><2>
<SETTING_VALUE_TYPE><PLL96><Selects 96MHz PLL><0>
<SETTING_VALUE_TYPE><PLL4X><Selects 4x PLL><4>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><1fffe><0><ff><2>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><7f><80>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><PAGE_64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><PAGE_65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><PAGE_66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><PAGE_67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><PAGE_68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><PAGE_69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><PAGE_70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><PAGE_71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><PAGE_72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><PAGE_73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><PAGE_74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><PAGE_75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><PAGE_76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><PAGE_77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><PAGE_78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><PAGE_79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><PAGE_80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><PAGE_81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><PAGE_82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><PAGE_83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><PAGE_84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><PAGE_85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><PAGE_86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><PAGE_87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><PAGE_88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><PAGE_89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><PAGE_90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><PAGE_91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><PAGE_92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><PAGE_93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><PAGE_94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><PAGE_95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><PAGE_96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><PAGE_97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><PAGE_98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><PAGE_99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><PAGE_100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><PAGE_101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><PAGE_102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><PAGE_103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><PAGE_104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><PAGE_105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><PAGE_106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><PAGE_107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><PAGE_108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><PAGE_109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><PAGE_110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><PAGE_111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><PAGE_112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><PAGE_113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><PAGE_114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><PAGE_115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><PAGE_116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><PAGE_117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><PAGE_118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><PAGE_119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><PAGE_120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><PAGE_121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><PAGE_122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><PAGE_123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><PAGE_124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><PAGE_125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><PAGE_126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><PAGE_127><Write Protect Program Flash Page 127><7f>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region ><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><1ffff><0><f3><2>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<6:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<6:0>/WPEND region ignored><1>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select bit (valid when WPDIS = 0)><2><2>
<SETTING_VALUE_TYPE><PAGE_0><Pages 0 through WPFP<6:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Pages WPFP<6:0> through Configuration Words erase/write protected><2>
<PART_INFO_TYPE><e750><PIC18F47J53><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><1fff8><0><ff><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration Bit><10><2>
<SETTING_VALUE_TYPE><ON><PLL Enabled><0>
<SETTING_VALUE_TYPE><OFF><PLL Disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><1fff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fffa><0><ff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><18><4>
<SETTING_VALUE_TYPE><RESERVED><Reserved><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode selected><10>
<SETTING_VALUE_TYPE><HIGH><High Power T1OSC/SOSC circuit selected><18>
<SWITCH_INFO_TYPE><CLKOEC><EC Clock Out Enable Bit ><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><1fffd><0><fb><3>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><ADCSEL><ADC 10 or 12 Bit Select><2><2>
<SETTING_VALUE_TYPE><BIT12><12 - Bit ADC Enabled><0>
<SETTING_VALUE_TYPE><BIT10><10 - Bit ADC Enabled><2>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><1fffe><0><ff><2>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><7f><80>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><PAGE_64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><PAGE_65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><PAGE_66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><PAGE_67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><PAGE_68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><PAGE_69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><PAGE_70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><PAGE_71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><PAGE_72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><PAGE_73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><PAGE_74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><PAGE_75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><PAGE_76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><PAGE_77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><PAGE_78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><PAGE_79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><PAGE_80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><PAGE_81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><PAGE_82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><PAGE_83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><PAGE_84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><PAGE_85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><PAGE_86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><PAGE_87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><PAGE_88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><PAGE_89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><PAGE_90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><PAGE_91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><PAGE_92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><PAGE_93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><PAGE_94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><PAGE_95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><PAGE_96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><PAGE_97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><PAGE_98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><PAGE_99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><PAGE_100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><PAGE_101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><PAGE_102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><PAGE_103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><PAGE_104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><PAGE_105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><PAGE_106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><PAGE_107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><PAGE_108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><PAGE_109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><PAGE_110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><PAGE_111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><PAGE_112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><PAGE_113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><PAGE_114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><PAGE_115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><PAGE_116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><PAGE_117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><PAGE_118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><PAGE_119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><PAGE_120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><PAGE_121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><PAGE_122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><PAGE_123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><PAGE_124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><PAGE_125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><PAGE_126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><PAGE_127><Write Protect Program Flash Page 127><7f>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region ><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><1ffff><0><fb><3>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<6:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<6:0>/WPEND region ignored><1>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select bit (valid when WPDIS = 0)><2><2>
<SETTING_VALUE_TYPE><PAGE_0><Pages 0 through WPFP<6:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Pages WPFP<6:0> through Configuration Words erase/write protected><2>
<SWITCH_INFO_TYPE><LS48MHZ><Low Speed USB mode with 48 MHz system clock bit><8><2>
<SETTING_VALUE_TYPE><SYS24X4><System clock at 24 MHz USB CLKEN divide-by is set to 4><0>
<SETTING_VALUE_TYPE><SYS48X8><System clock at 48 MHz USB CLKEN divide-by is set to 8><8>
<PART_INFO_TYPE><4740><PIC18F47K40><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection Block 3><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection Block 3><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection Block 3><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection Block 3><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><a2cd><PIC18F47K42><18XVxx><6><1><1ffff><40><ff><3ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><7>
<SETTING_VALUE_TYPE><BBSIZE_32768><Boot Block size is 32768 words><1>
<SETTING_VALUE_TYPE><BBSIZE_16384><Boot Block size is 16384 words><2>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><a2e8><PIC18F47Q10><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved (DO NOT USE)><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin (RE3) is an input; If LVP =1, MCLR pin (RE3) is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin (RE3) is MCLR><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Low power BOR is enabled><0>
<SETTING_VALUE_TYPE><OFF><Low power BOR is disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT disabled in sleep, enabled when not in sleep><40>
<SETTING_VALUE_TYPE><ON><WDT always enabled><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 % of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 % of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 % of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 % of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 % of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 % of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) not write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><a2c2><PIC18F55K42><18XVxx><6><1><7fff><40><ff><ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><5>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><a2c6><PIC18F56K42><18XVxx><6><1><ffff><40><ff><3ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><6>
<SETTING_VALUE_TYPE><BBSIZE_16384><Boot Block size is 16384 words><2>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><a2cf><PIC18F57K42><18XVxx><6><1><1ffff><40><ff><3ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><7>
<SETTING_VALUE_TYPE><BBSIZE_32768><Boot Block size is 32768 words><1>
<SETTING_VALUE_TYPE><BBSIZE_16384><Boot Block size is 16384 words><2>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><6310><PIC18F6310><18xxxx><6><1><1fff><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><c3><0>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block not code-protected><1>
<CONFIGREG_INFO_TYPE><30000c><0><1><0>
<PART_INFO_TYPE><6390><PIC18F6390><18xxxx><6><1><1fff><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block (000000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block (000000-003FFFh) not code-protected><1>
<PART_INFO_TYPE><6393><PIC18F6393><18xxxx><6><1><1fff><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block (000000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block (000000-003FFFh) not code-protected><1>
<PART_INFO_TYPE><6311><PIC18F63J11><18xxxx><6><1><1ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><1ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1ffc><0><f8><0>
<CONFIGREG_INFO_TYPE><1ffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><b390><PIC18F63J90><18xxxx><6><1><1ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><1ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1ffc><0><f8><0>
<CONFIGREG_INFO_TYPE><1ffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><6410><PIC18F6410><18xxxx><6><1><3fff><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><c3><0>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block not code-protected><1>
<CONFIGREG_INFO_TYPE><30000c><0><1><0>
<PART_INFO_TYPE><6490><PIC18F6490><18xxxx><6><1><3fff><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block (000000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block (000000-003FFFh) not code-protected><1>
<PART_INFO_TYPE><6493><PIC18F6493><18xxxx><6><1><3fff><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block (000000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block (000000-003FFFh) not code-protected><1>
<PART_INFO_TYPE><6411><PIC18F64J11><18xxxx><6><1><3ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><3ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><3ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><3ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><3ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><3ffc><0><f8><0>
<CONFIGREG_INFO_TYPE><3ffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><b490><PIC18F64J90><18xxxx><6><1><3ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><3ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><3ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><3ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><3ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><3ffc><0><f8><0>
<CONFIGREG_INFO_TYPE><3ffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><a652><PIC18F6520><18xxxx><2><1><7fff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator w/ OSC2 configured as divide-by-4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300004><0><83><0>
<CONFIGREG_INFO_TYPE><300005><0><3><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><6525><PIC18F6525><18xxxx><2><1><bfff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><2f><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><b>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator with OSC2 configured as divide by 4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator with OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator with OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with HW enabled 4x PLL><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator with OSC2 configured as RA6><7>
<SETTING_VALUE_TYPE><ECIOPLL><EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL><c>
<SETTING_VALUE_TYPE><ECIOSWPLL><EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL><d>
<SETTING_VALUE_TYPE><HSSWPLL><HS oscillator with SW enabled 4x PLL><e>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><83><0>
<CONFIGREG_INFO_TYPE><300005><0><83><2>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><Multiplexed with RB3 or RE7><0>
<SETTING_VALUE_TYPE><PORTC><Multiplexed with RC1><1>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><6527><PIC18F6527><18xxxx><6><1><bfff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTE><ECCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><6585><PIC18F6585><18xxxx><2><1><bfff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><2f><2>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><b>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator with OSC2 configured as divide by 4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator with OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator with OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with HW enabled 4x PLL><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator with OSC2 configured as RA6><7>
<SETTING_VALUE_TYPE><ECIOPLL><EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL><c>
<SETTING_VALUE_TYPE><ECIOSWPLL><EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL><d>
<SETTING_VALUE_TYPE><HSSWPLL><HS oscillator with SW enabled 4x PLL><e>
<SWITCH_INFO_TYPE><OSCS><Osc. Switch Enable><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown Out Detect><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><83><0>
<CONFIGREG_INFO_TYPE><300005><0><83><2>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><MCLRE><MCLR enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage Program><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protect 000800-0003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 0004000-007FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 008000-00BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 004000-007FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 004000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><b510><PIC18F65J10><18xxxx><6><1><7ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><7ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffc><0><f8><0>
<CONFIGREG_INFO_TYPE><7ffd><0><f3><1>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<PART_INFO_TYPE><6511><PIC18F65J11><18xxxx><6><1><7ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><7ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffc><0><f8><0>
<CONFIGREG_INFO_TYPE><7ffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><b515><PIC18F65J15><18xxxx><6><1><bff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><bff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><bff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><bffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><bffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><bffc><0><f8><0>
<CONFIGREG_INFO_TYPE><bffd><0><f3><1>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<PART_INFO_TYPE><b550><PIC18F65J50><18xxxx><6><1><7ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><7ff8><0><ef><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><c7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC, Port function on RA6 and RA7><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSC, CLKO on RA6 and Port function on RA7><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, Port function on RA6 and RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKO on RA6 and Port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator, HS used by USB><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled, HSPLL used by USB><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with CLKO on RA6, EC used by USB><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL, CLKO on RA6, ECPLL used by USB><7>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffc><0><f8><0>
<CONFIGREG_INFO_TYPE><7ffd><0><f9><2>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP Address Masking Mode Select bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5-Bit Address Masking mode enable><0>
<SETTING_VALUE_TYPE><MSK7><7-Bit Address Masking mode enable><8>
<PART_INFO_TYPE><b590><PIC18F65J90><18xxxx><6><1><7ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><7ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><ff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffc><0><f8><0>
<CONFIGREG_INFO_TYPE><7ffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><6594><PIC18F65J94><18xxxx><6><1><7fef><10><ff><0><0-5f><f60-fff><0><10>
<CONFIGREG_INFO_TYPE><7ff0><0><e0><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><7ff1><0><f7><3>
<SWITCH_INFO_TYPE><BOREN><Brown-Out Reset Enable><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit, disabled in Deep Sleep><1>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><2><2>
<SETTING_VALUE_TYPE><0><2.0V><0>
<SETTING_VALUE_TYPE><1><1.8V><2>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ff2><0><af><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><FRC><Fast RC Oscillator (FRC)><0>
<SETTING_VALUE_TYPE><FRCPLL><Fast RC Oscillator with PLL module (FRCPLL)><1>
<SETTING_VALUE_TYPE><PRI><Primary Oscillator (XT, HS, EC)><2>
<SETTING_VALUE_TYPE><PRIPLL><Primary Oscillator with PLL module (XTPLL,HSPLL,ECPLL)><3>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator (SOSC)><4>
<SETTING_VALUE_TYPE><LPRC><Low-Power RC Oscillator (LPRC)><5>
<SETTING_VALUE_TYPE><FRC500KHZ><Fast RC Oscillator divided by 16 (500 kHz)><6>
<SETTING_VALUE_TYPE><FRCDIV><Fast RC Oscillator with Postscaler (FRCDIV)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><8><2>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SWITCH_INFO_TYPE><CLKOEN><Clock Out Enable Bit><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><7ff3><0><ff><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Frequency Multiplier Select bits><f><10>
<SETTING_VALUE_TYPE><NODIV><96 MHz PLL selected; No divide - Oscillator used directly (4 MHz input)><0>
<SETTING_VALUE_TYPE><DIV2><96 MHz PLL selected; Oscillator divided by 2 (8 MHz input)><1>
<SETTING_VALUE_TYPE><DIV3><96 MHz PLL selected; Oscillator divided by 3 (12 MHz input)><2>
<SETTING_VALUE_TYPE><DIV4><96 MHz PLL selected; Oscillator divided by 4 (16 MHz input)><3>
<SETTING_VALUE_TYPE><DIV5><96 MHz PLL selected; Oscillator divided by 5 (20 MHz input)><4>
<SETTING_VALUE_TYPE><DIV6><96 MHz PLL selected; Oscillator divided by 6 (24 MHz input)><5>
<SETTING_VALUE_TYPE><DIV10><96 MHz PLL selected; Oscillator divided by 10 (40 MHz input)><6>
<SETTING_VALUE_TYPE><DIV12><96 MHz PLL selected; Oscillator divided by 12 (48 MHz input)><7>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><8>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><9>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><a>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><b>
<SETTING_VALUE_TYPE><PLL4X><4x PLL selected><c>
<SETTING_VALUE_TYPE><PLL6X><6x PLL selected><d>
<SETTING_VALUE_TYPE><PLL8X><8x PLL selected><e>
<SETTING_VALUE_TYPE><NOPLL><No PLL used - PLLGO bit not available to user><f>
<CONFIGREG_INFO_TYPE><7ff4><0><33><2>
<SWITCH_INFO_TYPE><POSCMD><Primary Oscillator Select><3><4>
<SETTING_VALUE_TYPE><EC><External clock mode selected><0>
<SETTING_VALUE_TYPE><MS><MS oscillator mode selected(3.5 MHz -10 MHz)><1>
<SETTING_VALUE_TYPE><HS><HS oscillator mode selected(10 MHz - 40 MHz)><2>
<SETTING_VALUE_TYPE><NONE><Primary oscillator disabled><3>
<SWITCH_INFO_TYPE><FSCM><Clock Switching and Monitor Selection Configuration bits><30><3>
<SETTING_VALUE_TYPE><CSECME><Clock switching is enabled, fail safe clock monitor is enabled><0>
<SETTING_VALUE_TYPE><CSECMD><Clock switching is enabled, fail safe clock monitor is disabled><10>
<SETTING_VALUE_TYPE><CSDCMD><Clock switching is disabled, fail safe clock monitor is disabled><20>
<CONFIGREG_INFO_TYPE><7ff5><0><f0><0>
<CONFIGREG_INFO_TYPE><7ff6><0><ff><1>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Boundary><ff><100>
<SETTING_VALUE_TYPE><WPFP0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><WPFP1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><WPFP2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><WPFP3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><WPFP4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><WPFP5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><WPFP6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><WPFP7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><WPFP8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><WPFP9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><WPFP10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><WPFP11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><WPFP12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><WPFP13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><WPFP14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><WPFP15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><WPFP16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><WPFP17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><WPFP18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><WPFP19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><WPFP20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><WPFP21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><WPFP22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><WPFP23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><WPFP24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><WPFP25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><WPFP26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><WPFP27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><WPFP28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><WPFP29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><WPFP30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><WPFP31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><WPFP32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><WPFP33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><WPFP34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><WPFP35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><WPFP36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><WPFP37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><WPFP38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><WPFP39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><WPFP40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><WPFP41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><WPFP42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><WPFP43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><WPFP44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><WPFP45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><WPFP46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><WPFP47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><WPFP48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><WPFP49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><WPFP50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><WPFP51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><WPFP52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><WPFP53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><WPFP54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><WPFP55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><WPFP56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><WPFP57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><WPFP58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><WPFP59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><WPFP60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><WPFP61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><WPFP62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><WPFP63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><WPFP64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><WPFP65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><WPFP66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><WPFP67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><WPFP68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><WPFP69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><WPFP70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><WPFP71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><WPFP72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><WPFP73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><WPFP74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><WPFP75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><WPFP76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><WPFP77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><WPFP78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><WPFP79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><WPFP80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><WPFP81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><WPFP82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><WPFP83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><WPFP84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><WPFP85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><WPFP86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><WPFP87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><WPFP88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><WPFP89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><WPFP90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><WPFP91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><WPFP92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><WPFP93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><WPFP94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><WPFP95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><WPFP96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><WPFP97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><WPFP98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><WPFP99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><WPFP100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><WPFP101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><WPFP102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><WPFP103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><WPFP104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><WPFP105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><WPFP106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><WPFP107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><WPFP108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><WPFP109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><WPFP110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><WPFP111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><WPFP112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><WPFP113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><WPFP114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><WPFP115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><WPFP116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><WPFP117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><WPFP118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><WPFP119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><WPFP120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><WPFP121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><WPFP122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><WPFP123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><WPFP124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><WPFP125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><WPFP126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><WPFP127><Write Protect Program Flash Page 127><7f>
<SETTING_VALUE_TYPE><WPFP128><Write Protect Program Flash Page 128><80>
<SETTING_VALUE_TYPE><WPFP129><Write Protect Program Flash Page 129><81>
<SETTING_VALUE_TYPE><WPFP130><Write Protect Program Flash Page 130><82>
<SETTING_VALUE_TYPE><WPFP131><Write Protect Program Flash Page 131><83>
<SETTING_VALUE_TYPE><WPFP132><Write Protect Program Flash Page 132><84>
<SETTING_VALUE_TYPE><WPFP133><Write Protect Program Flash Page 133><85>
<SETTING_VALUE_TYPE><WPFP134><Write Protect Program Flash Page 134><86>
<SETTING_VALUE_TYPE><WPFP135><Write Protect Program Flash Page 135><87>
<SETTING_VALUE_TYPE><WPFP136><Write Protect Program Flash Page 136><88>
<SETTING_VALUE_TYPE><WPFP137><Write Protect Program Flash Page 137><89>
<SETTING_VALUE_TYPE><WPFP138><Write Protect Program Flash Page 138><8a>
<SETTING_VALUE_TYPE><WPFP139><Write Protect Program Flash Page 139><8b>
<SETTING_VALUE_TYPE><WPFP140><Write Protect Program Flash Page 140><8c>
<SETTING_VALUE_TYPE><WPFP141><Write Protect Program Flash Page 141><8d>
<SETTING_VALUE_TYPE><WPFP142><Write Protect Program Flash Page 142><8e>
<SETTING_VALUE_TYPE><WPFP143><Write Protect Program Flash Page 143><8f>
<SETTING_VALUE_TYPE><WPFP144><Write Protect Program Flash Page 144><90>
<SETTING_VALUE_TYPE><WPFP145><Write Protect Program Flash Page 145><91>
<SETTING_VALUE_TYPE><WPFP146><Write Protect Program Flash Page 146><92>
<SETTING_VALUE_TYPE><WPFP147><Write Protect Program Flash Page 147><93>
<SETTING_VALUE_TYPE><WPFP148><Write Protect Program Flash Page 148><94>
<SETTING_VALUE_TYPE><WPFP149><Write Protect Program Flash Page 149><95>
<SETTING_VALUE_TYPE><WPFP150><Write Protect Program Flash Page 150><96>
<SETTING_VALUE_TYPE><WPFP151><Write Protect Program Flash Page 151><97>
<SETTING_VALUE_TYPE><WPFP152><Write Protect Program Flash Page 152><98>
<SETTING_VALUE_TYPE><WPFP153><Write Protect Program Flash Page 153><99>
<SETTING_VALUE_TYPE><WPFP154><Write Protect Program Flash Page 154><9a>
<SETTING_VALUE_TYPE><WPFP155><Write Protect Program Flash Page 155><9b>
<SETTING_VALUE_TYPE><WPFP156><Write Protect Program Flash Page 156><9c>
<SETTING_VALUE_TYPE><WPFP157><Write Protect Program Flash Page 157><9d>
<SETTING_VALUE_TYPE><WPFP158><Write Protect Program Flash Page 158><9e>
<SETTING_VALUE_TYPE><WPFP159><Write Protect Program Flash Page 159><9f>
<SETTING_VALUE_TYPE><WPFP160><Write Protect Program Flash Page 160><a0>
<SETTING_VALUE_TYPE><WPFP161><Write Protect Program Flash Page 161><a1>
<SETTING_VALUE_TYPE><WPFP162><Write Protect Program Flash Page 162><a2>
<SETTING_VALUE_TYPE><WPFP163><Write Protect Program Flash Page 163><a3>
<SETTING_VALUE_TYPE><WPFP164><Write Protect Program Flash Page 164><a4>
<SETTING_VALUE_TYPE><WPFP165><Write Protect Program Flash Page 165><a5>
<SETTING_VALUE_TYPE><WPFP166><Write Protect Program Flash Page 166><a6>
<SETTING_VALUE_TYPE><WPFP167><Write Protect Program Flash Page 167><a7>
<SETTING_VALUE_TYPE><WPFP168><Write Protect Program Flash Page 168><a8>
<SETTING_VALUE_TYPE><WPFP169><Write Protect Program Flash Page 169><a9>
<SETTING_VALUE_TYPE><WPFP170><Write Protect Program Flash Page 170><aa>
<SETTING_VALUE_TYPE><WPFP171><Write Protect Program Flash Page 171><ab>
<SETTING_VALUE_TYPE><WPFP172><Write Protect Program Flash Page 172><ac>
<SETTING_VALUE_TYPE><WPFP173><Write Protect Program Flash Page 173><ad>
<SETTING_VALUE_TYPE><WPFP174><Write Protect Program Flash Page 174><ae>
<SETTING_VALUE_TYPE><WPFP175><Write Protect Program Flash Page 175><af>
<SETTING_VALUE_TYPE><WPFP176><Write Protect Program Flash Page 176><b0>
<SETTING_VALUE_TYPE><WPFP177><Write Protect Program Flash Page 177><b1>
<SETTING_VALUE_TYPE><WPFP178><Write Protect Program Flash Page 178><b2>
<SETTING_VALUE_TYPE><WPFP179><Write Protect Program Flash Page 179><b3>
<SETTING_VALUE_TYPE><WPFP180><Write Protect Program Flash Page 180><b4>
<SETTING_VALUE_TYPE><WPFP181><Write Protect Program Flash Page 181><b5>
<SETTING_VALUE_TYPE><WPFP182><Write Protect Program Flash Page 182><b6>
<SETTING_VALUE_TYPE><WPFP183><Write Protect Program Flash Page 183><b7>
<SETTING_VALUE_TYPE><WPFP184><Write Protect Program Flash Page 184><b8>
<SETTING_VALUE_TYPE><WPFP185><Write Protect Program Flash Page 185><b9>
<SETTING_VALUE_TYPE><WPFP186><Write Protect Program Flash Page 186><ba>
<SETTING_VALUE_TYPE><WPFP187><Write Protect Program Flash Page 187><bb>
<SETTING_VALUE_TYPE><WPFP188><Write Protect Program Flash Page 188><bc>
<SETTING_VALUE_TYPE><WPFP189><Write Protect Program Flash Page 189><bd>
<SETTING_VALUE_TYPE><WPFP190><Write Protect Program Flash Page 190><be>
<SETTING_VALUE_TYPE><WPFP191><Write Protect Program Flash Page 191><bf>
<SETTING_VALUE_TYPE><WPFP192><Write Protect Program Flash Page 192><c0>
<SETTING_VALUE_TYPE><WPFP193><Write Protect Program Flash Page 193><c1>
<SETTING_VALUE_TYPE><WPFP194><Write Protect Program Flash Page 194><c2>
<SETTING_VALUE_TYPE><WPFP195><Write Protect Program Flash Page 195><c3>
<SETTING_VALUE_TYPE><WPFP196><Write Protect Program Flash Page 196><c4>
<SETTING_VALUE_TYPE><WPFP197><Write Protect Program Flash Page 197><c5>
<SETTING_VALUE_TYPE><WPFP198><Write Protect Program Flash Page 198><c6>
<SETTING_VALUE_TYPE><WPFP199><Write Protect Program Flash Page 199><c7>
<SETTING_VALUE_TYPE><WPFP200><Write Protect Program Flash Page 200><c8>
<SETTING_VALUE_TYPE><WPFP201><Write Protect Program Flash Page 201><c9>
<SETTING_VALUE_TYPE><WPFP202><Write Protect Program Flash Page 202><ca>
<SETTING_VALUE_TYPE><WPFP203><Write Protect Program Flash Page 203><cb>
<SETTING_VALUE_TYPE><WPFP204><Write Protect Program Flash Page 204><cc>
<SETTING_VALUE_TYPE><WPFP205><Write Protect Program Flash Page 205><cd>
<SETTING_VALUE_TYPE><WPFP206><Write Protect Program Flash Page 206><ce>
<SETTING_VALUE_TYPE><WPFP207><Write Protect Program Flash Page 207><cf>
<SETTING_VALUE_TYPE><WPFP208><Write Protect Program Flash Page 208><d0>
<SETTING_VALUE_TYPE><WPFP209><Write Protect Program Flash Page 209><d1>
<SETTING_VALUE_TYPE><WPFP210><Write Protect Program Flash Page 210><d2>
<SETTING_VALUE_TYPE><WPFP211><Write Protect Program Flash Page 211><d3>
<SETTING_VALUE_TYPE><WPFP212><Write Protect Program Flash Page 212><d4>
<SETTING_VALUE_TYPE><WPFP213><Write Protect Program Flash Page 213><d5>
<SETTING_VALUE_TYPE><WPFP214><Write Protect Program Flash Page 214><d6>
<SETTING_VALUE_TYPE><WPFP215><Write Protect Program Flash Page 215><d7>
<SETTING_VALUE_TYPE><WPFP216><Write Protect Program Flash Page 216><d8>
<SETTING_VALUE_TYPE><WPFP217><Write Protect Program Flash Page 217><d9>
<SETTING_VALUE_TYPE><WPFP218><Write Protect Program Flash Page 218><da>
<SETTING_VALUE_TYPE><WPFP219><Write Protect Program Flash Page 219><db>
<SETTING_VALUE_TYPE><WPFP220><Write Protect Program Flash Page 220><dc>
<SETTING_VALUE_TYPE><WPFP221><Write Protect Program Flash Page 221><dd>
<SETTING_VALUE_TYPE><WPFP222><Write Protect Program Flash Page 222><de>
<SETTING_VALUE_TYPE><WPFP223><Write Protect Program Flash Page 223><df>
<SETTING_VALUE_TYPE><WPFP224><Write Protect Program Flash Page 224><e0>
<SETTING_VALUE_TYPE><WPFP225><Write Protect Program Flash Page 225><e1>
<SETTING_VALUE_TYPE><WPFP226><Write Protect Program Flash Page 226><e2>
<SETTING_VALUE_TYPE><WPFP227><Write Protect Program Flash Page 227><e3>
<SETTING_VALUE_TYPE><WPFP228><Write Protect Program Flash Page 228><e4>
<SETTING_VALUE_TYPE><WPFP229><Write Protect Program Flash Page 229><e5>
<SETTING_VALUE_TYPE><WPFP230><Write Protect Program Flash Page 230><e6>
<SETTING_VALUE_TYPE><WPFP231><Write Protect Program Flash Page 231><e7>
<SETTING_VALUE_TYPE><WPFP232><Write Protect Program Flash Page 232><e8>
<SETTING_VALUE_TYPE><WPFP233><Write Protect Program Flash Page 233><e9>
<SETTING_VALUE_TYPE><WPFP234><Write Protect Program Flash Page 234><ea>
<SETTING_VALUE_TYPE><WPFP235><Write Protect Program Flash Page 235><eb>
<SETTING_VALUE_TYPE><WPFP236><Write Protect Program Flash Page 236><ec>
<SETTING_VALUE_TYPE><WPFP237><Write Protect Program Flash Page 237><ed>
<SETTING_VALUE_TYPE><WPFP238><Write Protect Program Flash Page 238><ee>
<SETTING_VALUE_TYPE><WPFP239><Write Protect Program Flash Page 239><ef>
<SETTING_VALUE_TYPE><WPFP240><Write Protect Program Flash Page 240><f0>
<SETTING_VALUE_TYPE><WPFP241><Write Protect Program Flash Page 241><f1>
<SETTING_VALUE_TYPE><WPFP242><Write Protect Program Flash Page 242><f2>
<SETTING_VALUE_TYPE><WPFP243><Write Protect Program Flash Page 243><f3>
<SETTING_VALUE_TYPE><WPFP244><Write Protect Program Flash Page 244><f4>
<SETTING_VALUE_TYPE><WPFP245><Write Protect Program Flash Page 245><f5>
<SETTING_VALUE_TYPE><WPFP246><Write Protect Program Flash Page 246><f6>
<SETTING_VALUE_TYPE><WPFP247><Write Protect Program Flash Page 247><f7>
<SETTING_VALUE_TYPE><WPFP248><Write Protect Program Flash Page 248><f8>
<SETTING_VALUE_TYPE><WPFP249><Write Protect Program Flash Page 249><f9>
<SETTING_VALUE_TYPE><WPFP250><Write Protect Program Flash Page 250><fa>
<SETTING_VALUE_TYPE><WPFP251><Write Protect Program Flash Page 251><fb>
<SETTING_VALUE_TYPE><WPFP252><Write Protect Program Flash Page 252><fc>
<SETTING_VALUE_TYPE><WPFP253><Write Protect Program Flash Page 253><fd>
<SETTING_VALUE_TYPE><WPFP254><Write Protect Program Flash Page 254><fe>
<SETTING_VALUE_TYPE><WPFP255><Write Protect Program Flash Page 255><ff>
<CONFIGREG_INFO_TYPE><7ff7><0><f7><3>
<SWITCH_INFO_TYPE><WPDIS><Segment Write Protection Disable><1><2>
<SETTING_VALUE_TYPE><WPEN><Enabled><0>
<SETTING_VALUE_TYPE><WPDIS><Disabled><1>
<SWITCH_INFO_TYPE><WPEND><Segment Write Protection End Page Select><2><2>
<SETTING_VALUE_TYPE><WPSTARTMEM><write Protect from page 0 to WPFP><0>
<SETTING_VALUE_TYPE><WPENDMEM><Write Protect from WPFP to the last page of memory><2>
<SWITCH_INFO_TYPE><WPCFG><Write Protect Configuration Page Select><4><2>
<SETTING_VALUE_TYPE><WPCFGEN><Enabled><0>
<SETTING_VALUE_TYPE><WPCFGDIS><Disabled><4>
<CONFIGREG_INFO_TYPE><7ff8><0><3><2>
<SWITCH_INFO_TYPE><T5GSEL><TMR5 Gate Select bit><1><2>
<SETTING_VALUE_TYPE><T3G><TMR5 Gate is driven by the T3G input><0>
<SETTING_VALUE_TYPE><T5G><TMR5 Gate is driven by the T5G input><1>
<SWITCH_INFO_TYPE><CINASEL><CxINA Gate Select bit><2><2>
<SETTING_VALUE_TYPE><RA5><C1INA and C3INA are all re-mapped to pin RA5><0>
<SETTING_VALUE_TYPE><DEFAULT><C1INA and C3INA are on their default pin locations><2>
<CONFIGREG_INFO_TYPE><7ff9><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><the IOLOCK bit can be set and cleared using the unlock sequence><0>
<SETTING_VALUE_TYPE><ON><Once set, the IOLOCK bit cannot be cleared><1>
<SWITCH_INFO_TYPE><LS48MHZ><USB Low Speed Clock Select bit><2><2>
<SETTING_VALUE_TYPE><SYSX1><Divide-by-1 (System clock must be 6 MHz)><0>
<SETTING_VALUE_TYPE><SYSX2><Divide-by-2 (System clock must be 12 MHz)><2>
<SWITCH_INFO_TYPE><MSSPMSK2><MSSP2 7-Bit Address Masking Mode Enable bit><4><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><4>
<SWITCH_INFO_TYPE><MSSPMSK1><MSSP1 7-Bit Address Masking Mode Enable bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><7ffa><0><ff><3>
<SWITCH_INFO_TYPE><WDTWIN><Watch Dog Timer Window><3><4>
<SETTING_VALUE_TYPE><PS75_0><Watch Dog Timer Window Width is 75 percent><0>
<SETTING_VALUE_TYPE><PS50_0><Watch Dog Timer Window Width is 50 percent><1>
<SETTING_VALUE_TYPE><PS37_5><Watch Dog Timer Window Width is 37.5 percent><2>
<SETTING_VALUE_TYPE><PS25_0><Watch Dog Timer Window Width is 25 percent><3>
<SWITCH_INFO_TYPE><WDTCLK><Watch Dog Timer Clock Source><c><4>
<SETTING_VALUE_TYPE><SYS><Use FOSC/4 when system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><0>
<SETTING_VALUE_TYPE><SOSC><Always use SOSC><4>
<SETTING_VALUE_TYPE><LPRC><Always use INTOSC/LPRC><8>
<SETTING_VALUE_TYPE><FRC><Use FRC when WINDIS = 0, system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><c>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale><f0><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><10>
<SETTING_VALUE_TYPE><4><1:4><20>
<SETTING_VALUE_TYPE><8><1:8><30>
<SETTING_VALUE_TYPE><16><1:16><40>
<SETTING_VALUE_TYPE><32><1:32><50>
<SETTING_VALUE_TYPE><64><1:64><60>
<SETTING_VALUE_TYPE><128><1:128><70>
<SETTING_VALUE_TYPE><256><1:256><80>
<SETTING_VALUE_TYPE><512><1:512><90>
<SETTING_VALUE_TYPE><1024><1:1024><a0>
<SETTING_VALUE_TYPE><2048><1:2048><b0>
<SETTING_VALUE_TYPE><4096><1:4096><c0>
<SETTING_VALUE_TYPE><8192><1:8192><d0>
<SETTING_VALUE_TYPE><16384><1:16384><e0>
<SETTING_VALUE_TYPE><32768><1:32768><f0>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WINDIS><Windowed Watchdog Timer Disable><4><2>
<SETTING_VALUE_TYPE><WDTWIN><Windowed WDT enabled><0>
<SETTING_VALUE_TYPE><WDTSTD><Standard WDT selected; windowed WDT disabled><4>
<SWITCH_INFO_TYPE><WPSA><WDT Prescaler><8><2>
<SETTING_VALUE_TYPE><32><WDT prescaler ratio of 1:32><0>
<SETTING_VALUE_TYPE><128><WDT prescaler ratio of 1:128><8>
<CONFIGREG_INFO_TYPE><7ffc><0><1d><4>
<SWITCH_INFO_TYPE><RETEN><Retention Voltage Regulator Control Enable><1><2>
<SETTING_VALUE_TYPE><ON><Retention controlled by SRETEN during Sleep><0>
<SETTING_VALUE_TYPE><OFF><Retention not available><1>
<SWITCH_INFO_TYPE><VBTBOR><VBAT BOR Enable><4><2>
<SETTING_VALUE_TYPE><OFF><VBAT BOR is disabled><0>
<SETTING_VALUE_TYPE><ON><VBAT BOR is enabled><4>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR Enable><8><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled in Deep Sleep (does not affect operation in non-Deep Sleep modes)><0>
<SETTING_VALUE_TYPE><ON><BOR enabled in Deep Sleep><8>
<SWITCH_INFO_TYPE><DSBITEN><DSEN Bit Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Deep Sleep operation is always disabled><0>
<SETTING_VALUE_TYPE><ON><Deep Sleep is controlled by the register bit DSEN><10>
<CONFIGREG_INFO_TYPE><7ffd><0><f0><0>
<CONFIGREG_INFO_TYPE><7ffe><0><f8><1>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Timer Postscale Select><f8><20>
<SETTING_VALUE_TYPE><DSWDTPS0><1:32 (1 mS)><0>
<SETTING_VALUE_TYPE><DSWDTPS1><1:64 (2.1 mS)><8>
<SETTING_VALUE_TYPE><DSWDTPS2><1:128 (4.1 mS)><10>
<SETTING_VALUE_TYPE><DSWDTPS3><1: 256 (8.3 mS)><18>
<SETTING_VALUE_TYPE><DSWDTPS4><1:512 (16.5 mS)><20>
<SETTING_VALUE_TYPE><DSWDTPS5><1:1024 (33 mS)><28>
<SETTING_VALUE_TYPE><DSWDTPS6><1:2048 (66.1 mS)><30>
<SETTING_VALUE_TYPE><DSWDTPS7><1:4096 (132.1 mS)><38>
<SETTING_VALUE_TYPE><DSWDTPS8><1:8192 (264.3 mS)><40>
<SETTING_VALUE_TYPE><DSWDTPS9><1:16384 (528.5 mS)><48>
<SETTING_VALUE_TYPE><DSWDTPSA><1:32768 (1.057 Secs)><50>
<SETTING_VALUE_TYPE><DSWDTPSB><1:65536 (2.114 Secs)><58>
<SETTING_VALUE_TYPE><DSWDTPSC><1:131072 (4.228 Secs)><60>
<SETTING_VALUE_TYPE><DSWDTPSD><1:262114 (8.456 Secs)><68>
<SETTING_VALUE_TYPE><DSWDTPSE><1:524288 (16.912 Secs)><70>
<SETTING_VALUE_TYPE><DSWDTPSF><1:1048576 (33.825 Secs)><78>
<SETTING_VALUE_TYPE><DSWDTPS10><1:2097152 (67.7 Secs)><80>
<SETTING_VALUE_TYPE><DSWDTPS11><1:4194304 (135.3 Secs)><88>
<SETTING_VALUE_TYPE><DSWDTPS12><1:8388608 (4.5 Minutes)><90>
<SETTING_VALUE_TYPE><DSWDTPS13><1:16777216 (9 Minutes)><98>
<SETTING_VALUE_TYPE><DSWDTPS14><1:33554432 (18 Minutes)><a0>
<SETTING_VALUE_TYPE><DSWDTPS15><1:67108864 (36.1 Minutes)><a8>
<SETTING_VALUE_TYPE><DSWDTPS16><1:134217728 (72.2 Minutes)><b0>
<SETTING_VALUE_TYPE><DSWDTPS17><1:268435456 (2.4 Hours)><b8>
<SETTING_VALUE_TYPE><DSWDTPS18><1:536870912 (4.8 Hours)><c0>
<SETTING_VALUE_TYPE><DSWDTPS19><1:1073741824 (9.6 Hours)><c8>
<SETTING_VALUE_TYPE><DSWDTPS1A><1:2147483648 (19.2 Hours)><d0>
<SETTING_VALUE_TYPE><DSWDTPS1B><1:4294967296 (38.5 Hours)><d8>
<SETTING_VALUE_TYPE><DSWDTPS1C><1:8589934592 (77 Hours)><e0>
<SETTING_VALUE_TYPE><DSWDTPS1D><1:17179869184 (6.4 Days)><e8>
<SETTING_VALUE_TYPE><DSWDTPS1E><1:34359738368 (12.8  Days)><f0>
<SETTING_VALUE_TYPE><DSWDTPS1F><1:68719476736 (25.7 Days)><f8>
<CONFIGREG_INFO_TYPE><7fff><0><f3><2>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer Enable><1><2>
<SETTING_VALUE_TYPE><OFF><DSWDT Disabled><0>
<SETTING_VALUE_TYPE><ON><DSWDT Enabled><1>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Reference Clock Select><2><2>
<SETTING_VALUE_TYPE><SOSC><DSWDT uses SOSC as reference clock><0>
<SETTING_VALUE_TYPE><LPRC><DSWDT uses LPRC as reference clock><2>
<PART_INFO_TYPE><6522><PIC18F65K22><18xxxx><6><1><7fff><10><ff><3ff><0-5f><f60-fff><0><d>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SRETEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300004><0><1><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><1><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><SOSCREF><RTCC uses SOSC><1>
<CONFIGREG_INFO_TYPE><300005><0><89><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><RE7-Microcontroller Mode/RB3-All other modes><0>
<SETTING_VALUE_TYPE><PORTC><RC1><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RG5 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RG5 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-017FF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 01800-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBRT0><Table Read Protect 00800-017FF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBRT1><Table Read Protect 01800-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBRT2><Table Read Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBRT3><Table Read Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBRTB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><a26f><PIC18F65K40><18xxxx><6><1><7fff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RG5 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RG5 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><c580><PIC18F65K80><18xxxx><6><1><7fff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Ultra low-power regulator is Enabled (Controlled by SRETEN bit)><0>
<SETTING_VALUE_TYPE><OFF><Ultra low-power regulator is Disabled (Controlled by REGSLP bit)><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300005><0><8f><5>
<SWITCH_INFO_TYPE><CANMX><ECAN Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTE><ECAN TX and RX pins are located on RE5 and RE4, respectively><0>
<SETTING_VALUE_TYPE><PORTB><ECAN TX and RX pins are located on RB2 and RB3, respectively><1>
<SWITCH_INFO_TYPE><T0CKMX><Timer0 Clock Input Mux bit><2><2>
<SETTING_VALUE_TYPE><PORTG><Timer0 gets its clock input from the RG4/T0CKI pin on 64-pin packages><0>
<SETTING_VALUE_TYPE><PORTB><Timer0 gets its clock input from the RB5/T0CKI pin on 64-pin packages><2>
<SWITCH_INFO_TYPE><T3CKMX><Timer3 Clock Input Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTB><Timer3 gets its clock input from the RB5/T3CKI pin on 64-pin packages><0>
<SETTING_VALUE_TYPE><PORTG><Timer3 gets its clock input from the RG2/T3CKI pin on 64-pin packages><4>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RE3 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RE3 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><b591><PIC18F65K90><18xxxx><6><1><7fff><10><ff><3ff><0-5f><f60-fff><0><d>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SRETEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300004><0><1><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><1><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><SOSCREF><RTCC uses SOSC><1>
<CONFIGREG_INFO_TYPE><300005><0><89><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><RE7-Microcontroller Mode/RB3-All other modes><0>
<SETTING_VALUE_TYPE><PORTC><RC1><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RG5 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RG5 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-017FF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 01800-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBRT0><Table Read Protect 00800-017FF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBRT1><Table Read Protect 01800-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBRT2><Table Read Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBRT3><Table Read Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBRTB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><a662><PIC18F6620><18xxxx><2><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator w/ OSC2 configured as divide-by-4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300004><0><83><0>
<CONFIGREG_INFO_TYPE><300005><0><3><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a621><PIC18F6621><18xxxx><2><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><2f><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><b>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator with OSC2 configured as divide by 4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator with OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator with OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with HW enabled 4x PLL><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator with OSC2 configured as RA6><7>
<SETTING_VALUE_TYPE><ECIOPLL><EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL><c>
<SETTING_VALUE_TYPE><ECIOSWPLL><EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL><d>
<SETTING_VALUE_TYPE><HSSWPLL><HS oscillator with SW enabled 4x PLL><e>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><83><0>
<CONFIGREG_INFO_TYPE><300005><0><83><2>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><Multiplexed with RB3 or RE7><0>
<SETTING_VALUE_TYPE><PORTC><Multiplexed with RC1><1>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh)  code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><f622><PIC18F6622><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTE><ECCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><f625><PIC18F6627><18xxxx><6><1><17fff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTE><ECCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><6>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><6>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><6>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a628><PIC18F6628><18xxxx><6><1><17fff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTE><ECCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><6>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><6>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><6>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><6680><PIC18F6680><18xxxx><2><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><2f><2>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><b>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator with OSC2 configured as divide by 4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator with OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator with OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with HW enabled 4x PLL><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator with OSC2 configured as RA6><7>
<SETTING_VALUE_TYPE><ECIOPLL><EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL><c>
<SETTING_VALUE_TYPE><ECIOSWPLL><EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL><d>
<SETTING_VALUE_TYPE><HSSWPLL><HS oscillator with SW enabled 4x PLL><e>
<SWITCH_INFO_TYPE><OSCS><Osc. Switch Enable><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown Out Detect><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><83><0>
<CONFIGREG_INFO_TYPE><300005><0><83><2>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><MCLRE><MCLR enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage Program><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 000800-0003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 0004000-007FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 008000-00BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 00C000-00FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 004000-007FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 004000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><b610><PIC18F66J10><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><f8><0>
<CONFIGREG_INFO_TYPE><fffd><0><f3><1>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<PART_INFO_TYPE><b611><PIC18F66J11><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><c7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><Internal oscillator, port function on RA6 and RA7 ><0>
<SETTING_VALUE_TYPE><INTOSCO><Internal oscillator, CLKOUT on RA6 and port function on RA7><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, port function on RA6 and RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKOUT on RA6 and port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator, CLKO  on RA6><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator, PLL enabled, CLKO on RA6><7>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><f8><0>
<CONFIGREG_INFO_TYPE><fffd><0><ff><2>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP Address Masking Mode Select bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5-Bit Address Masking mode enable><0>
<SETTING_VALUE_TYPE><MSK7><7-Bit Address Masking mode enable><8>
<PART_INFO_TYPE><b615><PIC18F66J15><18xxxx><6><1><17ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><17ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><17ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><17ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><17ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><17ffc><0><f8><0>
<CONFIGREG_INFO_TYPE><17ffd><0><f3><1>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<PART_INFO_TYPE><b616><PIC18F66J16><18xxxx><6><1><17ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><17ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><17ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><17ffa><0><c7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><Internal oscillator, port function on RA6 and RA7 ><0>
<SETTING_VALUE_TYPE><INTOSCO><Internal oscillator, CLKOUT on RA6 and port function on RA7><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, port function on RA6 and RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKOUT on RA6 and port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator, CLKO  on RA6><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator, PLL enabled, CLKO on RA6><7>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><17ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><17ffc><0><f8><0>
<CONFIGREG_INFO_TYPE><17ffd><0><ff><2>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP Address Masking Mode Select bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5-Bit Address Masking mode enable><0>
<SETTING_VALUE_TYPE><MSK7><7-Bit Address Masking mode enable><8>
<PART_INFO_TYPE><b650><PIC18F66J50><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><fff8><0><ef><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><fff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><c7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC, Port function on RA6 and RA7><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSC, CLKO on RA6 and Port function on RA7><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, Port function on RA6 and RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKO on RA6 and Port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator, HS used by USB><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled, HSPLL used by USB><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with CLKO on RA6, EC used by USB><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL, CLKO on RA6, ECPLL used by USB><7>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><f8><0>
<CONFIGREG_INFO_TYPE><fffd><0><f9><2>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP Address Masking Mode Select bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5-Bit Address Masking mode enable><0>
<SETTING_VALUE_TYPE><MSK7><7-Bit Address Masking mode enable><8>
<PART_INFO_TYPE><b655><PIC18F66J55><18xxxx><6><1><17ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><17ff8><0><ef><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><17ff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><17ffa><0><c7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC, Port function on RA6 and RA7><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSC, CLKO on RA6 and Port function on RA7><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, Port function on RA6 and RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKO on RA6 and Port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator, HS used by USB><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled, HSPLL used by USB><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with CLKO on RA6, EC used by USB><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL, CLKO on RA6, ECPLL used by USB><7>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><17ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><17ffc><0><f8><0>
<CONFIGREG_INFO_TYPE><17ffd><0><f9><2>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP Address Masking Mode Select bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5-Bit Address Masking mode enable><0>
<SETTING_VALUE_TYPE><MSK7><7-Bit Address Masking mode enable><8>
<PART_INFO_TYPE><b660><PIC18F66J60><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVR><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLKO function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><f8><0>
<CONFIGREG_INFO_TYPE><fffd><0><f7><1>
<SWITCH_INFO_TYPE><ETHLED><Ethernet LED Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><RA0/RA1 function as I/O regardless of Ethernet module status><0>
<SETTING_VALUE_TYPE><ON><RA0/RA1 are multiplexed with LEDA/LEDB when Ethernet module is enabled and function as I/O when Ethernet is disabled><4>
<PART_INFO_TYPE><b665><PIC18F66J65><18xxxx><6><1><17ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><17ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVR><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><17ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><17ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLKO function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><17ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><17ffc><0><f8><0>
<CONFIGREG_INFO_TYPE><17ffd><0><f7><1>
<SWITCH_INFO_TYPE><ETHLED><Ethernet LED Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><RA0/RA1 function as I/O regardless of Ethernet module status><0>
<SETTING_VALUE_TYPE><ON><RA0/RA1 are multiplexed with LEDA/LEDB when Ethernet module is enabled and function as I/O when Ethernet is disabled><4>
<PART_INFO_TYPE><b690><PIC18F66J90><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled-Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<CONFIGREG_INFO_TYPE><fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><Internal oscillator, port function on RA6 and RA7 ><0>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, port function on RA6 and RA7><1>
<SETTING_VALUE_TYPE><INTOSCO><Internal oscillator, CLKOUT on RA6 and port function on RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKOUT on RA6 and port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with clock out on RA6><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL><7>
<SWITCH_INFO_TYPE><T1DIG><Secondary Clock Source T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator configured for low-power operation><0>
<SETTING_VALUE_TYPE><OFF><Timer1 oscillator configured for higher power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><2><1>
<SWITCH_INFO_TYPE><RTCSOSC><RTCC Reference Clock Select bit><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTOSC/INTRC as reference clock><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI as reference clock><2>
<CONFIGREG_INFO_TYPE><fffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><RC1><1>
<PART_INFO_TYPE><6693><PIC18F66J93><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><fff8><0><e1><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled-Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<CONFIGREG_INFO_TYPE><fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><Internal oscillator, port function on RA6 and RA7 ><0>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, port function on RA6 and RA7><1>
<SETTING_VALUE_TYPE><INTOSCO><Internal oscillator, CLKOUT on RA6 and port function on RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKOUT on RA6 and port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with clock out on RA6><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL><7>
<SWITCH_INFO_TYPE><T1DIG><Secondary Clock Source T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator configured for low-power operation><0>
<SETTING_VALUE_TYPE><OFF><Timer1 oscillator configured for higher power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><2><1>
<SWITCH_INFO_TYPE><RTCSOSC><RTCC Reference Clock Select bit><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTOSC/INTRC as reference clock><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI as reference clock><2>
<CONFIGREG_INFO_TYPE><fffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><RC1><1>
<PART_INFO_TYPE><6694><PIC18F66J94><18xxxx><6><1><ffef><10><ff><0><0-5f><f60-fff><0><10>
<CONFIGREG_INFO_TYPE><fff0><0><e0><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><fff1><0><f7><3>
<SWITCH_INFO_TYPE><BOREN><Brown-Out Reset Enable><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit, disabled in Deep Sleep><1>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><2><2>
<SETTING_VALUE_TYPE><0><2.0V><0>
<SETTING_VALUE_TYPE><1><1.8V><2>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fff2><0><af><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><FRC><Fast RC Oscillator (FRC)><0>
<SETTING_VALUE_TYPE><FRCPLL><Fast RC Oscillator with PLL module (FRCPLL)><1>
<SETTING_VALUE_TYPE><PRI><Primary Oscillator (XT, HS, EC)><2>
<SETTING_VALUE_TYPE><PRIPLL><Primary Oscillator with PLL module (XTPLL,HSPLL,ECPLL)><3>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator (SOSC)><4>
<SETTING_VALUE_TYPE><LPRC><Low-Power RC Oscillator (LPRC)><5>
<SETTING_VALUE_TYPE><FRC500KHZ><Fast RC Oscillator divided by 16 (500 kHz)><6>
<SETTING_VALUE_TYPE><FRCDIV><Fast RC Oscillator with Postscaler (FRCDIV)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><8><2>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SWITCH_INFO_TYPE><CLKOEN><Clock Out Enable Bit><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fff3><0><ff><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Frequency Multiplier Select bits><f><10>
<SETTING_VALUE_TYPE><NODIV><96 MHz PLL selected; No divide - Oscillator used directly (4 MHz input)><0>
<SETTING_VALUE_TYPE><DIV2><96 MHz PLL selected; Oscillator divided by 2 (8 MHz input)><1>
<SETTING_VALUE_TYPE><DIV3><96 MHz PLL selected; Oscillator divided by 3 (12 MHz input)><2>
<SETTING_VALUE_TYPE><DIV4><96 MHz PLL selected; Oscillator divided by 4 (16 MHz input)><3>
<SETTING_VALUE_TYPE><DIV5><96 MHz PLL selected; Oscillator divided by 5 (20 MHz input)><4>
<SETTING_VALUE_TYPE><DIV6><96 MHz PLL selected; Oscillator divided by 6 (24 MHz input)><5>
<SETTING_VALUE_TYPE><DIV10><96 MHz PLL selected; Oscillator divided by 10 (40 MHz input)><6>
<SETTING_VALUE_TYPE><DIV12><96 MHz PLL selected; Oscillator divided by 12 (48 MHz input)><7>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><8>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><9>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><a>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><b>
<SETTING_VALUE_TYPE><PLL4X><4x PLL selected><c>
<SETTING_VALUE_TYPE><PLL6X><6x PLL selected><d>
<SETTING_VALUE_TYPE><PLL8X><8x PLL selected><e>
<SETTING_VALUE_TYPE><NOPLL><No PLL used - PLLGO bit not available to user><f>
<CONFIGREG_INFO_TYPE><fff4><0><33><2>
<SWITCH_INFO_TYPE><POSCMD><Primary Oscillator Select><3><4>
<SETTING_VALUE_TYPE><EC><External clock mode selected><0>
<SETTING_VALUE_TYPE><MS><MS oscillator mode selected(3.5 MHz -10 MHz)><1>
<SETTING_VALUE_TYPE><HS><HS oscillator mode selected(10 MHz - 40 MHz)><2>
<SETTING_VALUE_TYPE><NONE><Primary oscillator disabled><3>
<SWITCH_INFO_TYPE><FSCM><Clock Switching and Monitor Selection Configuration bits><30><3>
<SETTING_VALUE_TYPE><CSECME><Clock switching is enabled, fail safe clock monitor is enabled><0>
<SETTING_VALUE_TYPE><CSECMD><Clock switching is enabled, fail safe clock monitor is disabled><10>
<SETTING_VALUE_TYPE><CSDCMD><Clock switching is disabled, fail safe clock monitor is disabled><20>
<CONFIGREG_INFO_TYPE><fff5><0><f0><0>
<CONFIGREG_INFO_TYPE><fff6><0><ff><1>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Boundary><ff><100>
<SETTING_VALUE_TYPE><WPFP0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><WPFP1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><WPFP2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><WPFP3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><WPFP4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><WPFP5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><WPFP6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><WPFP7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><WPFP8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><WPFP9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><WPFP10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><WPFP11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><WPFP12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><WPFP13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><WPFP14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><WPFP15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><WPFP16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><WPFP17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><WPFP18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><WPFP19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><WPFP20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><WPFP21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><WPFP22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><WPFP23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><WPFP24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><WPFP25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><WPFP26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><WPFP27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><WPFP28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><WPFP29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><WPFP30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><WPFP31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><WPFP32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><WPFP33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><WPFP34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><WPFP35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><WPFP36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><WPFP37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><WPFP38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><WPFP39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><WPFP40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><WPFP41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><WPFP42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><WPFP43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><WPFP44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><WPFP45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><WPFP46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><WPFP47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><WPFP48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><WPFP49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><WPFP50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><WPFP51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><WPFP52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><WPFP53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><WPFP54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><WPFP55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><WPFP56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><WPFP57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><WPFP58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><WPFP59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><WPFP60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><WPFP61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><WPFP62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><WPFP63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><WPFP64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><WPFP65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><WPFP66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><WPFP67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><WPFP68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><WPFP69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><WPFP70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><WPFP71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><WPFP72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><WPFP73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><WPFP74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><WPFP75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><WPFP76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><WPFP77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><WPFP78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><WPFP79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><WPFP80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><WPFP81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><WPFP82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><WPFP83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><WPFP84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><WPFP85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><WPFP86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><WPFP87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><WPFP88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><WPFP89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><WPFP90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><WPFP91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><WPFP92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><WPFP93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><WPFP94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><WPFP95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><WPFP96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><WPFP97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><WPFP98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><WPFP99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><WPFP100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><WPFP101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><WPFP102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><WPFP103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><WPFP104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><WPFP105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><WPFP106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><WPFP107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><WPFP108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><WPFP109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><WPFP110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><WPFP111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><WPFP112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><WPFP113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><WPFP114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><WPFP115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><WPFP116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><WPFP117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><WPFP118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><WPFP119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><WPFP120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><WPFP121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><WPFP122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><WPFP123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><WPFP124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><WPFP125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><WPFP126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><WPFP127><Write Protect Program Flash Page 127><7f>
<SETTING_VALUE_TYPE><WPFP128><Write Protect Program Flash Page 128><80>
<SETTING_VALUE_TYPE><WPFP129><Write Protect Program Flash Page 129><81>
<SETTING_VALUE_TYPE><WPFP130><Write Protect Program Flash Page 130><82>
<SETTING_VALUE_TYPE><WPFP131><Write Protect Program Flash Page 131><83>
<SETTING_VALUE_TYPE><WPFP132><Write Protect Program Flash Page 132><84>
<SETTING_VALUE_TYPE><WPFP133><Write Protect Program Flash Page 133><85>
<SETTING_VALUE_TYPE><WPFP134><Write Protect Program Flash Page 134><86>
<SETTING_VALUE_TYPE><WPFP135><Write Protect Program Flash Page 135><87>
<SETTING_VALUE_TYPE><WPFP136><Write Protect Program Flash Page 136><88>
<SETTING_VALUE_TYPE><WPFP137><Write Protect Program Flash Page 137><89>
<SETTING_VALUE_TYPE><WPFP138><Write Protect Program Flash Page 138><8a>
<SETTING_VALUE_TYPE><WPFP139><Write Protect Program Flash Page 139><8b>
<SETTING_VALUE_TYPE><WPFP140><Write Protect Program Flash Page 140><8c>
<SETTING_VALUE_TYPE><WPFP141><Write Protect Program Flash Page 141><8d>
<SETTING_VALUE_TYPE><WPFP142><Write Protect Program Flash Page 142><8e>
<SETTING_VALUE_TYPE><WPFP143><Write Protect Program Flash Page 143><8f>
<SETTING_VALUE_TYPE><WPFP144><Write Protect Program Flash Page 144><90>
<SETTING_VALUE_TYPE><WPFP145><Write Protect Program Flash Page 145><91>
<SETTING_VALUE_TYPE><WPFP146><Write Protect Program Flash Page 146><92>
<SETTING_VALUE_TYPE><WPFP147><Write Protect Program Flash Page 147><93>
<SETTING_VALUE_TYPE><WPFP148><Write Protect Program Flash Page 148><94>
<SETTING_VALUE_TYPE><WPFP149><Write Protect Program Flash Page 149><95>
<SETTING_VALUE_TYPE><WPFP150><Write Protect Program Flash Page 150><96>
<SETTING_VALUE_TYPE><WPFP151><Write Protect Program Flash Page 151><97>
<SETTING_VALUE_TYPE><WPFP152><Write Protect Program Flash Page 152><98>
<SETTING_VALUE_TYPE><WPFP153><Write Protect Program Flash Page 153><99>
<SETTING_VALUE_TYPE><WPFP154><Write Protect Program Flash Page 154><9a>
<SETTING_VALUE_TYPE><WPFP155><Write Protect Program Flash Page 155><9b>
<SETTING_VALUE_TYPE><WPFP156><Write Protect Program Flash Page 156><9c>
<SETTING_VALUE_TYPE><WPFP157><Write Protect Program Flash Page 157><9d>
<SETTING_VALUE_TYPE><WPFP158><Write Protect Program Flash Page 158><9e>
<SETTING_VALUE_TYPE><WPFP159><Write Protect Program Flash Page 159><9f>
<SETTING_VALUE_TYPE><WPFP160><Write Protect Program Flash Page 160><a0>
<SETTING_VALUE_TYPE><WPFP161><Write Protect Program Flash Page 161><a1>
<SETTING_VALUE_TYPE><WPFP162><Write Protect Program Flash Page 162><a2>
<SETTING_VALUE_TYPE><WPFP163><Write Protect Program Flash Page 163><a3>
<SETTING_VALUE_TYPE><WPFP164><Write Protect Program Flash Page 164><a4>
<SETTING_VALUE_TYPE><WPFP165><Write Protect Program Flash Page 165><a5>
<SETTING_VALUE_TYPE><WPFP166><Write Protect Program Flash Page 166><a6>
<SETTING_VALUE_TYPE><WPFP167><Write Protect Program Flash Page 167><a7>
<SETTING_VALUE_TYPE><WPFP168><Write Protect Program Flash Page 168><a8>
<SETTING_VALUE_TYPE><WPFP169><Write Protect Program Flash Page 169><a9>
<SETTING_VALUE_TYPE><WPFP170><Write Protect Program Flash Page 170><aa>
<SETTING_VALUE_TYPE><WPFP171><Write Protect Program Flash Page 171><ab>
<SETTING_VALUE_TYPE><WPFP172><Write Protect Program Flash Page 172><ac>
<SETTING_VALUE_TYPE><WPFP173><Write Protect Program Flash Page 173><ad>
<SETTING_VALUE_TYPE><WPFP174><Write Protect Program Flash Page 174><ae>
<SETTING_VALUE_TYPE><WPFP175><Write Protect Program Flash Page 175><af>
<SETTING_VALUE_TYPE><WPFP176><Write Protect Program Flash Page 176><b0>
<SETTING_VALUE_TYPE><WPFP177><Write Protect Program Flash Page 177><b1>
<SETTING_VALUE_TYPE><WPFP178><Write Protect Program Flash Page 178><b2>
<SETTING_VALUE_TYPE><WPFP179><Write Protect Program Flash Page 179><b3>
<SETTING_VALUE_TYPE><WPFP180><Write Protect Program Flash Page 180><b4>
<SETTING_VALUE_TYPE><WPFP181><Write Protect Program Flash Page 181><b5>
<SETTING_VALUE_TYPE><WPFP182><Write Protect Program Flash Page 182><b6>
<SETTING_VALUE_TYPE><WPFP183><Write Protect Program Flash Page 183><b7>
<SETTING_VALUE_TYPE><WPFP184><Write Protect Program Flash Page 184><b8>
<SETTING_VALUE_TYPE><WPFP185><Write Protect Program Flash Page 185><b9>
<SETTING_VALUE_TYPE><WPFP186><Write Protect Program Flash Page 186><ba>
<SETTING_VALUE_TYPE><WPFP187><Write Protect Program Flash Page 187><bb>
<SETTING_VALUE_TYPE><WPFP188><Write Protect Program Flash Page 188><bc>
<SETTING_VALUE_TYPE><WPFP189><Write Protect Program Flash Page 189><bd>
<SETTING_VALUE_TYPE><WPFP190><Write Protect Program Flash Page 190><be>
<SETTING_VALUE_TYPE><WPFP191><Write Protect Program Flash Page 191><bf>
<SETTING_VALUE_TYPE><WPFP192><Write Protect Program Flash Page 192><c0>
<SETTING_VALUE_TYPE><WPFP193><Write Protect Program Flash Page 193><c1>
<SETTING_VALUE_TYPE><WPFP194><Write Protect Program Flash Page 194><c2>
<SETTING_VALUE_TYPE><WPFP195><Write Protect Program Flash Page 195><c3>
<SETTING_VALUE_TYPE><WPFP196><Write Protect Program Flash Page 196><c4>
<SETTING_VALUE_TYPE><WPFP197><Write Protect Program Flash Page 197><c5>
<SETTING_VALUE_TYPE><WPFP198><Write Protect Program Flash Page 198><c6>
<SETTING_VALUE_TYPE><WPFP199><Write Protect Program Flash Page 199><c7>
<SETTING_VALUE_TYPE><WPFP200><Write Protect Program Flash Page 200><c8>
<SETTING_VALUE_TYPE><WPFP201><Write Protect Program Flash Page 201><c9>
<SETTING_VALUE_TYPE><WPFP202><Write Protect Program Flash Page 202><ca>
<SETTING_VALUE_TYPE><WPFP203><Write Protect Program Flash Page 203><cb>
<SETTING_VALUE_TYPE><WPFP204><Write Protect Program Flash Page 204><cc>
<SETTING_VALUE_TYPE><WPFP205><Write Protect Program Flash Page 205><cd>
<SETTING_VALUE_TYPE><WPFP206><Write Protect Program Flash Page 206><ce>
<SETTING_VALUE_TYPE><WPFP207><Write Protect Program Flash Page 207><cf>
<SETTING_VALUE_TYPE><WPFP208><Write Protect Program Flash Page 208><d0>
<SETTING_VALUE_TYPE><WPFP209><Write Protect Program Flash Page 209><d1>
<SETTING_VALUE_TYPE><WPFP210><Write Protect Program Flash Page 210><d2>
<SETTING_VALUE_TYPE><WPFP211><Write Protect Program Flash Page 211><d3>
<SETTING_VALUE_TYPE><WPFP212><Write Protect Program Flash Page 212><d4>
<SETTING_VALUE_TYPE><WPFP213><Write Protect Program Flash Page 213><d5>
<SETTING_VALUE_TYPE><WPFP214><Write Protect Program Flash Page 214><d6>
<SETTING_VALUE_TYPE><WPFP215><Write Protect Program Flash Page 215><d7>
<SETTING_VALUE_TYPE><WPFP216><Write Protect Program Flash Page 216><d8>
<SETTING_VALUE_TYPE><WPFP217><Write Protect Program Flash Page 217><d9>
<SETTING_VALUE_TYPE><WPFP218><Write Protect Program Flash Page 218><da>
<SETTING_VALUE_TYPE><WPFP219><Write Protect Program Flash Page 219><db>
<SETTING_VALUE_TYPE><WPFP220><Write Protect Program Flash Page 220><dc>
<SETTING_VALUE_TYPE><WPFP221><Write Protect Program Flash Page 221><dd>
<SETTING_VALUE_TYPE><WPFP222><Write Protect Program Flash Page 222><de>
<SETTING_VALUE_TYPE><WPFP223><Write Protect Program Flash Page 223><df>
<SETTING_VALUE_TYPE><WPFP224><Write Protect Program Flash Page 224><e0>
<SETTING_VALUE_TYPE><WPFP225><Write Protect Program Flash Page 225><e1>
<SETTING_VALUE_TYPE><WPFP226><Write Protect Program Flash Page 226><e2>
<SETTING_VALUE_TYPE><WPFP227><Write Protect Program Flash Page 227><e3>
<SETTING_VALUE_TYPE><WPFP228><Write Protect Program Flash Page 228><e4>
<SETTING_VALUE_TYPE><WPFP229><Write Protect Program Flash Page 229><e5>
<SETTING_VALUE_TYPE><WPFP230><Write Protect Program Flash Page 230><e6>
<SETTING_VALUE_TYPE><WPFP231><Write Protect Program Flash Page 231><e7>
<SETTING_VALUE_TYPE><WPFP232><Write Protect Program Flash Page 232><e8>
<SETTING_VALUE_TYPE><WPFP233><Write Protect Program Flash Page 233><e9>
<SETTING_VALUE_TYPE><WPFP234><Write Protect Program Flash Page 234><ea>
<SETTING_VALUE_TYPE><WPFP235><Write Protect Program Flash Page 235><eb>
<SETTING_VALUE_TYPE><WPFP236><Write Protect Program Flash Page 236><ec>
<SETTING_VALUE_TYPE><WPFP237><Write Protect Program Flash Page 237><ed>
<SETTING_VALUE_TYPE><WPFP238><Write Protect Program Flash Page 238><ee>
<SETTING_VALUE_TYPE><WPFP239><Write Protect Program Flash Page 239><ef>
<SETTING_VALUE_TYPE><WPFP240><Write Protect Program Flash Page 240><f0>
<SETTING_VALUE_TYPE><WPFP241><Write Protect Program Flash Page 241><f1>
<SETTING_VALUE_TYPE><WPFP242><Write Protect Program Flash Page 242><f2>
<SETTING_VALUE_TYPE><WPFP243><Write Protect Program Flash Page 243><f3>
<SETTING_VALUE_TYPE><WPFP244><Write Protect Program Flash Page 244><f4>
<SETTING_VALUE_TYPE><WPFP245><Write Protect Program Flash Page 245><f5>
<SETTING_VALUE_TYPE><WPFP246><Write Protect Program Flash Page 246><f6>
<SETTING_VALUE_TYPE><WPFP247><Write Protect Program Flash Page 247><f7>
<SETTING_VALUE_TYPE><WPFP248><Write Protect Program Flash Page 248><f8>
<SETTING_VALUE_TYPE><WPFP249><Write Protect Program Flash Page 249><f9>
<SETTING_VALUE_TYPE><WPFP250><Write Protect Program Flash Page 250><fa>
<SETTING_VALUE_TYPE><WPFP251><Write Protect Program Flash Page 251><fb>
<SETTING_VALUE_TYPE><WPFP252><Write Protect Program Flash Page 252><fc>
<SETTING_VALUE_TYPE><WPFP253><Write Protect Program Flash Page 253><fd>
<SETTING_VALUE_TYPE><WPFP254><Write Protect Program Flash Page 254><fe>
<SETTING_VALUE_TYPE><WPFP255><Write Protect Program Flash Page 255><ff>
<CONFIGREG_INFO_TYPE><fff7><0><f7><3>
<SWITCH_INFO_TYPE><WPDIS><Segment Write Protection Disable><1><2>
<SETTING_VALUE_TYPE><WPEN><Enabled><0>
<SETTING_VALUE_TYPE><WPDIS><Disabled><1>
<SWITCH_INFO_TYPE><WPEND><Segment Write Protection End Page Select><2><2>
<SETTING_VALUE_TYPE><WPSTARTMEM><write Protect from page 0 to WPFP><0>
<SETTING_VALUE_TYPE><WPENDMEM><Write Protect from WPFP to the last page of memory><2>
<SWITCH_INFO_TYPE><WPCFG><Write Protect Configuration Page Select><4><2>
<SETTING_VALUE_TYPE><WPCFGEN><Enabled><0>
<SETTING_VALUE_TYPE><WPCFGDIS><Disabled><4>
<CONFIGREG_INFO_TYPE><fff8><0><3><2>
<SWITCH_INFO_TYPE><T5GSEL><TMR5 Gate Select bit><1><2>
<SETTING_VALUE_TYPE><T3G><TMR5 Gate is driven by the T3G input><0>
<SETTING_VALUE_TYPE><T5G><TMR5 Gate is driven by the T5G input><1>
<SWITCH_INFO_TYPE><CINASEL><CxINA Gate Select bit><2><2>
<SETTING_VALUE_TYPE><RA5><C1INA and C3INA are all re-mapped to pin RA5><0>
<SETTING_VALUE_TYPE><DEFAULT><C1INA and C3INA are on their default pin locations><2>
<CONFIGREG_INFO_TYPE><fff9><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><the IOLOCK bit can be set and cleared using the unlock sequence><0>
<SETTING_VALUE_TYPE><ON><Once set, the IOLOCK bit cannot be cleared><1>
<SWITCH_INFO_TYPE><LS48MHZ><USB Low Speed Clock Select bit><2><2>
<SETTING_VALUE_TYPE><SYSX1><Divide-by-1 (System clock must be 6 MHz)><0>
<SETTING_VALUE_TYPE><SYSX2><Divide-by-2 (System clock must be 12 MHz)><2>
<SWITCH_INFO_TYPE><MSSPMSK2><MSSP2 7-Bit Address Masking Mode Enable bit><4><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><4>
<SWITCH_INFO_TYPE><MSSPMSK1><MSSP1 7-Bit Address Masking Mode Enable bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffa><0><ff><3>
<SWITCH_INFO_TYPE><WDTWIN><Watch Dog Timer Window><3><4>
<SETTING_VALUE_TYPE><PS75_0><Watch Dog Timer Window Width is 75 percent><0>
<SETTING_VALUE_TYPE><PS50_0><Watch Dog Timer Window Width is 50 percent><1>
<SETTING_VALUE_TYPE><PS37_5><Watch Dog Timer Window Width is 37.5 percent><2>
<SETTING_VALUE_TYPE><PS25_0><Watch Dog Timer Window Width is 25 percent><3>
<SWITCH_INFO_TYPE><WDTCLK><Watch Dog Timer Clock Source><c><4>
<SETTING_VALUE_TYPE><SYS><Use FOSC/4 when system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><0>
<SETTING_VALUE_TYPE><SOSC><Always use SOSC><4>
<SETTING_VALUE_TYPE><LPRC><Always use INTOSC/LPRC><8>
<SETTING_VALUE_TYPE><FRC><Use FRC when WINDIS = 0, system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><c>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale><f0><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><10>
<SETTING_VALUE_TYPE><4><1:4><20>
<SETTING_VALUE_TYPE><8><1:8><30>
<SETTING_VALUE_TYPE><16><1:16><40>
<SETTING_VALUE_TYPE><32><1:32><50>
<SETTING_VALUE_TYPE><64><1:64><60>
<SETTING_VALUE_TYPE><128><1:128><70>
<SETTING_VALUE_TYPE><256><1:256><80>
<SETTING_VALUE_TYPE><512><1:512><90>
<SETTING_VALUE_TYPE><1024><1:1024><a0>
<SETTING_VALUE_TYPE><2048><1:2048><b0>
<SETTING_VALUE_TYPE><4096><1:4096><c0>
<SETTING_VALUE_TYPE><8192><1:8192><d0>
<SETTING_VALUE_TYPE><16384><1:16384><e0>
<SETTING_VALUE_TYPE><32768><1:32768><f0>
<CONFIGREG_INFO_TYPE><fffb><0><ff><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WINDIS><Windowed Watchdog Timer Disable><4><2>
<SETTING_VALUE_TYPE><WDTWIN><Windowed WDT enabled><0>
<SETTING_VALUE_TYPE><WDTSTD><Standard WDT selected; windowed WDT disabled><4>
<SWITCH_INFO_TYPE><WPSA><WDT Prescaler><8><2>
<SETTING_VALUE_TYPE><32><WDT prescaler ratio of 1:32><0>
<SETTING_VALUE_TYPE><128><WDT prescaler ratio of 1:128><8>
<CONFIGREG_INFO_TYPE><fffc><0><1d><4>
<SWITCH_INFO_TYPE><RETEN><Retention Voltage Regulator Control Enable><1><2>
<SETTING_VALUE_TYPE><ON><Retention controlled by SRETEN during Sleep><0>
<SETTING_VALUE_TYPE><OFF><Retention not available><1>
<SWITCH_INFO_TYPE><VBTBOR><VBAT BOR Enable><4><2>
<SETTING_VALUE_TYPE><OFF><VBAT BOR is disabled><0>
<SETTING_VALUE_TYPE><ON><VBAT BOR is enabled><4>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR Enable><8><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled in Deep Sleep (does not affect operation in non-Deep Sleep modes)><0>
<SETTING_VALUE_TYPE><ON><BOR enabled in Deep Sleep><8>
<SWITCH_INFO_TYPE><DSBITEN><DSEN Bit Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Deep Sleep operation is always disabled><0>
<SETTING_VALUE_TYPE><ON><Deep Sleep is controlled by the register bit DSEN><10>
<CONFIGREG_INFO_TYPE><fffd><0><f0><0>
<CONFIGREG_INFO_TYPE><fffe><0><f8><1>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Timer Postscale Select><f8><20>
<SETTING_VALUE_TYPE><DSWDTPS0><1:32 (1 mS)><0>
<SETTING_VALUE_TYPE><DSWDTPS1><1:64 (2.1 mS)><8>
<SETTING_VALUE_TYPE><DSWDTPS2><1:128 (4.1 mS)><10>
<SETTING_VALUE_TYPE><DSWDTPS3><1: 256 (8.3 mS)><18>
<SETTING_VALUE_TYPE><DSWDTPS4><1:512 (16.5 mS)><20>
<SETTING_VALUE_TYPE><DSWDTPS5><1:1024 (33 mS)><28>
<SETTING_VALUE_TYPE><DSWDTPS6><1:2048 (66.1 mS)><30>
<SETTING_VALUE_TYPE><DSWDTPS7><1:4096 (132.1 mS)><38>
<SETTING_VALUE_TYPE><DSWDTPS8><1:8192 (264.3 mS)><40>
<SETTING_VALUE_TYPE><DSWDTPS9><1:16384 (528.5 mS)><48>
<SETTING_VALUE_TYPE><DSWDTPSA><1:32768 (1.057 Secs)><50>
<SETTING_VALUE_TYPE><DSWDTPSB><1:65536 (2.114 Secs)><58>
<SETTING_VALUE_TYPE><DSWDTPSC><1:131072 (4.228 Secs)><60>
<SETTING_VALUE_TYPE><DSWDTPSD><1:262114 (8.456 Secs)><68>
<SETTING_VALUE_TYPE><DSWDTPSE><1:524288 (16.912 Secs)><70>
<SETTING_VALUE_TYPE><DSWDTPSF><1:1048576 (33.825 Secs)><78>
<SETTING_VALUE_TYPE><DSWDTPS10><1:2097152 (67.7 Secs)><80>
<SETTING_VALUE_TYPE><DSWDTPS11><1:4194304 (135.3 Secs)><88>
<SETTING_VALUE_TYPE><DSWDTPS12><1:8388608 (4.5 Minutes)><90>
<SETTING_VALUE_TYPE><DSWDTPS13><1:16777216 (9 Minutes)><98>
<SETTING_VALUE_TYPE><DSWDTPS14><1:33554432 (18 Minutes)><a0>
<SETTING_VALUE_TYPE><DSWDTPS15><1:67108864 (36.1 Minutes)><a8>
<SETTING_VALUE_TYPE><DSWDTPS16><1:134217728 (72.2 Minutes)><b0>
<SETTING_VALUE_TYPE><DSWDTPS17><1:268435456 (2.4 Hours)><b8>
<SETTING_VALUE_TYPE><DSWDTPS18><1:536870912 (4.8 Hours)><c0>
<SETTING_VALUE_TYPE><DSWDTPS19><1:1073741824 (9.6 Hours)><c8>
<SETTING_VALUE_TYPE><DSWDTPS1A><1:2147483648 (19.2 Hours)><d0>
<SETTING_VALUE_TYPE><DSWDTPS1B><1:4294967296 (38.5 Hours)><d8>
<SETTING_VALUE_TYPE><DSWDTPS1C><1:8589934592 (77 Hours)><e0>
<SETTING_VALUE_TYPE><DSWDTPS1D><1:17179869184 (6.4 Days)><e8>
<SETTING_VALUE_TYPE><DSWDTPS1E><1:34359738368 (12.8  Days)><f0>
<SETTING_VALUE_TYPE><DSWDTPS1F><1:68719476736 (25.7 Days)><f8>
<CONFIGREG_INFO_TYPE><ffff><0><f3><2>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer Enable><1><2>
<SETTING_VALUE_TYPE><OFF><DSWDT Disabled><0>
<SETTING_VALUE_TYPE><ON><DSWDT Enabled><1>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Reference Clock Select><2><2>
<SETTING_VALUE_TYPE><SOSC><DSWDT uses SOSC as reference clock><0>
<SETTING_VALUE_TYPE><LPRC><DSWDT uses LPRC as reference clock><2>
<PART_INFO_TYPE><6699><PIC18F66J99><18xxxx><6><1><17fef><10><ff><0><0-5f><f60-fff><0><10>
<CONFIGREG_INFO_TYPE><17ff0><0><e0><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><17ff1><0><f7><3>
<SWITCH_INFO_TYPE><BOREN><Brown-Out Reset Enable><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit, disabled in Deep Sleep><1>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><2><2>
<SETTING_VALUE_TYPE><0><2.0V><0>
<SETTING_VALUE_TYPE><1><1.8V><2>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><17ff2><0><af><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><FRC><Fast RC Oscillator (FRC)><0>
<SETTING_VALUE_TYPE><FRCPLL><Fast RC Oscillator with PLL module (FRCPLL)><1>
<SETTING_VALUE_TYPE><PRI><Primary Oscillator (XT, HS, EC)><2>
<SETTING_VALUE_TYPE><PRIPLL><Primary Oscillator with PLL module (XTPLL,HSPLL,ECPLL)><3>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator (SOSC)><4>
<SETTING_VALUE_TYPE><LPRC><Low-Power RC Oscillator (LPRC)><5>
<SETTING_VALUE_TYPE><FRC500KHZ><Fast RC Oscillator divided by 16 (500 kHz)><6>
<SETTING_VALUE_TYPE><FRCDIV><Fast RC Oscillator with Postscaler (FRCDIV)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><8><2>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SWITCH_INFO_TYPE><CLKOEN><Clock Out Enable Bit><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><17ff3><0><ff><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Frequency Multiplier Select bits><f><10>
<SETTING_VALUE_TYPE><NODIV><96 MHz PLL selected; No divide - Oscillator used directly (4 MHz input)><0>
<SETTING_VALUE_TYPE><DIV2><96 MHz PLL selected; Oscillator divided by 2 (8 MHz input)><1>
<SETTING_VALUE_TYPE><DIV3><96 MHz PLL selected; Oscillator divided by 3 (12 MHz input)><2>
<SETTING_VALUE_TYPE><DIV4><96 MHz PLL selected; Oscillator divided by 4 (16 MHz input)><3>
<SETTING_VALUE_TYPE><DIV5><96 MHz PLL selected; Oscillator divided by 5 (20 MHz input)><4>
<SETTING_VALUE_TYPE><DIV6><96 MHz PLL selected; Oscillator divided by 6 (24 MHz input)><5>
<SETTING_VALUE_TYPE><DIV10><96 MHz PLL selected; Oscillator divided by 10 (40 MHz input)><6>
<SETTING_VALUE_TYPE><DIV12><96 MHz PLL selected; Oscillator divided by 12 (48 MHz input)><7>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><8>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><9>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><a>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><b>
<SETTING_VALUE_TYPE><PLL4X><4x PLL selected><c>
<SETTING_VALUE_TYPE><PLL6X><6x PLL selected><d>
<SETTING_VALUE_TYPE><PLL8X><8x PLL selected><e>
<SETTING_VALUE_TYPE><NOPLL><No PLL used - PLLGO bit not available to user><f>
<CONFIGREG_INFO_TYPE><17ff4><0><33><2>
<SWITCH_INFO_TYPE><POSCMD><Primary Oscillator Select><3><4>
<SETTING_VALUE_TYPE><EC><External clock mode selected><0>
<SETTING_VALUE_TYPE><MS><MS oscillator mode selected(3.5 MHz -10 MHz)><1>
<SETTING_VALUE_TYPE><HS><HS oscillator mode selected(10 MHz - 40 MHz)><2>
<SETTING_VALUE_TYPE><NONE><Primary oscillator disabled><3>
<SWITCH_INFO_TYPE><FSCM><Clock Switching and Monitor Selection Configuration bits><30><3>
<SETTING_VALUE_TYPE><CSECME><Clock switching is enabled, fail safe clock monitor is enabled><0>
<SETTING_VALUE_TYPE><CSECMD><Clock switching is enabled, fail safe clock monitor is disabled><10>
<SETTING_VALUE_TYPE><CSDCMD><Clock switching is disabled, fail safe clock monitor is disabled><20>
<CONFIGREG_INFO_TYPE><17ff5><0><f0><0>
<CONFIGREG_INFO_TYPE><17ff6><0><ff><1>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Boundary><ff><100>
<SETTING_VALUE_TYPE><WPFP0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><WPFP1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><WPFP2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><WPFP3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><WPFP4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><WPFP5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><WPFP6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><WPFP7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><WPFP8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><WPFP9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><WPFP10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><WPFP11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><WPFP12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><WPFP13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><WPFP14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><WPFP15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><WPFP16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><WPFP17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><WPFP18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><WPFP19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><WPFP20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><WPFP21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><WPFP22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><WPFP23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><WPFP24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><WPFP25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><WPFP26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><WPFP27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><WPFP28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><WPFP29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><WPFP30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><WPFP31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><WPFP32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><WPFP33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><WPFP34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><WPFP35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><WPFP36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><WPFP37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><WPFP38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><WPFP39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><WPFP40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><WPFP41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><WPFP42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><WPFP43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><WPFP44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><WPFP45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><WPFP46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><WPFP47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><WPFP48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><WPFP49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><WPFP50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><WPFP51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><WPFP52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><WPFP53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><WPFP54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><WPFP55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><WPFP56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><WPFP57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><WPFP58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><WPFP59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><WPFP60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><WPFP61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><WPFP62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><WPFP63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><WPFP64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><WPFP65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><WPFP66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><WPFP67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><WPFP68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><WPFP69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><WPFP70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><WPFP71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><WPFP72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><WPFP73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><WPFP74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><WPFP75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><WPFP76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><WPFP77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><WPFP78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><WPFP79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><WPFP80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><WPFP81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><WPFP82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><WPFP83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><WPFP84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><WPFP85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><WPFP86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><WPFP87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><WPFP88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><WPFP89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><WPFP90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><WPFP91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><WPFP92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><WPFP93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><WPFP94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><WPFP95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><WPFP96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><WPFP97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><WPFP98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><WPFP99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><WPFP100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><WPFP101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><WPFP102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><WPFP103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><WPFP104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><WPFP105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><WPFP106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><WPFP107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><WPFP108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><WPFP109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><WPFP110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><WPFP111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><WPFP112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><WPFP113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><WPFP114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><WPFP115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><WPFP116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><WPFP117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><WPFP118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><WPFP119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><WPFP120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><WPFP121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><WPFP122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><WPFP123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><WPFP124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><WPFP125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><WPFP126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><WPFP127><Write Protect Program Flash Page 127><7f>
<SETTING_VALUE_TYPE><WPFP128><Write Protect Program Flash Page 128><80>
<SETTING_VALUE_TYPE><WPFP129><Write Protect Program Flash Page 129><81>
<SETTING_VALUE_TYPE><WPFP130><Write Protect Program Flash Page 130><82>
<SETTING_VALUE_TYPE><WPFP131><Write Protect Program Flash Page 131><83>
<SETTING_VALUE_TYPE><WPFP132><Write Protect Program Flash Page 132><84>
<SETTING_VALUE_TYPE><WPFP133><Write Protect Program Flash Page 133><85>
<SETTING_VALUE_TYPE><WPFP134><Write Protect Program Flash Page 134><86>
<SETTING_VALUE_TYPE><WPFP135><Write Protect Program Flash Page 135><87>
<SETTING_VALUE_TYPE><WPFP136><Write Protect Program Flash Page 136><88>
<SETTING_VALUE_TYPE><WPFP137><Write Protect Program Flash Page 137><89>
<SETTING_VALUE_TYPE><WPFP138><Write Protect Program Flash Page 138><8a>
<SETTING_VALUE_TYPE><WPFP139><Write Protect Program Flash Page 139><8b>
<SETTING_VALUE_TYPE><WPFP140><Write Protect Program Flash Page 140><8c>
<SETTING_VALUE_TYPE><WPFP141><Write Protect Program Flash Page 141><8d>
<SETTING_VALUE_TYPE><WPFP142><Write Protect Program Flash Page 142><8e>
<SETTING_VALUE_TYPE><WPFP143><Write Protect Program Flash Page 143><8f>
<SETTING_VALUE_TYPE><WPFP144><Write Protect Program Flash Page 144><90>
<SETTING_VALUE_TYPE><WPFP145><Write Protect Program Flash Page 145><91>
<SETTING_VALUE_TYPE><WPFP146><Write Protect Program Flash Page 146><92>
<SETTING_VALUE_TYPE><WPFP147><Write Protect Program Flash Page 147><93>
<SETTING_VALUE_TYPE><WPFP148><Write Protect Program Flash Page 148><94>
<SETTING_VALUE_TYPE><WPFP149><Write Protect Program Flash Page 149><95>
<SETTING_VALUE_TYPE><WPFP150><Write Protect Program Flash Page 150><96>
<SETTING_VALUE_TYPE><WPFP151><Write Protect Program Flash Page 151><97>
<SETTING_VALUE_TYPE><WPFP152><Write Protect Program Flash Page 152><98>
<SETTING_VALUE_TYPE><WPFP153><Write Protect Program Flash Page 153><99>
<SETTING_VALUE_TYPE><WPFP154><Write Protect Program Flash Page 154><9a>
<SETTING_VALUE_TYPE><WPFP155><Write Protect Program Flash Page 155><9b>
<SETTING_VALUE_TYPE><WPFP156><Write Protect Program Flash Page 156><9c>
<SETTING_VALUE_TYPE><WPFP157><Write Protect Program Flash Page 157><9d>
<SETTING_VALUE_TYPE><WPFP158><Write Protect Program Flash Page 158><9e>
<SETTING_VALUE_TYPE><WPFP159><Write Protect Program Flash Page 159><9f>
<SETTING_VALUE_TYPE><WPFP160><Write Protect Program Flash Page 160><a0>
<SETTING_VALUE_TYPE><WPFP161><Write Protect Program Flash Page 161><a1>
<SETTING_VALUE_TYPE><WPFP162><Write Protect Program Flash Page 162><a2>
<SETTING_VALUE_TYPE><WPFP163><Write Protect Program Flash Page 163><a3>
<SETTING_VALUE_TYPE><WPFP164><Write Protect Program Flash Page 164><a4>
<SETTING_VALUE_TYPE><WPFP165><Write Protect Program Flash Page 165><a5>
<SETTING_VALUE_TYPE><WPFP166><Write Protect Program Flash Page 166><a6>
<SETTING_VALUE_TYPE><WPFP167><Write Protect Program Flash Page 167><a7>
<SETTING_VALUE_TYPE><WPFP168><Write Protect Program Flash Page 168><a8>
<SETTING_VALUE_TYPE><WPFP169><Write Protect Program Flash Page 169><a9>
<SETTING_VALUE_TYPE><WPFP170><Write Protect Program Flash Page 170><aa>
<SETTING_VALUE_TYPE><WPFP171><Write Protect Program Flash Page 171><ab>
<SETTING_VALUE_TYPE><WPFP172><Write Protect Program Flash Page 172><ac>
<SETTING_VALUE_TYPE><WPFP173><Write Protect Program Flash Page 173><ad>
<SETTING_VALUE_TYPE><WPFP174><Write Protect Program Flash Page 174><ae>
<SETTING_VALUE_TYPE><WPFP175><Write Protect Program Flash Page 175><af>
<SETTING_VALUE_TYPE><WPFP176><Write Protect Program Flash Page 176><b0>
<SETTING_VALUE_TYPE><WPFP177><Write Protect Program Flash Page 177><b1>
<SETTING_VALUE_TYPE><WPFP178><Write Protect Program Flash Page 178><b2>
<SETTING_VALUE_TYPE><WPFP179><Write Protect Program Flash Page 179><b3>
<SETTING_VALUE_TYPE><WPFP180><Write Protect Program Flash Page 180><b4>
<SETTING_VALUE_TYPE><WPFP181><Write Protect Program Flash Page 181><b5>
<SETTING_VALUE_TYPE><WPFP182><Write Protect Program Flash Page 182><b6>
<SETTING_VALUE_TYPE><WPFP183><Write Protect Program Flash Page 183><b7>
<SETTING_VALUE_TYPE><WPFP184><Write Protect Program Flash Page 184><b8>
<SETTING_VALUE_TYPE><WPFP185><Write Protect Program Flash Page 185><b9>
<SETTING_VALUE_TYPE><WPFP186><Write Protect Program Flash Page 186><ba>
<SETTING_VALUE_TYPE><WPFP187><Write Protect Program Flash Page 187><bb>
<SETTING_VALUE_TYPE><WPFP188><Write Protect Program Flash Page 188><bc>
<SETTING_VALUE_TYPE><WPFP189><Write Protect Program Flash Page 189><bd>
<SETTING_VALUE_TYPE><WPFP190><Write Protect Program Flash Page 190><be>
<SETTING_VALUE_TYPE><WPFP191><Write Protect Program Flash Page 191><bf>
<SETTING_VALUE_TYPE><WPFP192><Write Protect Program Flash Page 192><c0>
<SETTING_VALUE_TYPE><WPFP193><Write Protect Program Flash Page 193><c1>
<SETTING_VALUE_TYPE><WPFP194><Write Protect Program Flash Page 194><c2>
<SETTING_VALUE_TYPE><WPFP195><Write Protect Program Flash Page 195><c3>
<SETTING_VALUE_TYPE><WPFP196><Write Protect Program Flash Page 196><c4>
<SETTING_VALUE_TYPE><WPFP197><Write Protect Program Flash Page 197><c5>
<SETTING_VALUE_TYPE><WPFP198><Write Protect Program Flash Page 198><c6>
<SETTING_VALUE_TYPE><WPFP199><Write Protect Program Flash Page 199><c7>
<SETTING_VALUE_TYPE><WPFP200><Write Protect Program Flash Page 200><c8>
<SETTING_VALUE_TYPE><WPFP201><Write Protect Program Flash Page 201><c9>
<SETTING_VALUE_TYPE><WPFP202><Write Protect Program Flash Page 202><ca>
<SETTING_VALUE_TYPE><WPFP203><Write Protect Program Flash Page 203><cb>
<SETTING_VALUE_TYPE><WPFP204><Write Protect Program Flash Page 204><cc>
<SETTING_VALUE_TYPE><WPFP205><Write Protect Program Flash Page 205><cd>
<SETTING_VALUE_TYPE><WPFP206><Write Protect Program Flash Page 206><ce>
<SETTING_VALUE_TYPE><WPFP207><Write Protect Program Flash Page 207><cf>
<SETTING_VALUE_TYPE><WPFP208><Write Protect Program Flash Page 208><d0>
<SETTING_VALUE_TYPE><WPFP209><Write Protect Program Flash Page 209><d1>
<SETTING_VALUE_TYPE><WPFP210><Write Protect Program Flash Page 210><d2>
<SETTING_VALUE_TYPE><WPFP211><Write Protect Program Flash Page 211><d3>
<SETTING_VALUE_TYPE><WPFP212><Write Protect Program Flash Page 212><d4>
<SETTING_VALUE_TYPE><WPFP213><Write Protect Program Flash Page 213><d5>
<SETTING_VALUE_TYPE><WPFP214><Write Protect Program Flash Page 214><d6>
<SETTING_VALUE_TYPE><WPFP215><Write Protect Program Flash Page 215><d7>
<SETTING_VALUE_TYPE><WPFP216><Write Protect Program Flash Page 216><d8>
<SETTING_VALUE_TYPE><WPFP217><Write Protect Program Flash Page 217><d9>
<SETTING_VALUE_TYPE><WPFP218><Write Protect Program Flash Page 218><da>
<SETTING_VALUE_TYPE><WPFP219><Write Protect Program Flash Page 219><db>
<SETTING_VALUE_TYPE><WPFP220><Write Protect Program Flash Page 220><dc>
<SETTING_VALUE_TYPE><WPFP221><Write Protect Program Flash Page 221><dd>
<SETTING_VALUE_TYPE><WPFP222><Write Protect Program Flash Page 222><de>
<SETTING_VALUE_TYPE><WPFP223><Write Protect Program Flash Page 223><df>
<SETTING_VALUE_TYPE><WPFP224><Write Protect Program Flash Page 224><e0>
<SETTING_VALUE_TYPE><WPFP225><Write Protect Program Flash Page 225><e1>
<SETTING_VALUE_TYPE><WPFP226><Write Protect Program Flash Page 226><e2>
<SETTING_VALUE_TYPE><WPFP227><Write Protect Program Flash Page 227><e3>
<SETTING_VALUE_TYPE><WPFP228><Write Protect Program Flash Page 228><e4>
<SETTING_VALUE_TYPE><WPFP229><Write Protect Program Flash Page 229><e5>
<SETTING_VALUE_TYPE><WPFP230><Write Protect Program Flash Page 230><e6>
<SETTING_VALUE_TYPE><WPFP231><Write Protect Program Flash Page 231><e7>
<SETTING_VALUE_TYPE><WPFP232><Write Protect Program Flash Page 232><e8>
<SETTING_VALUE_TYPE><WPFP233><Write Protect Program Flash Page 233><e9>
<SETTING_VALUE_TYPE><WPFP234><Write Protect Program Flash Page 234><ea>
<SETTING_VALUE_TYPE><WPFP235><Write Protect Program Flash Page 235><eb>
<SETTING_VALUE_TYPE><WPFP236><Write Protect Program Flash Page 236><ec>
<SETTING_VALUE_TYPE><WPFP237><Write Protect Program Flash Page 237><ed>
<SETTING_VALUE_TYPE><WPFP238><Write Protect Program Flash Page 238><ee>
<SETTING_VALUE_TYPE><WPFP239><Write Protect Program Flash Page 239><ef>
<SETTING_VALUE_TYPE><WPFP240><Write Protect Program Flash Page 240><f0>
<SETTING_VALUE_TYPE><WPFP241><Write Protect Program Flash Page 241><f1>
<SETTING_VALUE_TYPE><WPFP242><Write Protect Program Flash Page 242><f2>
<SETTING_VALUE_TYPE><WPFP243><Write Protect Program Flash Page 243><f3>
<SETTING_VALUE_TYPE><WPFP244><Write Protect Program Flash Page 244><f4>
<SETTING_VALUE_TYPE><WPFP245><Write Protect Program Flash Page 245><f5>
<SETTING_VALUE_TYPE><WPFP246><Write Protect Program Flash Page 246><f6>
<SETTING_VALUE_TYPE><WPFP247><Write Protect Program Flash Page 247><f7>
<SETTING_VALUE_TYPE><WPFP248><Write Protect Program Flash Page 248><f8>
<SETTING_VALUE_TYPE><WPFP249><Write Protect Program Flash Page 249><f9>
<SETTING_VALUE_TYPE><WPFP250><Write Protect Program Flash Page 250><fa>
<SETTING_VALUE_TYPE><WPFP251><Write Protect Program Flash Page 251><fb>
<SETTING_VALUE_TYPE><WPFP252><Write Protect Program Flash Page 252><fc>
<SETTING_VALUE_TYPE><WPFP253><Write Protect Program Flash Page 253><fd>
<SETTING_VALUE_TYPE><WPFP254><Write Protect Program Flash Page 254><fe>
<SETTING_VALUE_TYPE><WPFP255><Write Protect Program Flash Page 255><ff>
<CONFIGREG_INFO_TYPE><17ff7><0><f7><3>
<SWITCH_INFO_TYPE><WPDIS><Segment Write Protection Disable><1><2>
<SETTING_VALUE_TYPE><WPEN><Enabled><0>
<SETTING_VALUE_TYPE><WPDIS><Disabled><1>
<SWITCH_INFO_TYPE><WPEND><Segment Write Protection End Page Select><2><2>
<SETTING_VALUE_TYPE><WPSTARTMEM><write Protect from page 0 to WPFP><0>
<SETTING_VALUE_TYPE><WPENDMEM><Write Protect from WPFP to the last page of memory><2>
<SWITCH_INFO_TYPE><WPCFG><Write Protect Configuration Page Select><4><2>
<SETTING_VALUE_TYPE><WPCFGEN><Enabled><0>
<SETTING_VALUE_TYPE><WPCFGDIS><Disabled><4>
<CONFIGREG_INFO_TYPE><17ff8><0><3><2>
<SWITCH_INFO_TYPE><T5GSEL><TMR5 Gate Select bit><1><2>
<SETTING_VALUE_TYPE><T3G><TMR5 Gate is driven by the T3G input><0>
<SETTING_VALUE_TYPE><T5G><TMR5 Gate is driven by the T5G input><1>
<SWITCH_INFO_TYPE><CINASEL><CxINA Gate Select bit><2><2>
<SETTING_VALUE_TYPE><RA5><C1INA and C3INA are all re-mapped to pin RA5><0>
<SETTING_VALUE_TYPE><DEFAULT><C1INA and C3INA are on their default pin locations><2>
<CONFIGREG_INFO_TYPE><17ff9><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><the IOLOCK bit can be set and cleared using the unlock sequence><0>
<SETTING_VALUE_TYPE><ON><Once set, the IOLOCK bit cannot be cleared><1>
<SWITCH_INFO_TYPE><LS48MHZ><USB Low Speed Clock Select bit><2><2>
<SETTING_VALUE_TYPE><SYSX1><Divide-by-1 (System clock must be 6 MHz)><0>
<SETTING_VALUE_TYPE><SYSX2><Divide-by-2 (System clock must be 12 MHz)><2>
<SWITCH_INFO_TYPE><MSSPMSK2><MSSP2 7-Bit Address Masking Mode Enable bit><4><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><4>
<SWITCH_INFO_TYPE><MSSPMSK1><MSSP1 7-Bit Address Masking Mode Enable bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><17ffa><0><ff><3>
<SWITCH_INFO_TYPE><WDTWIN><Watch Dog Timer Window><3><4>
<SETTING_VALUE_TYPE><PS75_0><Watch Dog Timer Window Width is 75 percent><0>
<SETTING_VALUE_TYPE><PS50_0><Watch Dog Timer Window Width is 50 percent><1>
<SETTING_VALUE_TYPE><PS37_5><Watch Dog Timer Window Width is 37.5 percent><2>
<SETTING_VALUE_TYPE><PS25_0><Watch Dog Timer Window Width is 25 percent><3>
<SWITCH_INFO_TYPE><WDTCLK><Watch Dog Timer Clock Source><c><4>
<SETTING_VALUE_TYPE><SYS><Use FOSC/4 when system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><0>
<SETTING_VALUE_TYPE><SOSC><Always use SOSC><4>
<SETTING_VALUE_TYPE><LPRC><Always use INTOSC/LPRC><8>
<SETTING_VALUE_TYPE><FRC><Use FRC when WINDIS = 0, system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><c>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale><f0><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><10>
<SETTING_VALUE_TYPE><4><1:4><20>
<SETTING_VALUE_TYPE><8><1:8><30>
<SETTING_VALUE_TYPE><16><1:16><40>
<SETTING_VALUE_TYPE><32><1:32><50>
<SETTING_VALUE_TYPE><64><1:64><60>
<SETTING_VALUE_TYPE><128><1:128><70>
<SETTING_VALUE_TYPE><256><1:256><80>
<SETTING_VALUE_TYPE><512><1:512><90>
<SETTING_VALUE_TYPE><1024><1:1024><a0>
<SETTING_VALUE_TYPE><2048><1:2048><b0>
<SETTING_VALUE_TYPE><4096><1:4096><c0>
<SETTING_VALUE_TYPE><8192><1:8192><d0>
<SETTING_VALUE_TYPE><16384><1:16384><e0>
<SETTING_VALUE_TYPE><32768><1:32768><f0>
<CONFIGREG_INFO_TYPE><17ffb><0><ff><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WINDIS><Windowed Watchdog Timer Disable><4><2>
<SETTING_VALUE_TYPE><WDTWIN><Windowed WDT enabled><0>
<SETTING_VALUE_TYPE><WDTSTD><Standard WDT selected; windowed WDT disabled><4>
<SWITCH_INFO_TYPE><WPSA><WDT Prescaler><8><2>
<SETTING_VALUE_TYPE><32><WDT prescaler ratio of 1:32><0>
<SETTING_VALUE_TYPE><128><WDT prescaler ratio of 1:128><8>
<CONFIGREG_INFO_TYPE><17ffc><0><1d><4>
<SWITCH_INFO_TYPE><RETEN><Retention Voltage Regulator Control Enable><1><2>
<SETTING_VALUE_TYPE><ON><Retention controlled by SRETEN during Sleep><0>
<SETTING_VALUE_TYPE><OFF><Retention not available><1>
<SWITCH_INFO_TYPE><VBTBOR><VBAT BOR Enable><4><2>
<SETTING_VALUE_TYPE><OFF><VBAT BOR is disabled><0>
<SETTING_VALUE_TYPE><ON><VBAT BOR is enabled><4>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR Enable><8><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled in Deep Sleep (does not affect operation in non-Deep Sleep modes)><0>
<SETTING_VALUE_TYPE><ON><BOR enabled in Deep Sleep><8>
<SWITCH_INFO_TYPE><DSBITEN><DSEN Bit Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Deep Sleep operation is always disabled><0>
<SETTING_VALUE_TYPE><ON><Deep Sleep is controlled by the register bit DSEN><10>
<CONFIGREG_INFO_TYPE><17ffd><0><f0><0>
<CONFIGREG_INFO_TYPE><17ffe><0><f8><1>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Timer Postscale Select><f8><20>
<SETTING_VALUE_TYPE><DSWDTPS0><1:32 (1 mS)><0>
<SETTING_VALUE_TYPE><DSWDTPS1><1:64 (2.1 mS)><8>
<SETTING_VALUE_TYPE><DSWDTPS2><1:128 (4.1 mS)><10>
<SETTING_VALUE_TYPE><DSWDTPS3><1: 256 (8.3 mS)><18>
<SETTING_VALUE_TYPE><DSWDTPS4><1:512 (16.5 mS)><20>
<SETTING_VALUE_TYPE><DSWDTPS5><1:1024 (33 mS)><28>
<SETTING_VALUE_TYPE><DSWDTPS6><1:2048 (66.1 mS)><30>
<SETTING_VALUE_TYPE><DSWDTPS7><1:4096 (132.1 mS)><38>
<SETTING_VALUE_TYPE><DSWDTPS8><1:8192 (264.3 mS)><40>
<SETTING_VALUE_TYPE><DSWDTPS9><1:16384 (528.5 mS)><48>
<SETTING_VALUE_TYPE><DSWDTPSA><1:32768 (1.057 Secs)><50>
<SETTING_VALUE_TYPE><DSWDTPSB><1:65536 (2.114 Secs)><58>
<SETTING_VALUE_TYPE><DSWDTPSC><1:131072 (4.228 Secs)><60>
<SETTING_VALUE_TYPE><DSWDTPSD><1:262114 (8.456 Secs)><68>
<SETTING_VALUE_TYPE><DSWDTPSE><1:524288 (16.912 Secs)><70>
<SETTING_VALUE_TYPE><DSWDTPSF><1:1048576 (33.825 Secs)><78>
<SETTING_VALUE_TYPE><DSWDTPS10><1:2097152 (67.7 Secs)><80>
<SETTING_VALUE_TYPE><DSWDTPS11><1:4194304 (135.3 Secs)><88>
<SETTING_VALUE_TYPE><DSWDTPS12><1:8388608 (4.5 Minutes)><90>
<SETTING_VALUE_TYPE><DSWDTPS13><1:16777216 (9 Minutes)><98>
<SETTING_VALUE_TYPE><DSWDTPS14><1:33554432 (18 Minutes)><a0>
<SETTING_VALUE_TYPE><DSWDTPS15><1:67108864 (36.1 Minutes)><a8>
<SETTING_VALUE_TYPE><DSWDTPS16><1:134217728 (72.2 Minutes)><b0>
<SETTING_VALUE_TYPE><DSWDTPS17><1:268435456 (2.4 Hours)><b8>
<SETTING_VALUE_TYPE><DSWDTPS18><1:536870912 (4.8 Hours)><c0>
<SETTING_VALUE_TYPE><DSWDTPS19><1:1073741824 (9.6 Hours)><c8>
<SETTING_VALUE_TYPE><DSWDTPS1A><1:2147483648 (19.2 Hours)><d0>
<SETTING_VALUE_TYPE><DSWDTPS1B><1:4294967296 (38.5 Hours)><d8>
<SETTING_VALUE_TYPE><DSWDTPS1C><1:8589934592 (77 Hours)><e0>
<SETTING_VALUE_TYPE><DSWDTPS1D><1:17179869184 (6.4 Days)><e8>
<SETTING_VALUE_TYPE><DSWDTPS1E><1:34359738368 (12.8  Days)><f0>
<SETTING_VALUE_TYPE><DSWDTPS1F><1:68719476736 (25.7 Days)><f8>
<CONFIGREG_INFO_TYPE><17fff><0><f3><2>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer Enable><1><2>
<SETTING_VALUE_TYPE><OFF><DSWDT Disabled><0>
<SETTING_VALUE_TYPE><ON><DSWDT Enabled><1>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Reference Clock Select><2><2>
<SETTING_VALUE_TYPE><SOSC><DSWDT uses SOSC as reference clock><0>
<SETTING_VALUE_TYPE><LPRC><DSWDT uses LPRC as reference clock><2>
<PART_INFO_TYPE><b622><PIC18F66K22><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><d>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SRETEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300004><0><1><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><1><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><SOSCREF><RTCC uses SOSC><1>
<CONFIGREG_INFO_TYPE><300005><0><89><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><RE7-Microcontroller Mode/RB3-All other modes><0>
<SETTING_VALUE_TYPE><PORTC><RC1><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RG5 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RG5 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBRT0><Table Read Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBRT1><Table Read Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBRT2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBRT3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBRTB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><6640><PIC18F66K40><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RG5 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RG5 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><c680><PIC18F66K80><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Ultra low-power regulator is Enabled (Controlled by SRETEN bit)><0>
<SETTING_VALUE_TYPE><OFF><Ultra low-power regulator is Disabled (Controlled by REGSLP bit)><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300005><0><8f><5>
<SWITCH_INFO_TYPE><CANMX><ECAN Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTE><ECAN TX and RX pins are located on RE5 and RE4, respectively><0>
<SETTING_VALUE_TYPE><PORTB><ECAN TX and RX pins are located on RB2 and RB3, respectively><1>
<SWITCH_INFO_TYPE><T0CKMX><Timer0 Clock Input Mux bit><2><2>
<SETTING_VALUE_TYPE><PORTG><Timer0 gets its clock input from the RG4/T0CKI pin on 64-pin packages><0>
<SETTING_VALUE_TYPE><PORTB><Timer0 gets its clock input from the RB5/T0CKI pin on 64-pin packages><2>
<SWITCH_INFO_TYPE><T3CKMX><Timer3 Clock Input Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTB><Timer3 gets its clock input from the RB5/T3CKI pin on 64-pin packages><0>
<SETTING_VALUE_TYPE><PORTG><Timer3 gets its clock input from the RG2/T3CKI pin on 64-pin packages><4>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RE3 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RE3 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><b691><PIC18F66K90><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><d>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SRETEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300004><0><1><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><1><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><SOSCREF><RTCC uses SOSC><1>
<CONFIGREG_INFO_TYPE><300005><0><89><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><RE7-Microcontroller Mode/RB3-All other modes><0>
<SETTING_VALUE_TYPE><PORTC><RC1><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RG5 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RG5 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBRT0><Table Read Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBRT1><Table Read Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBRT2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBRT3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBRTB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><a672><PIC18F6720><18xxxx><2><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator w/ OSC2 configured as divide-by-4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300004><0><83><0>
<CONFIGREG_INFO_TYPE><300005><0><3><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><8>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<SWITCH_INFO_TYPE><CP6><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not code-protected><40>
<SWITCH_INFO_TYPE><CP7><Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not code-protected><80>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><6721><PIC18F6722><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTE><ECCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><8>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<SWITCH_INFO_TYPE><CP6><Code Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (01BFFF-018000h) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (01BFFF-018000h) not code-protected><40>
<SWITCH_INFO_TYPE><CP7><Code Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not code-protected><80>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (01BFFF-018000h) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (01BFFF-018000h) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><6723><PIC18F6723><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTE><ECCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><8>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<SWITCH_INFO_TYPE><CP6><Code Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (01BFFF-018000h) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (01BFFF-018000h) not code-protected><40>
<SWITCH_INFO_TYPE><CP7><Code Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not code-protected><80>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (01BFFF-018000h) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (01BFFF-018000h) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><b710><PIC18F67J10><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><1fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><f8><0>
<CONFIGREG_INFO_TYPE><1fffd><0><f3><1>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<PART_INFO_TYPE><b711><PIC18F67J11><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><1fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fffa><0><c7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><Internal oscillator, port function on RA6 and RA7 ><0>
<SETTING_VALUE_TYPE><INTOSCO><Internal oscillator, CLKOUT on RA6 and port function on RA7><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, port function on RA6 and RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKOUT on RA6 and port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator, CLKO  on RA6><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator, PLL enabled, CLKO on RA6><7>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><f8><0>
<CONFIGREG_INFO_TYPE><1fffd><0><ff><2>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP Address Masking Mode Select bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5-Bit Address Masking mode enable><0>
<SETTING_VALUE_TYPE><MSK7><7-Bit Address Masking mode enable><8>
<PART_INFO_TYPE><b750><PIC18F67J50><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1fff8><0><ef><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><1fff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fffa><0><c7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC, Port function on RA6 and RA7><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSC, CLKO on RA6 and Port function on RA7><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, Port function on RA6 and RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKO on RA6 and Port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator, HS used by USB><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled, HSPLL used by USB><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with CLKO on RA6, EC used by USB><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL, CLKO on RA6, ECPLL used by USB><7>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><f8><0>
<CONFIGREG_INFO_TYPE><1fffd><0><f9><2>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP Address Masking Mode Select bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5-Bit Address Masking mode enable><0>
<SETTING_VALUE_TYPE><MSK7><7-Bit Address Masking mode enable><8>
<PART_INFO_TYPE><b760><PIC18F67J60><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVR><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><1fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLKO function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><f8><0>
<CONFIGREG_INFO_TYPE><1fffd><0><f7><1>
<SWITCH_INFO_TYPE><ETHLED><Ethernet LED Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><RA0/RA1 function as I/O regardless of Ethernet module status><0>
<SETTING_VALUE_TYPE><ON><RA0/RA1 are multiplexed with LEDA/LEDB when Ethernet module is enabled and function as I/O when Ethernet is disabled><4>
<PART_INFO_TYPE><6790><PIC18F67J90><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled-Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><1fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<CONFIGREG_INFO_TYPE><1fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><Internal oscillator, port function on RA6 and RA7 ><0>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, port function on RA6 and RA7><1>
<SETTING_VALUE_TYPE><INTOSCO><Internal oscillator, CLKOUT on RA6 and port function on RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKOUT on RA6 and port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with clock out on RA6><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL><7>
<SWITCH_INFO_TYPE><T1DIG><Secondary Clock Source T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator configured for low-power operation><0>
<SETTING_VALUE_TYPE><OFF><Timer1 oscillator configured for higher power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><2><1>
<SWITCH_INFO_TYPE><RTCSOSC><RTCC Reference Clock Select bit><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTOSC/INTRC as reference clock><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI as reference clock><2>
<CONFIGREG_INFO_TYPE><1fffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><RC1><1>
<PART_INFO_TYPE><6793><PIC18F67J93><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1fff8><0><e1><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled-Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><1fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<CONFIGREG_INFO_TYPE><1fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><Internal oscillator, port function on RA6 and RA7 ><0>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, port function on RA6 and RA7><1>
<SETTING_VALUE_TYPE><INTOSCO><Internal oscillator, CLKOUT on RA6 and port function on RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKOUT on RA6 and port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with clock out on RA6><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL><7>
<SWITCH_INFO_TYPE><T1DIG><Secondary Clock Source T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator configured for low-power operation><0>
<SETTING_VALUE_TYPE><OFF><Timer1 oscillator configured for higher power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><2><1>
<SWITCH_INFO_TYPE><RTCSOSC><RTCC Reference Clock Select bit><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTOSC/INTRC as reference clock><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI as reference clock><2>
<CONFIGREG_INFO_TYPE><1fffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><RC1><1>
<PART_INFO_TYPE><6794><PIC18F67J94><18xxxx><6><1><1ffef><10><ff><0><0-5f><f60-fff><0><10>
<CONFIGREG_INFO_TYPE><1fff0><0><e0><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><1fff1><0><f7><3>
<SWITCH_INFO_TYPE><BOREN><Brown-Out Reset Enable><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit, disabled in Deep Sleep><1>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><2><2>
<SETTING_VALUE_TYPE><0><2.0V><0>
<SETTING_VALUE_TYPE><1><1.8V><2>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fff2><0><af><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><FRC><Fast RC Oscillator (FRC)><0>
<SETTING_VALUE_TYPE><FRCPLL><Fast RC Oscillator with PLL module (FRCPLL)><1>
<SETTING_VALUE_TYPE><PRI><Primary Oscillator (XT, HS, EC)><2>
<SETTING_VALUE_TYPE><PRIPLL><Primary Oscillator with PLL module (XTPLL,HSPLL,ECPLL)><3>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator (SOSC)><4>
<SETTING_VALUE_TYPE><LPRC><Low-Power RC Oscillator (LPRC)><5>
<SETTING_VALUE_TYPE><FRC500KHZ><Fast RC Oscillator divided by 16 (500 kHz)><6>
<SETTING_VALUE_TYPE><FRCDIV><Fast RC Oscillator with Postscaler (FRCDIV)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><8><2>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SWITCH_INFO_TYPE><CLKOEN><Clock Out Enable Bit><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><1fff3><0><ff><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Frequency Multiplier Select bits><f><10>
<SETTING_VALUE_TYPE><NODIV><96 MHz PLL selected; No divide - Oscillator used directly (4 MHz input)><0>
<SETTING_VALUE_TYPE><DIV2><96 MHz PLL selected; Oscillator divided by 2 (8 MHz input)><1>
<SETTING_VALUE_TYPE><DIV3><96 MHz PLL selected; Oscillator divided by 3 (12 MHz input)><2>
<SETTING_VALUE_TYPE><DIV4><96 MHz PLL selected; Oscillator divided by 4 (16 MHz input)><3>
<SETTING_VALUE_TYPE><DIV5><96 MHz PLL selected; Oscillator divided by 5 (20 MHz input)><4>
<SETTING_VALUE_TYPE><DIV6><96 MHz PLL selected; Oscillator divided by 6 (24 MHz input)><5>
<SETTING_VALUE_TYPE><DIV10><96 MHz PLL selected; Oscillator divided by 10 (40 MHz input)><6>
<SETTING_VALUE_TYPE><DIV12><96 MHz PLL selected; Oscillator divided by 12 (48 MHz input)><7>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><8>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><9>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><a>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><b>
<SETTING_VALUE_TYPE><PLL4X><4x PLL selected><c>
<SETTING_VALUE_TYPE><PLL6X><6x PLL selected><d>
<SETTING_VALUE_TYPE><PLL8X><8x PLL selected><e>
<SETTING_VALUE_TYPE><NOPLL><No PLL used - PLLGO bit not available to user><f>
<CONFIGREG_INFO_TYPE><1fff4><0><33><2>
<SWITCH_INFO_TYPE><POSCMD><Primary Oscillator Select><3><4>
<SETTING_VALUE_TYPE><EC><External clock mode selected><0>
<SETTING_VALUE_TYPE><MS><MS oscillator mode selected(3.5 MHz -10 MHz)><1>
<SETTING_VALUE_TYPE><HS><HS oscillator mode selected(10 MHz - 40 MHz)><2>
<SETTING_VALUE_TYPE><NONE><Primary oscillator disabled><3>
<SWITCH_INFO_TYPE><FSCM><Clock Switching and Monitor Selection Configuration bits><30><3>
<SETTING_VALUE_TYPE><CSECME><Clock switching is enabled, fail safe clock monitor is enabled><0>
<SETTING_VALUE_TYPE><CSECMD><Clock switching is enabled, fail safe clock monitor is disabled><10>
<SETTING_VALUE_TYPE><CSDCMD><Clock switching is disabled, fail safe clock monitor is disabled><20>
<CONFIGREG_INFO_TYPE><1fff5><0><f0><0>
<CONFIGREG_INFO_TYPE><1fff6><0><ff><1>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Boundary><ff><100>
<SETTING_VALUE_TYPE><WPFP0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><WPFP1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><WPFP2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><WPFP3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><WPFP4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><WPFP5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><WPFP6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><WPFP7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><WPFP8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><WPFP9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><WPFP10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><WPFP11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><WPFP12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><WPFP13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><WPFP14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><WPFP15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><WPFP16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><WPFP17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><WPFP18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><WPFP19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><WPFP20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><WPFP21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><WPFP22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><WPFP23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><WPFP24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><WPFP25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><WPFP26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><WPFP27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><WPFP28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><WPFP29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><WPFP30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><WPFP31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><WPFP32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><WPFP33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><WPFP34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><WPFP35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><WPFP36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><WPFP37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><WPFP38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><WPFP39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><WPFP40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><WPFP41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><WPFP42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><WPFP43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><WPFP44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><WPFP45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><WPFP46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><WPFP47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><WPFP48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><WPFP49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><WPFP50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><WPFP51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><WPFP52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><WPFP53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><WPFP54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><WPFP55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><WPFP56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><WPFP57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><WPFP58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><WPFP59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><WPFP60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><WPFP61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><WPFP62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><WPFP63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><WPFP64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><WPFP65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><WPFP66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><WPFP67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><WPFP68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><WPFP69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><WPFP70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><WPFP71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><WPFP72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><WPFP73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><WPFP74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><WPFP75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><WPFP76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><WPFP77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><WPFP78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><WPFP79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><WPFP80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><WPFP81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><WPFP82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><WPFP83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><WPFP84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><WPFP85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><WPFP86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><WPFP87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><WPFP88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><WPFP89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><WPFP90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><WPFP91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><WPFP92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><WPFP93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><WPFP94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><WPFP95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><WPFP96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><WPFP97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><WPFP98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><WPFP99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><WPFP100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><WPFP101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><WPFP102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><WPFP103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><WPFP104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><WPFP105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><WPFP106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><WPFP107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><WPFP108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><WPFP109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><WPFP110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><WPFP111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><WPFP112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><WPFP113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><WPFP114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><WPFP115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><WPFP116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><WPFP117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><WPFP118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><WPFP119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><WPFP120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><WPFP121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><WPFP122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><WPFP123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><WPFP124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><WPFP125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><WPFP126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><WPFP127><Write Protect Program Flash Page 127><7f>
<SETTING_VALUE_TYPE><WPFP128><Write Protect Program Flash Page 128><80>
<SETTING_VALUE_TYPE><WPFP129><Write Protect Program Flash Page 129><81>
<SETTING_VALUE_TYPE><WPFP130><Write Protect Program Flash Page 130><82>
<SETTING_VALUE_TYPE><WPFP131><Write Protect Program Flash Page 131><83>
<SETTING_VALUE_TYPE><WPFP132><Write Protect Program Flash Page 132><84>
<SETTING_VALUE_TYPE><WPFP133><Write Protect Program Flash Page 133><85>
<SETTING_VALUE_TYPE><WPFP134><Write Protect Program Flash Page 134><86>
<SETTING_VALUE_TYPE><WPFP135><Write Protect Program Flash Page 135><87>
<SETTING_VALUE_TYPE><WPFP136><Write Protect Program Flash Page 136><88>
<SETTING_VALUE_TYPE><WPFP137><Write Protect Program Flash Page 137><89>
<SETTING_VALUE_TYPE><WPFP138><Write Protect Program Flash Page 138><8a>
<SETTING_VALUE_TYPE><WPFP139><Write Protect Program Flash Page 139><8b>
<SETTING_VALUE_TYPE><WPFP140><Write Protect Program Flash Page 140><8c>
<SETTING_VALUE_TYPE><WPFP141><Write Protect Program Flash Page 141><8d>
<SETTING_VALUE_TYPE><WPFP142><Write Protect Program Flash Page 142><8e>
<SETTING_VALUE_TYPE><WPFP143><Write Protect Program Flash Page 143><8f>
<SETTING_VALUE_TYPE><WPFP144><Write Protect Program Flash Page 144><90>
<SETTING_VALUE_TYPE><WPFP145><Write Protect Program Flash Page 145><91>
<SETTING_VALUE_TYPE><WPFP146><Write Protect Program Flash Page 146><92>
<SETTING_VALUE_TYPE><WPFP147><Write Protect Program Flash Page 147><93>
<SETTING_VALUE_TYPE><WPFP148><Write Protect Program Flash Page 148><94>
<SETTING_VALUE_TYPE><WPFP149><Write Protect Program Flash Page 149><95>
<SETTING_VALUE_TYPE><WPFP150><Write Protect Program Flash Page 150><96>
<SETTING_VALUE_TYPE><WPFP151><Write Protect Program Flash Page 151><97>
<SETTING_VALUE_TYPE><WPFP152><Write Protect Program Flash Page 152><98>
<SETTING_VALUE_TYPE><WPFP153><Write Protect Program Flash Page 153><99>
<SETTING_VALUE_TYPE><WPFP154><Write Protect Program Flash Page 154><9a>
<SETTING_VALUE_TYPE><WPFP155><Write Protect Program Flash Page 155><9b>
<SETTING_VALUE_TYPE><WPFP156><Write Protect Program Flash Page 156><9c>
<SETTING_VALUE_TYPE><WPFP157><Write Protect Program Flash Page 157><9d>
<SETTING_VALUE_TYPE><WPFP158><Write Protect Program Flash Page 158><9e>
<SETTING_VALUE_TYPE><WPFP159><Write Protect Program Flash Page 159><9f>
<SETTING_VALUE_TYPE><WPFP160><Write Protect Program Flash Page 160><a0>
<SETTING_VALUE_TYPE><WPFP161><Write Protect Program Flash Page 161><a1>
<SETTING_VALUE_TYPE><WPFP162><Write Protect Program Flash Page 162><a2>
<SETTING_VALUE_TYPE><WPFP163><Write Protect Program Flash Page 163><a3>
<SETTING_VALUE_TYPE><WPFP164><Write Protect Program Flash Page 164><a4>
<SETTING_VALUE_TYPE><WPFP165><Write Protect Program Flash Page 165><a5>
<SETTING_VALUE_TYPE><WPFP166><Write Protect Program Flash Page 166><a6>
<SETTING_VALUE_TYPE><WPFP167><Write Protect Program Flash Page 167><a7>
<SETTING_VALUE_TYPE><WPFP168><Write Protect Program Flash Page 168><a8>
<SETTING_VALUE_TYPE><WPFP169><Write Protect Program Flash Page 169><a9>
<SETTING_VALUE_TYPE><WPFP170><Write Protect Program Flash Page 170><aa>
<SETTING_VALUE_TYPE><WPFP171><Write Protect Program Flash Page 171><ab>
<SETTING_VALUE_TYPE><WPFP172><Write Protect Program Flash Page 172><ac>
<SETTING_VALUE_TYPE><WPFP173><Write Protect Program Flash Page 173><ad>
<SETTING_VALUE_TYPE><WPFP174><Write Protect Program Flash Page 174><ae>
<SETTING_VALUE_TYPE><WPFP175><Write Protect Program Flash Page 175><af>
<SETTING_VALUE_TYPE><WPFP176><Write Protect Program Flash Page 176><b0>
<SETTING_VALUE_TYPE><WPFP177><Write Protect Program Flash Page 177><b1>
<SETTING_VALUE_TYPE><WPFP178><Write Protect Program Flash Page 178><b2>
<SETTING_VALUE_TYPE><WPFP179><Write Protect Program Flash Page 179><b3>
<SETTING_VALUE_TYPE><WPFP180><Write Protect Program Flash Page 180><b4>
<SETTING_VALUE_TYPE><WPFP181><Write Protect Program Flash Page 181><b5>
<SETTING_VALUE_TYPE><WPFP182><Write Protect Program Flash Page 182><b6>
<SETTING_VALUE_TYPE><WPFP183><Write Protect Program Flash Page 183><b7>
<SETTING_VALUE_TYPE><WPFP184><Write Protect Program Flash Page 184><b8>
<SETTING_VALUE_TYPE><WPFP185><Write Protect Program Flash Page 185><b9>
<SETTING_VALUE_TYPE><WPFP186><Write Protect Program Flash Page 186><ba>
<SETTING_VALUE_TYPE><WPFP187><Write Protect Program Flash Page 187><bb>
<SETTING_VALUE_TYPE><WPFP188><Write Protect Program Flash Page 188><bc>
<SETTING_VALUE_TYPE><WPFP189><Write Protect Program Flash Page 189><bd>
<SETTING_VALUE_TYPE><WPFP190><Write Protect Program Flash Page 190><be>
<SETTING_VALUE_TYPE><WPFP191><Write Protect Program Flash Page 191><bf>
<SETTING_VALUE_TYPE><WPFP192><Write Protect Program Flash Page 192><c0>
<SETTING_VALUE_TYPE><WPFP193><Write Protect Program Flash Page 193><c1>
<SETTING_VALUE_TYPE><WPFP194><Write Protect Program Flash Page 194><c2>
<SETTING_VALUE_TYPE><WPFP195><Write Protect Program Flash Page 195><c3>
<SETTING_VALUE_TYPE><WPFP196><Write Protect Program Flash Page 196><c4>
<SETTING_VALUE_TYPE><WPFP197><Write Protect Program Flash Page 197><c5>
<SETTING_VALUE_TYPE><WPFP198><Write Protect Program Flash Page 198><c6>
<SETTING_VALUE_TYPE><WPFP199><Write Protect Program Flash Page 199><c7>
<SETTING_VALUE_TYPE><WPFP200><Write Protect Program Flash Page 200><c8>
<SETTING_VALUE_TYPE><WPFP201><Write Protect Program Flash Page 201><c9>
<SETTING_VALUE_TYPE><WPFP202><Write Protect Program Flash Page 202><ca>
<SETTING_VALUE_TYPE><WPFP203><Write Protect Program Flash Page 203><cb>
<SETTING_VALUE_TYPE><WPFP204><Write Protect Program Flash Page 204><cc>
<SETTING_VALUE_TYPE><WPFP205><Write Protect Program Flash Page 205><cd>
<SETTING_VALUE_TYPE><WPFP206><Write Protect Program Flash Page 206><ce>
<SETTING_VALUE_TYPE><WPFP207><Write Protect Program Flash Page 207><cf>
<SETTING_VALUE_TYPE><WPFP208><Write Protect Program Flash Page 208><d0>
<SETTING_VALUE_TYPE><WPFP209><Write Protect Program Flash Page 209><d1>
<SETTING_VALUE_TYPE><WPFP210><Write Protect Program Flash Page 210><d2>
<SETTING_VALUE_TYPE><WPFP211><Write Protect Program Flash Page 211><d3>
<SETTING_VALUE_TYPE><WPFP212><Write Protect Program Flash Page 212><d4>
<SETTING_VALUE_TYPE><WPFP213><Write Protect Program Flash Page 213><d5>
<SETTING_VALUE_TYPE><WPFP214><Write Protect Program Flash Page 214><d6>
<SETTING_VALUE_TYPE><WPFP215><Write Protect Program Flash Page 215><d7>
<SETTING_VALUE_TYPE><WPFP216><Write Protect Program Flash Page 216><d8>
<SETTING_VALUE_TYPE><WPFP217><Write Protect Program Flash Page 217><d9>
<SETTING_VALUE_TYPE><WPFP218><Write Protect Program Flash Page 218><da>
<SETTING_VALUE_TYPE><WPFP219><Write Protect Program Flash Page 219><db>
<SETTING_VALUE_TYPE><WPFP220><Write Protect Program Flash Page 220><dc>
<SETTING_VALUE_TYPE><WPFP221><Write Protect Program Flash Page 221><dd>
<SETTING_VALUE_TYPE><WPFP222><Write Protect Program Flash Page 222><de>
<SETTING_VALUE_TYPE><WPFP223><Write Protect Program Flash Page 223><df>
<SETTING_VALUE_TYPE><WPFP224><Write Protect Program Flash Page 224><e0>
<SETTING_VALUE_TYPE><WPFP225><Write Protect Program Flash Page 225><e1>
<SETTING_VALUE_TYPE><WPFP226><Write Protect Program Flash Page 226><e2>
<SETTING_VALUE_TYPE><WPFP227><Write Protect Program Flash Page 227><e3>
<SETTING_VALUE_TYPE><WPFP228><Write Protect Program Flash Page 228><e4>
<SETTING_VALUE_TYPE><WPFP229><Write Protect Program Flash Page 229><e5>
<SETTING_VALUE_TYPE><WPFP230><Write Protect Program Flash Page 230><e6>
<SETTING_VALUE_TYPE><WPFP231><Write Protect Program Flash Page 231><e7>
<SETTING_VALUE_TYPE><WPFP232><Write Protect Program Flash Page 232><e8>
<SETTING_VALUE_TYPE><WPFP233><Write Protect Program Flash Page 233><e9>
<SETTING_VALUE_TYPE><WPFP234><Write Protect Program Flash Page 234><ea>
<SETTING_VALUE_TYPE><WPFP235><Write Protect Program Flash Page 235><eb>
<SETTING_VALUE_TYPE><WPFP236><Write Protect Program Flash Page 236><ec>
<SETTING_VALUE_TYPE><WPFP237><Write Protect Program Flash Page 237><ed>
<SETTING_VALUE_TYPE><WPFP238><Write Protect Program Flash Page 238><ee>
<SETTING_VALUE_TYPE><WPFP239><Write Protect Program Flash Page 239><ef>
<SETTING_VALUE_TYPE><WPFP240><Write Protect Program Flash Page 240><f0>
<SETTING_VALUE_TYPE><WPFP241><Write Protect Program Flash Page 241><f1>
<SETTING_VALUE_TYPE><WPFP242><Write Protect Program Flash Page 242><f2>
<SETTING_VALUE_TYPE><WPFP243><Write Protect Program Flash Page 243><f3>
<SETTING_VALUE_TYPE><WPFP244><Write Protect Program Flash Page 244><f4>
<SETTING_VALUE_TYPE><WPFP245><Write Protect Program Flash Page 245><f5>
<SETTING_VALUE_TYPE><WPFP246><Write Protect Program Flash Page 246><f6>
<SETTING_VALUE_TYPE><WPFP247><Write Protect Program Flash Page 247><f7>
<SETTING_VALUE_TYPE><WPFP248><Write Protect Program Flash Page 248><f8>
<SETTING_VALUE_TYPE><WPFP249><Write Protect Program Flash Page 249><f9>
<SETTING_VALUE_TYPE><WPFP250><Write Protect Program Flash Page 250><fa>
<SETTING_VALUE_TYPE><WPFP251><Write Protect Program Flash Page 251><fb>
<SETTING_VALUE_TYPE><WPFP252><Write Protect Program Flash Page 252><fc>
<SETTING_VALUE_TYPE><WPFP253><Write Protect Program Flash Page 253><fd>
<SETTING_VALUE_TYPE><WPFP254><Write Protect Program Flash Page 254><fe>
<SETTING_VALUE_TYPE><WPFP255><Write Protect Program Flash Page 255><ff>
<CONFIGREG_INFO_TYPE><1fff7><0><f7><3>
<SWITCH_INFO_TYPE><WPDIS><Segment Write Protection Disable><1><2>
<SETTING_VALUE_TYPE><WPEN><Enabled><0>
<SETTING_VALUE_TYPE><WPDIS><Disabled><1>
<SWITCH_INFO_TYPE><WPEND><Segment Write Protection End Page Select><2><2>
<SETTING_VALUE_TYPE><WPSTARTMEM><write Protect from page 0 to WPFP><0>
<SETTING_VALUE_TYPE><WPENDMEM><Write Protect from WPFP to the last page of memory><2>
<SWITCH_INFO_TYPE><WPCFG><Write Protect Configuration Page Select><4><2>
<SETTING_VALUE_TYPE><WPCFGEN><Enabled><0>
<SETTING_VALUE_TYPE><WPCFGDIS><Disabled><4>
<CONFIGREG_INFO_TYPE><1fff8><0><3><2>
<SWITCH_INFO_TYPE><T5GSEL><TMR5 Gate Select bit><1><2>
<SETTING_VALUE_TYPE><T3G><TMR5 Gate is driven by the T3G input><0>
<SETTING_VALUE_TYPE><T5G><TMR5 Gate is driven by the T5G input><1>
<SWITCH_INFO_TYPE><CINASEL><CxINA Gate Select bit><2><2>
<SETTING_VALUE_TYPE><RA5><C1INA and C3INA are all re-mapped to pin RA5><0>
<SETTING_VALUE_TYPE><DEFAULT><C1INA and C3INA are on their default pin locations><2>
<CONFIGREG_INFO_TYPE><1fff9><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><the IOLOCK bit can be set and cleared using the unlock sequence><0>
<SETTING_VALUE_TYPE><ON><Once set, the IOLOCK bit cannot be cleared><1>
<SWITCH_INFO_TYPE><LS48MHZ><USB Low Speed Clock Select bit><2><2>
<SETTING_VALUE_TYPE><SYSX1><Divide-by-1 (System clock must be 6 MHz)><0>
<SETTING_VALUE_TYPE><SYSX2><Divide-by-2 (System clock must be 12 MHz)><2>
<SWITCH_INFO_TYPE><MSSPMSK2><MSSP2 7-Bit Address Masking Mode Enable bit><4><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><4>
<SWITCH_INFO_TYPE><MSSPMSK1><MSSP1 7-Bit Address Masking Mode Enable bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><1fffa><0><ff><3>
<SWITCH_INFO_TYPE><WDTWIN><Watch Dog Timer Window><3><4>
<SETTING_VALUE_TYPE><PS75_0><Watch Dog Timer Window Width is 75 percent><0>
<SETTING_VALUE_TYPE><PS50_0><Watch Dog Timer Window Width is 50 percent><1>
<SETTING_VALUE_TYPE><PS37_5><Watch Dog Timer Window Width is 37.5 percent><2>
<SETTING_VALUE_TYPE><PS25_0><Watch Dog Timer Window Width is 25 percent><3>
<SWITCH_INFO_TYPE><WDTCLK><Watch Dog Timer Clock Source><c><4>
<SETTING_VALUE_TYPE><SYS><Use FOSC/4 when system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><0>
<SETTING_VALUE_TYPE><SOSC><Always use SOSC><4>
<SETTING_VALUE_TYPE><LPRC><Always use INTOSC/LPRC><8>
<SETTING_VALUE_TYPE><FRC><Use FRC when WINDIS = 0, system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><c>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale><f0><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><10>
<SETTING_VALUE_TYPE><4><1:4><20>
<SETTING_VALUE_TYPE><8><1:8><30>
<SETTING_VALUE_TYPE><16><1:16><40>
<SETTING_VALUE_TYPE><32><1:32><50>
<SETTING_VALUE_TYPE><64><1:64><60>
<SETTING_VALUE_TYPE><128><1:128><70>
<SETTING_VALUE_TYPE><256><1:256><80>
<SETTING_VALUE_TYPE><512><1:512><90>
<SETTING_VALUE_TYPE><1024><1:1024><a0>
<SETTING_VALUE_TYPE><2048><1:2048><b0>
<SETTING_VALUE_TYPE><4096><1:4096><c0>
<SETTING_VALUE_TYPE><8192><1:8192><d0>
<SETTING_VALUE_TYPE><16384><1:16384><e0>
<SETTING_VALUE_TYPE><32768><1:32768><f0>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WINDIS><Windowed Watchdog Timer Disable><4><2>
<SETTING_VALUE_TYPE><WDTWIN><Windowed WDT enabled><0>
<SETTING_VALUE_TYPE><WDTSTD><Standard WDT selected; windowed WDT disabled><4>
<SWITCH_INFO_TYPE><WPSA><WDT Prescaler><8><2>
<SETTING_VALUE_TYPE><32><WDT prescaler ratio of 1:32><0>
<SETTING_VALUE_TYPE><128><WDT prescaler ratio of 1:128><8>
<CONFIGREG_INFO_TYPE><1fffc><0><1d><4>
<SWITCH_INFO_TYPE><RETEN><Retention Voltage Regulator Control Enable><1><2>
<SETTING_VALUE_TYPE><ON><Retention controlled by SRETEN during Sleep><0>
<SETTING_VALUE_TYPE><OFF><Retention not available><1>
<SWITCH_INFO_TYPE><VBTBOR><VBAT BOR Enable><4><2>
<SETTING_VALUE_TYPE><OFF><VBAT BOR is disabled><0>
<SETTING_VALUE_TYPE><ON><VBAT BOR is enabled><4>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR Enable><8><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled in Deep Sleep (does not affect operation in non-Deep Sleep modes)><0>
<SETTING_VALUE_TYPE><ON><BOR enabled in Deep Sleep><8>
<SWITCH_INFO_TYPE><DSBITEN><DSEN Bit Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Deep Sleep operation is always disabled><0>
<SETTING_VALUE_TYPE><ON><Deep Sleep is controlled by the register bit DSEN><10>
<CONFIGREG_INFO_TYPE><1fffd><0><f0><0>
<CONFIGREG_INFO_TYPE><1fffe><0><f8><1>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Timer Postscale Select><f8><20>
<SETTING_VALUE_TYPE><DSWDTPS0><1:32 (1 mS)><0>
<SETTING_VALUE_TYPE><DSWDTPS1><1:64 (2.1 mS)><8>
<SETTING_VALUE_TYPE><DSWDTPS2><1:128 (4.1 mS)><10>
<SETTING_VALUE_TYPE><DSWDTPS3><1: 256 (8.3 mS)><18>
<SETTING_VALUE_TYPE><DSWDTPS4><1:512 (16.5 mS)><20>
<SETTING_VALUE_TYPE><DSWDTPS5><1:1024 (33 mS)><28>
<SETTING_VALUE_TYPE><DSWDTPS6><1:2048 (66.1 mS)><30>
<SETTING_VALUE_TYPE><DSWDTPS7><1:4096 (132.1 mS)><38>
<SETTING_VALUE_TYPE><DSWDTPS8><1:8192 (264.3 mS)><40>
<SETTING_VALUE_TYPE><DSWDTPS9><1:16384 (528.5 mS)><48>
<SETTING_VALUE_TYPE><DSWDTPSA><1:32768 (1.057 Secs)><50>
<SETTING_VALUE_TYPE><DSWDTPSB><1:65536 (2.114 Secs)><58>
<SETTING_VALUE_TYPE><DSWDTPSC><1:131072 (4.228 Secs)><60>
<SETTING_VALUE_TYPE><DSWDTPSD><1:262114 (8.456 Secs)><68>
<SETTING_VALUE_TYPE><DSWDTPSE><1:524288 (16.912 Secs)><70>
<SETTING_VALUE_TYPE><DSWDTPSF><1:1048576 (33.825 Secs)><78>
<SETTING_VALUE_TYPE><DSWDTPS10><1:2097152 (67.7 Secs)><80>
<SETTING_VALUE_TYPE><DSWDTPS11><1:4194304 (135.3 Secs)><88>
<SETTING_VALUE_TYPE><DSWDTPS12><1:8388608 (4.5 Minutes)><90>
<SETTING_VALUE_TYPE><DSWDTPS13><1:16777216 (9 Minutes)><98>
<SETTING_VALUE_TYPE><DSWDTPS14><1:33554432 (18 Minutes)><a0>
<SETTING_VALUE_TYPE><DSWDTPS15><1:67108864 (36.1 Minutes)><a8>
<SETTING_VALUE_TYPE><DSWDTPS16><1:134217728 (72.2 Minutes)><b0>
<SETTING_VALUE_TYPE><DSWDTPS17><1:268435456 (2.4 Hours)><b8>
<SETTING_VALUE_TYPE><DSWDTPS18><1:536870912 (4.8 Hours)><c0>
<SETTING_VALUE_TYPE><DSWDTPS19><1:1073741824 (9.6 Hours)><c8>
<SETTING_VALUE_TYPE><DSWDTPS1A><1:2147483648 (19.2 Hours)><d0>
<SETTING_VALUE_TYPE><DSWDTPS1B><1:4294967296 (38.5 Hours)><d8>
<SETTING_VALUE_TYPE><DSWDTPS1C><1:8589934592 (77 Hours)><e0>
<SETTING_VALUE_TYPE><DSWDTPS1D><1:17179869184 (6.4 Days)><e8>
<SETTING_VALUE_TYPE><DSWDTPS1E><1:34359738368 (12.8  Days)><f0>
<SETTING_VALUE_TYPE><DSWDTPS1F><1:68719476736 (25.7 Days)><f8>
<CONFIGREG_INFO_TYPE><1ffff><0><f3><2>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer Enable><1><2>
<SETTING_VALUE_TYPE><OFF><DSWDT Disabled><0>
<SETTING_VALUE_TYPE><ON><DSWDT Enabled><1>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Reference Clock Select><2><2>
<SETTING_VALUE_TYPE><SOSC><DSWDT uses SOSC as reference clock><0>
<SETTING_VALUE_TYPE><LPRC><DSWDT uses LPRC as reference clock><2>
<PART_INFO_TYPE><6722><PIC18F67K22><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><d>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SRETEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300004><0><1><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><1><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><SOSCREF><RTCC uses SOSC><1>
<CONFIGREG_INFO_TYPE><300005><0><89><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><RE7-Microcontroller Mode/RB3-All other modes><0>
<SETTING_VALUE_TYPE><PORTC><RC1><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RG5 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RG5 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><8>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<SWITCH_INFO_TYPE><CP4><Code Protect 10000-13FFF><10><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><10>
<SWITCH_INFO_TYPE><CP5><Code Protect 14000-17FFF><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><CP6><Code Protect 18000-1BFFF><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CP7><Code Protect 1C000-1FFFF><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<SWITCH_INFO_TYPE><WRT4><Table Write Protect 10000-13FFF><10><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><10>
<SWITCH_INFO_TYPE><WRT5><Table Write Protect 14000-17FFF><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRT6><Table Write Protect 18000-1BFFF><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRT7><Table Write Protect 1C000-1FFFF><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><8>
<SWITCH_INFO_TYPE><EBRT0><Table Read Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBRT1><Table Read Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBRT2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBRT3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<SWITCH_INFO_TYPE><EBRT4><Table Read Protect 10000-13FFF><10><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><10>
<SWITCH_INFO_TYPE><EBRT5><Table Read Protect 14000-17FFF><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><EBRT6><Table Read Protect 18000-1BFFF><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><EBRT7><Table Read Protect 1C000-1FFFF><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBRTB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><6740><PIC18F67K40><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RG5 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RG5 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection Block 3><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection Block 3><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection Block 3><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection Block 3><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><b790><PIC18F67K90><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><d>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SRETEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz -  16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300004><0><1><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><1><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><SOSCREF><RTCC uses SOSC><1>
<CONFIGREG_INFO_TYPE><300005><0><89><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><RE7-Microcontroller Mode/RB3-All other modes><0>
<SETTING_VALUE_TYPE><PORTC><RC1><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RG5 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RG5 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><8>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<SWITCH_INFO_TYPE><CP4><Code Protect 10000-13FFF><10><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><10>
<SWITCH_INFO_TYPE><CP5><Code Protect 14000-17FFF><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><CP6><Code Protect 18000-1BFFF><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CP7><Code Protect 1C000-1FFFF><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<SWITCH_INFO_TYPE><WRT4><Table Write Protect 10000-13FFF><10><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><10>
<SWITCH_INFO_TYPE><WRT5><Table Write Protect 14000-17FFF><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRT6><Table Write Protect 18000-1BFFF><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRT7><Table Write Protect 1C000-1FFFF><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><8>
<SWITCH_INFO_TYPE><EBRT0><Table Read Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBRT1><Table Read Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBRT2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBRT3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<SWITCH_INFO_TYPE><EBRT4><Table Read Protect 10000-13FFF><10><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><10>
<SWITCH_INFO_TYPE><EBRT5><Table Read Protect 14000-17FFF><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><EBRT6><Table Read Protect 18000-1BFFF><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><EBRT7><Table Read Protect 1C000-1FFFF><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBRTB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><8310><PIC18F8310><18xxxx><6><1><1fff><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><c3><3>
<SWITCH_INFO_TYPE><PM><Processor Mode><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><BW><Bus Width><40><2>
<SETTING_VALUE_TYPE><8><8-bit External Bus Data Width><0>
<SETTING_VALUE_TYPE><16><16-bit External Bus Data Width><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Wait programmed by WAIT1 and WAIT0 bits of MEMCOM register (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable, device will not wait><80>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block not code-protected><1>
<CONFIGREG_INFO_TYPE><30000c><0><1><1>
<SWITCH_INFO_TYPE><EBTR><Table Read Protect 00000-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Internal program memory block protected from table reads executed from external memory block><0>
<SETTING_VALUE_TYPE><OFF><Internal program memory block not protected from table reads executed from external memory block><1>
<PART_INFO_TYPE><8390><PIC18F8390><18xxxx><6><1><1fff><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block (000000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block (000000-003FFFh) not code-protected><1>
<PART_INFO_TYPE><8393><PIC18F8393><18xxxx><6><1><1fff><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block (000000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block (000000-003FFFh) not code-protected><1>
<PART_INFO_TYPE><8311><PIC18F83J11><18xxxx><6><1><1ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><1ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1ffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled, address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled, address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode, 20-bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode, 16-bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode, 12-bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode - External bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states for operations on external memory bus enabled><0>
<SETTING_VALUE_TYPE><OFF><Wait states for operations on external memory bus disabled><80>
<CONFIGREG_INFO_TYPE><1ffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><c390><PIC18F83J90><18xxxx><6><1><1ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><1ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1ffc><0><f8><0>
<CONFIGREG_INFO_TYPE><1ffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><8410><PIC18F8410><18xxxx><6><1><3fff><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><c3><3>
<SWITCH_INFO_TYPE><PM><Processor Mode><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><BW><Bus Width><40><2>
<SETTING_VALUE_TYPE><8><8-bit External Bus Data Width><0>
<SETTING_VALUE_TYPE><16><16-bit External Bus Data Width><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Wait programmed by WAIT1 and WAIT0 bits of MEMCOM register (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable, device will not wait><80>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block not code-protected><1>
<CONFIGREG_INFO_TYPE><30000c><0><1><1>
<SWITCH_INFO_TYPE><EBTR><Table Read Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Internal program memory block protected from table reads executed from external memory block><0>
<SETTING_VALUE_TYPE><OFF><Internal program memory block not protected from table reads executed from external memory block><1>
<PART_INFO_TYPE><8490><PIC18F8490><18xxxx><6><1><3fff><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block (000000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block (000000-003FFFh) not code-protected><1>
<PART_INFO_TYPE><8493><PIC18F8493><18xxxx><6><1><3fff><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block (000000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block (000000-003FFFh) not code-protected><1>
<PART_INFO_TYPE><8411><PIC18F84J11><18xxxx><6><1><3ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><3ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><3ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><3ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><3ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><3ffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled, address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled, address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode, 20-bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode, 16-bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode, 12-bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode - External bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states for operations on external memory bus enabled><0>
<SETTING_VALUE_TYPE><OFF><Wait states for operations on external memory bus disabled><80>
<CONFIGREG_INFO_TYPE><3ffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><c490><PIC18F84J90><18xxxx><6><1><3ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><3ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><3ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><3ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><3ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><3ffc><0><f8><0>
<CONFIGREG_INFO_TYPE><3ffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><a852><PIC18F8520><18xxxx><2><1><7fff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator w/ OSC2 configured as divide-by-4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300004><0><83><2>
<SWITCH_INFO_TYPE><MODE><Processor Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><3><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><8525><PIC18F8525><18xxxx><2><1><bfff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><2f><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><b>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator with OSC2 configured as divide by 4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator with OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator with OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with HW enabled 4x PLL><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator with OSC2 configured as RA6><7>
<SETTING_VALUE_TYPE><ECIOPLL><EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL><c>
<SETTING_VALUE_TYPE><ECIOSWPLL><EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL><d>
<SETTING_VALUE_TYPE><HSSWPLL><HS oscillator with SW enabled 4x PLL><e>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><83><2>
<SWITCH_INFO_TYPE><MODE><Processor Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by WAIT1:WAIT0 bits (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><Multiplexed with RB3 or RE7><0>
<SETTING_VALUE_TYPE><PORTC><Multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP Mux bit><2><2>
<SETTING_VALUE_TYPE><PORTH><ECCP1 (P1B/P1C) and ECCP3 (P3B/P3C) PWM outputs are multiplexed with RH7 through RH4><0>
<SETTING_VALUE_TYPE><PORTE><ECCP1 (P1B/P1C) and ECCP3 (P3B/P3C) PWM outputs are multiplexed with RE6 through RE3><2>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><8527><PIC18F8527><18xxxx><6><1><bfff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><f3><4>
<SWITCH_INFO_TYPE><MODE><Processor Data Memory Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><ADDRBW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><ADDR8BIT><8-bit Address Bus><0>
<SETTING_VALUE_TYPE><ADDR12BIT><12-bit Address Bus><10>
<SETTING_VALUE_TYPE><ADDR16BIT><16-bit Address Bus><20>
<SETTING_VALUE_TYPE><ADDR20BIT><20-bit Address Bus><30>
<SWITCH_INFO_TYPE><DATABW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><DATA8BIT><8-bit External Bus mode><0>
<SETTING_VALUE_TYPE><DATA16BIT><16-bit External Bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits><0>
<SETTING_VALUE_TYPE><OFF><Wait selections are unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><ECCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><PORTH><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RH7, RH6, RH5 and RH4 respectively><0>
<SETTING_VALUE_TYPE><PORTE><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RE6, RE5, RE4 and RE3 respectively><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><8585><PIC18F8585><18xxxx><2><1><bfff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><2f><2>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><b>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator with OSC2 configured as divide by 4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator with OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator with OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with HW enabled 4x PLL><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator with OSC2 configured as RA6><7>
<SETTING_VALUE_TYPE><ECIOPLL><EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL><c>
<SETTING_VALUE_TYPE><ECIOSWPLL><EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL><d>
<SETTING_VALUE_TYPE><HSSWPLL><HS oscillator with SW enabled 4x PLL><e>
<SWITCH_INFO_TYPE><OSCS><Osc. Switch Enable><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown Out Detect><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><83><2>
<SWITCH_INFO_TYPE><MODE><Processor Mode><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by WAIT1:WAIT0 bits (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP Mux><2><2>
<SETTING_VALUE_TYPE><PORTH><P1B, P1C are multiplexed with RH7, RH6><0>
<SETTING_VALUE_TYPE><PORTE><P1B, P1C are multiplexed with RE6, RE5><2>
<SWITCH_INFO_TYPE><MCLRE><MCLR enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage Program><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protect 000800-0003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 0004000-007FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 008000-00BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 004000-007FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 004000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><c510><PIC18F85J10><18xxxx><6><1><7ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><7ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled, address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled, address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode - 20-bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode - 16-bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode - 12-bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode - External bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states for operations on external memory bus enabled><0>
<SETTING_VALUE_TYPE><OFF><Wait states for operations on external memory bus disabled><80>
<CONFIGREG_INFO_TYPE><7ffd><0><f3><2>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCPx MUX bit><2><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<PART_INFO_TYPE><8511><PIC18F85J11><18xxxx><6><1><7ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><7ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled, address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled, address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode, 20-bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode, 16-bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode, 12-bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode - External bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states for operations on external memory bus enabled><0>
<SETTING_VALUE_TYPE><OFF><Wait states for operations on external memory bus disabled><80>
<CONFIGREG_INFO_TYPE><7ffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><c515><PIC18F85J15><18xxxx><6><1><bff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><bff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><bff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><bffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><bffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><bffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled, address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled, address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode - 20-bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode - 16-bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode - 12-bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode - External bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states for operations on external memory bus enabled><0>
<SETTING_VALUE_TYPE><OFF><Wait states for operations on external memory bus disabled><80>
<CONFIGREG_INFO_TYPE><bffd><0><f3><2>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCPx MUX bit><2><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<PART_INFO_TYPE><c550><PIC18F85J50><18xxxx><6><1><7ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><7ff8><0><ef><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><c7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC, Port function on RA6 and RA7><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSC, CLKO on RA6 and Port function on RA7><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, Port function on RA6 and RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKO on RA6 and Port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator, HS used by USB><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled, HSPLL used by USB><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with CLKO on RA6, EC used by USB><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL, CLKO on RA6, ECPLL used by USB><7>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled, address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled, address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus Configuration bits><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode - 20-bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode - 16-bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode - 12-bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode - External bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states on the external bus are enabled and selected by MEMCON<5:4>><0>
<SETTING_VALUE_TYPE><OFF><Wait states on the external bus are disabled><80>
<CONFIGREG_INFO_TYPE><7ffd><0><ff><4>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCPx MUX bit><2><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<SWITCH_INFO_TYPE><PMPMX><PMP Pin Multiplex bit><4><2>
<SETTING_VALUE_TYPE><ALTERNATE><PMP pins placed else where><0>
<SETTING_VALUE_TYPE><DEFAULT><PMP pins placed on EMB><4>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP Address Masking Mode Select bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5-Bit Address Masking mode enable><0>
<SETTING_VALUE_TYPE><MSK7><7-Bit Address Masking mode enable><8>
<PART_INFO_TYPE><c590><PIC18F85J90><18xxxx><6><1><7ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><7ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffc><0><f8><0>
<CONFIGREG_INFO_TYPE><7ffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><8594><PIC18F85J94><18xxxx><6><1><7fef><10><ff><0><0-5f><f60-fff><0><10>
<CONFIGREG_INFO_TYPE><7ff0><0><e0><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><7ff1><0><f7><3>
<SWITCH_INFO_TYPE><BOREN><Brown-Out Reset Enable><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit, disabled in Deep Sleep><1>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><2><2>
<SETTING_VALUE_TYPE><0><2.0V><0>
<SETTING_VALUE_TYPE><1><1.8V><2>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ff2><0><af><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><FRC><Fast RC Oscillator (FRC)><0>
<SETTING_VALUE_TYPE><FRCPLL><Fast RC Oscillator with PLL module (FRCPLL)><1>
<SETTING_VALUE_TYPE><PRI><Primary Oscillator (XT, HS, EC)><2>
<SETTING_VALUE_TYPE><PRIPLL><Primary Oscillator with PLL module (XTPLL,HSPLL,ECPLL)><3>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator (SOSC)><4>
<SETTING_VALUE_TYPE><LPRC><Low-Power RC Oscillator (LPRC)><5>
<SETTING_VALUE_TYPE><FRC500KHZ><Fast RC Oscillator divided by 16 (500 kHz)><6>
<SETTING_VALUE_TYPE><FRCDIV><Fast RC Oscillator with Postscaler (FRCDIV)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><8><2>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SWITCH_INFO_TYPE><CLKOEN><Clock Out Enable Bit><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><7ff3><0><ff><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Frequency Multiplier Select bits><f><10>
<SETTING_VALUE_TYPE><NODIV><96 MHz PLL selected; No divide - Oscillator used directly (4 MHz input)><0>
<SETTING_VALUE_TYPE><DIV2><96 MHz PLL selected; Oscillator divided by 2 (8 MHz input)><1>
<SETTING_VALUE_TYPE><DIV3><96 MHz PLL selected; Oscillator divided by 3 (12 MHz input)><2>
<SETTING_VALUE_TYPE><DIV4><96 MHz PLL selected; Oscillator divided by 4 (16 MHz input)><3>
<SETTING_VALUE_TYPE><DIV5><96 MHz PLL selected; Oscillator divided by 5 (20 MHz input)><4>
<SETTING_VALUE_TYPE><DIV6><96 MHz PLL selected; Oscillator divided by 6 (24 MHz input)><5>
<SETTING_VALUE_TYPE><DIV10><96 MHz PLL selected; Oscillator divided by 10 (40 MHz input)><6>
<SETTING_VALUE_TYPE><DIV12><96 MHz PLL selected; Oscillator divided by 12 (48 MHz input)><7>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><8>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><9>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><a>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><b>
<SETTING_VALUE_TYPE><PLL4X><4x PLL selected><c>
<SETTING_VALUE_TYPE><PLL6X><6x PLL selected><d>
<SETTING_VALUE_TYPE><PLL8X><8x PLL selected><e>
<SETTING_VALUE_TYPE><NOPLL><No PLL used - PLLGO bit not available to user><f>
<CONFIGREG_INFO_TYPE><7ff4><0><33><2>
<SWITCH_INFO_TYPE><POSCMD><Primary Oscillator Select><3><4>
<SETTING_VALUE_TYPE><EC><External clock mode selected><0>
<SETTING_VALUE_TYPE><MS><MS oscillator mode selected(3.5 MHz -10 MHz)><1>
<SETTING_VALUE_TYPE><HS><HS oscillator mode selected(10 MHz - 40 MHz)><2>
<SETTING_VALUE_TYPE><NONE><Primary oscillator disabled><3>
<SWITCH_INFO_TYPE><FSCM><Clock Switching and Monitor Selection Configuration bits><30><3>
<SETTING_VALUE_TYPE><CSECME><Clock switching is enabled, fail safe clock monitor is enabled><0>
<SETTING_VALUE_TYPE><CSECMD><Clock switching is enabled, fail safe clock monitor is disabled><10>
<SETTING_VALUE_TYPE><CSDCMD><Clock switching is disabled, fail safe clock monitor is disabled><20>
<CONFIGREG_INFO_TYPE><7ff5><0><f0><0>
<CONFIGREG_INFO_TYPE><7ff6><0><ff><1>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Boundary><ff><100>
<SETTING_VALUE_TYPE><WPFP0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><WPFP1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><WPFP2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><WPFP3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><WPFP4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><WPFP5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><WPFP6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><WPFP7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><WPFP8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><WPFP9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><WPFP10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><WPFP11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><WPFP12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><WPFP13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><WPFP14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><WPFP15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><WPFP16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><WPFP17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><WPFP18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><WPFP19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><WPFP20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><WPFP21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><WPFP22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><WPFP23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><WPFP24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><WPFP25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><WPFP26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><WPFP27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><WPFP28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><WPFP29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><WPFP30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><WPFP31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><WPFP32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><WPFP33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><WPFP34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><WPFP35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><WPFP36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><WPFP37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><WPFP38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><WPFP39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><WPFP40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><WPFP41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><WPFP42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><WPFP43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><WPFP44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><WPFP45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><WPFP46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><WPFP47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><WPFP48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><WPFP49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><WPFP50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><WPFP51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><WPFP52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><WPFP53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><WPFP54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><WPFP55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><WPFP56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><WPFP57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><WPFP58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><WPFP59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><WPFP60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><WPFP61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><WPFP62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><WPFP63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><WPFP64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><WPFP65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><WPFP66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><WPFP67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><WPFP68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><WPFP69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><WPFP70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><WPFP71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><WPFP72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><WPFP73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><WPFP74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><WPFP75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><WPFP76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><WPFP77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><WPFP78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><WPFP79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><WPFP80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><WPFP81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><WPFP82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><WPFP83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><WPFP84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><WPFP85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><WPFP86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><WPFP87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><WPFP88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><WPFP89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><WPFP90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><WPFP91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><WPFP92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><WPFP93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><WPFP94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><WPFP95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><WPFP96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><WPFP97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><WPFP98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><WPFP99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><WPFP100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><WPFP101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><WPFP102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><WPFP103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><WPFP104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><WPFP105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><WPFP106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><WPFP107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><WPFP108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><WPFP109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><WPFP110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><WPFP111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><WPFP112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><WPFP113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><WPFP114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><WPFP115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><WPFP116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><WPFP117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><WPFP118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><WPFP119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><WPFP120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><WPFP121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><WPFP122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><WPFP123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><WPFP124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><WPFP125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><WPFP126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><WPFP127><Write Protect Program Flash Page 127><7f>
<SETTING_VALUE_TYPE><WPFP128><Write Protect Program Flash Page 128><80>
<SETTING_VALUE_TYPE><WPFP129><Write Protect Program Flash Page 129><81>
<SETTING_VALUE_TYPE><WPFP130><Write Protect Program Flash Page 130><82>
<SETTING_VALUE_TYPE><WPFP131><Write Protect Program Flash Page 131><83>
<SETTING_VALUE_TYPE><WPFP132><Write Protect Program Flash Page 132><84>
<SETTING_VALUE_TYPE><WPFP133><Write Protect Program Flash Page 133><85>
<SETTING_VALUE_TYPE><WPFP134><Write Protect Program Flash Page 134><86>
<SETTING_VALUE_TYPE><WPFP135><Write Protect Program Flash Page 135><87>
<SETTING_VALUE_TYPE><WPFP136><Write Protect Program Flash Page 136><88>
<SETTING_VALUE_TYPE><WPFP137><Write Protect Program Flash Page 137><89>
<SETTING_VALUE_TYPE><WPFP138><Write Protect Program Flash Page 138><8a>
<SETTING_VALUE_TYPE><WPFP139><Write Protect Program Flash Page 139><8b>
<SETTING_VALUE_TYPE><WPFP140><Write Protect Program Flash Page 140><8c>
<SETTING_VALUE_TYPE><WPFP141><Write Protect Program Flash Page 141><8d>
<SETTING_VALUE_TYPE><WPFP142><Write Protect Program Flash Page 142><8e>
<SETTING_VALUE_TYPE><WPFP143><Write Protect Program Flash Page 143><8f>
<SETTING_VALUE_TYPE><WPFP144><Write Protect Program Flash Page 144><90>
<SETTING_VALUE_TYPE><WPFP145><Write Protect Program Flash Page 145><91>
<SETTING_VALUE_TYPE><WPFP146><Write Protect Program Flash Page 146><92>
<SETTING_VALUE_TYPE><WPFP147><Write Protect Program Flash Page 147><93>
<SETTING_VALUE_TYPE><WPFP148><Write Protect Program Flash Page 148><94>
<SETTING_VALUE_TYPE><WPFP149><Write Protect Program Flash Page 149><95>
<SETTING_VALUE_TYPE><WPFP150><Write Protect Program Flash Page 150><96>
<SETTING_VALUE_TYPE><WPFP151><Write Protect Program Flash Page 151><97>
<SETTING_VALUE_TYPE><WPFP152><Write Protect Program Flash Page 152><98>
<SETTING_VALUE_TYPE><WPFP153><Write Protect Program Flash Page 153><99>
<SETTING_VALUE_TYPE><WPFP154><Write Protect Program Flash Page 154><9a>
<SETTING_VALUE_TYPE><WPFP155><Write Protect Program Flash Page 155><9b>
<SETTING_VALUE_TYPE><WPFP156><Write Protect Program Flash Page 156><9c>
<SETTING_VALUE_TYPE><WPFP157><Write Protect Program Flash Page 157><9d>
<SETTING_VALUE_TYPE><WPFP158><Write Protect Program Flash Page 158><9e>
<SETTING_VALUE_TYPE><WPFP159><Write Protect Program Flash Page 159><9f>
<SETTING_VALUE_TYPE><WPFP160><Write Protect Program Flash Page 160><a0>
<SETTING_VALUE_TYPE><WPFP161><Write Protect Program Flash Page 161><a1>
<SETTING_VALUE_TYPE><WPFP162><Write Protect Program Flash Page 162><a2>
<SETTING_VALUE_TYPE><WPFP163><Write Protect Program Flash Page 163><a3>
<SETTING_VALUE_TYPE><WPFP164><Write Protect Program Flash Page 164><a4>
<SETTING_VALUE_TYPE><WPFP165><Write Protect Program Flash Page 165><a5>
<SETTING_VALUE_TYPE><WPFP166><Write Protect Program Flash Page 166><a6>
<SETTING_VALUE_TYPE><WPFP167><Write Protect Program Flash Page 167><a7>
<SETTING_VALUE_TYPE><WPFP168><Write Protect Program Flash Page 168><a8>
<SETTING_VALUE_TYPE><WPFP169><Write Protect Program Flash Page 169><a9>
<SETTING_VALUE_TYPE><WPFP170><Write Protect Program Flash Page 170><aa>
<SETTING_VALUE_TYPE><WPFP171><Write Protect Program Flash Page 171><ab>
<SETTING_VALUE_TYPE><WPFP172><Write Protect Program Flash Page 172><ac>
<SETTING_VALUE_TYPE><WPFP173><Write Protect Program Flash Page 173><ad>
<SETTING_VALUE_TYPE><WPFP174><Write Protect Program Flash Page 174><ae>
<SETTING_VALUE_TYPE><WPFP175><Write Protect Program Flash Page 175><af>
<SETTING_VALUE_TYPE><WPFP176><Write Protect Program Flash Page 176><b0>
<SETTING_VALUE_TYPE><WPFP177><Write Protect Program Flash Page 177><b1>
<SETTING_VALUE_TYPE><WPFP178><Write Protect Program Flash Page 178><b2>
<SETTING_VALUE_TYPE><WPFP179><Write Protect Program Flash Page 179><b3>
<SETTING_VALUE_TYPE><WPFP180><Write Protect Program Flash Page 180><b4>
<SETTING_VALUE_TYPE><WPFP181><Write Protect Program Flash Page 181><b5>
<SETTING_VALUE_TYPE><WPFP182><Write Protect Program Flash Page 182><b6>
<SETTING_VALUE_TYPE><WPFP183><Write Protect Program Flash Page 183><b7>
<SETTING_VALUE_TYPE><WPFP184><Write Protect Program Flash Page 184><b8>
<SETTING_VALUE_TYPE><WPFP185><Write Protect Program Flash Page 185><b9>
<SETTING_VALUE_TYPE><WPFP186><Write Protect Program Flash Page 186><ba>
<SETTING_VALUE_TYPE><WPFP187><Write Protect Program Flash Page 187><bb>
<SETTING_VALUE_TYPE><WPFP188><Write Protect Program Flash Page 188><bc>
<SETTING_VALUE_TYPE><WPFP189><Write Protect Program Flash Page 189><bd>
<SETTING_VALUE_TYPE><WPFP190><Write Protect Program Flash Page 190><be>
<SETTING_VALUE_TYPE><WPFP191><Write Protect Program Flash Page 191><bf>
<SETTING_VALUE_TYPE><WPFP192><Write Protect Program Flash Page 192><c0>
<SETTING_VALUE_TYPE><WPFP193><Write Protect Program Flash Page 193><c1>
<SETTING_VALUE_TYPE><WPFP194><Write Protect Program Flash Page 194><c2>
<SETTING_VALUE_TYPE><WPFP195><Write Protect Program Flash Page 195><c3>
<SETTING_VALUE_TYPE><WPFP196><Write Protect Program Flash Page 196><c4>
<SETTING_VALUE_TYPE><WPFP197><Write Protect Program Flash Page 197><c5>
<SETTING_VALUE_TYPE><WPFP198><Write Protect Program Flash Page 198><c6>
<SETTING_VALUE_TYPE><WPFP199><Write Protect Program Flash Page 199><c7>
<SETTING_VALUE_TYPE><WPFP200><Write Protect Program Flash Page 200><c8>
<SETTING_VALUE_TYPE><WPFP201><Write Protect Program Flash Page 201><c9>
<SETTING_VALUE_TYPE><WPFP202><Write Protect Program Flash Page 202><ca>
<SETTING_VALUE_TYPE><WPFP203><Write Protect Program Flash Page 203><cb>
<SETTING_VALUE_TYPE><WPFP204><Write Protect Program Flash Page 204><cc>
<SETTING_VALUE_TYPE><WPFP205><Write Protect Program Flash Page 205><cd>
<SETTING_VALUE_TYPE><WPFP206><Write Protect Program Flash Page 206><ce>
<SETTING_VALUE_TYPE><WPFP207><Write Protect Program Flash Page 207><cf>
<SETTING_VALUE_TYPE><WPFP208><Write Protect Program Flash Page 208><d0>
<SETTING_VALUE_TYPE><WPFP209><Write Protect Program Flash Page 209><d1>
<SETTING_VALUE_TYPE><WPFP210><Write Protect Program Flash Page 210><d2>
<SETTING_VALUE_TYPE><WPFP211><Write Protect Program Flash Page 211><d3>
<SETTING_VALUE_TYPE><WPFP212><Write Protect Program Flash Page 212><d4>
<SETTING_VALUE_TYPE><WPFP213><Write Protect Program Flash Page 213><d5>
<SETTING_VALUE_TYPE><WPFP214><Write Protect Program Flash Page 214><d6>
<SETTING_VALUE_TYPE><WPFP215><Write Protect Program Flash Page 215><d7>
<SETTING_VALUE_TYPE><WPFP216><Write Protect Program Flash Page 216><d8>
<SETTING_VALUE_TYPE><WPFP217><Write Protect Program Flash Page 217><d9>
<SETTING_VALUE_TYPE><WPFP218><Write Protect Program Flash Page 218><da>
<SETTING_VALUE_TYPE><WPFP219><Write Protect Program Flash Page 219><db>
<SETTING_VALUE_TYPE><WPFP220><Write Protect Program Flash Page 220><dc>
<SETTING_VALUE_TYPE><WPFP221><Write Protect Program Flash Page 221><dd>
<SETTING_VALUE_TYPE><WPFP222><Write Protect Program Flash Page 222><de>
<SETTING_VALUE_TYPE><WPFP223><Write Protect Program Flash Page 223><df>
<SETTING_VALUE_TYPE><WPFP224><Write Protect Program Flash Page 224><e0>
<SETTING_VALUE_TYPE><WPFP225><Write Protect Program Flash Page 225><e1>
<SETTING_VALUE_TYPE><WPFP226><Write Protect Program Flash Page 226><e2>
<SETTING_VALUE_TYPE><WPFP227><Write Protect Program Flash Page 227><e3>
<SETTING_VALUE_TYPE><WPFP228><Write Protect Program Flash Page 228><e4>
<SETTING_VALUE_TYPE><WPFP229><Write Protect Program Flash Page 229><e5>
<SETTING_VALUE_TYPE><WPFP230><Write Protect Program Flash Page 230><e6>
<SETTING_VALUE_TYPE><WPFP231><Write Protect Program Flash Page 231><e7>
<SETTING_VALUE_TYPE><WPFP232><Write Protect Program Flash Page 232><e8>
<SETTING_VALUE_TYPE><WPFP233><Write Protect Program Flash Page 233><e9>
<SETTING_VALUE_TYPE><WPFP234><Write Protect Program Flash Page 234><ea>
<SETTING_VALUE_TYPE><WPFP235><Write Protect Program Flash Page 235><eb>
<SETTING_VALUE_TYPE><WPFP236><Write Protect Program Flash Page 236><ec>
<SETTING_VALUE_TYPE><WPFP237><Write Protect Program Flash Page 237><ed>
<SETTING_VALUE_TYPE><WPFP238><Write Protect Program Flash Page 238><ee>
<SETTING_VALUE_TYPE><WPFP239><Write Protect Program Flash Page 239><ef>
<SETTING_VALUE_TYPE><WPFP240><Write Protect Program Flash Page 240><f0>
<SETTING_VALUE_TYPE><WPFP241><Write Protect Program Flash Page 241><f1>
<SETTING_VALUE_TYPE><WPFP242><Write Protect Program Flash Page 242><f2>
<SETTING_VALUE_TYPE><WPFP243><Write Protect Program Flash Page 243><f3>
<SETTING_VALUE_TYPE><WPFP244><Write Protect Program Flash Page 244><f4>
<SETTING_VALUE_TYPE><WPFP245><Write Protect Program Flash Page 245><f5>
<SETTING_VALUE_TYPE><WPFP246><Write Protect Program Flash Page 246><f6>
<SETTING_VALUE_TYPE><WPFP247><Write Protect Program Flash Page 247><f7>
<SETTING_VALUE_TYPE><WPFP248><Write Protect Program Flash Page 248><f8>
<SETTING_VALUE_TYPE><WPFP249><Write Protect Program Flash Page 249><f9>
<SETTING_VALUE_TYPE><WPFP250><Write Protect Program Flash Page 250><fa>
<SETTING_VALUE_TYPE><WPFP251><Write Protect Program Flash Page 251><fb>
<SETTING_VALUE_TYPE><WPFP252><Write Protect Program Flash Page 252><fc>
<SETTING_VALUE_TYPE><WPFP253><Write Protect Program Flash Page 253><fd>
<SETTING_VALUE_TYPE><WPFP254><Write Protect Program Flash Page 254><fe>
<SETTING_VALUE_TYPE><WPFP255><Write Protect Program Flash Page 255><ff>
<CONFIGREG_INFO_TYPE><7ff7><0><f7><3>
<SWITCH_INFO_TYPE><WPDIS><Segment Write Protection Disable><1><2>
<SETTING_VALUE_TYPE><WPEN><Enabled><0>
<SETTING_VALUE_TYPE><WPDIS><Disabled><1>
<SWITCH_INFO_TYPE><WPEND><Segment Write Protection End Page Select><2><2>
<SETTING_VALUE_TYPE><WPSTARTMEM><write Protect from page 0 to WPFP><0>
<SETTING_VALUE_TYPE><WPENDMEM><Write Protect from WPFP to the last page of memory><2>
<SWITCH_INFO_TYPE><WPCFG><Write Protect Configuration Page Select><4><2>
<SETTING_VALUE_TYPE><WPCFGEN><Enabled><0>
<SETTING_VALUE_TYPE><WPCFGDIS><Disabled><4>
<CONFIGREG_INFO_TYPE><7ff8><0><fb><6>
<SWITCH_INFO_TYPE><T5GSEL><TMR5 Gate Select bit><1><2>
<SETTING_VALUE_TYPE><T3G><TMR5 Gate is driven by the T3G input><0>
<SETTING_VALUE_TYPE><T5G><TMR5 Gate is driven by the T5G input><1>
<SWITCH_INFO_TYPE><CINASEL><CxINA Gate Select bit><2><2>
<SETTING_VALUE_TYPE><RA5><C1INA and C3INA are all re-mapped to pin RA5><0>
<SETTING_VALUE_TYPE><DEFAULT><C1INA and C3INA are on their default pin locations><2>
<SWITCH_INFO_TYPE><EASHFT><External Address Shift bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address Shifting disabled><0>
<SETTING_VALUE_TYPE><ON><Address Shifting enabled><8>
<SWITCH_INFO_TYPE><ABW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><XM20><20-bit address bus><0>
<SETTING_VALUE_TYPE><XM16><16-bit address bus><10>
<SETTING_VALUE_TYPE><XM12><12-bit address bus><20>
<SETTING_VALUE_TYPE><MM><8-bit address bus><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><7ff9><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><the IOLOCK bit can be set and cleared using the unlock sequence><0>
<SETTING_VALUE_TYPE><ON><Once set, the IOLOCK bit cannot be cleared><1>
<SWITCH_INFO_TYPE><LS48MHZ><USB Low Speed Clock Select bit><2><2>
<SETTING_VALUE_TYPE><SYSX1><Divide-by-1 (System clock must be 6 MHz)><0>
<SETTING_VALUE_TYPE><SYSX2><Divide-by-2 (System clock must be 12 MHz)><2>
<SWITCH_INFO_TYPE><MSSPMSK2><MSSP2 7-Bit Address Masking Mode Enable bit><4><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><4>
<SWITCH_INFO_TYPE><MSSPMSK1><MSSP1 7-Bit Address Masking Mode Enable bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><7ffa><0><ff><3>
<SWITCH_INFO_TYPE><WDTWIN><Watch Dog Timer Window><3><4>
<SETTING_VALUE_TYPE><PS75_0><Watch Dog Timer Window Width is 75 percent><0>
<SETTING_VALUE_TYPE><PS50_0><Watch Dog Timer Window Width is 50 percent><1>
<SETTING_VALUE_TYPE><PS37_5><Watch Dog Timer Window Width is 37.5 percent><2>
<SETTING_VALUE_TYPE><PS25_0><Watch Dog Timer Window Width is 25 percent><3>
<SWITCH_INFO_TYPE><WDTCLK><Watch Dog Timer Clock Source><c><4>
<SETTING_VALUE_TYPE><SYS><Use FOSC/4 when system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><0>
<SETTING_VALUE_TYPE><SOSC><Always use SOSC><4>
<SETTING_VALUE_TYPE><LPRC><Always use INTOSC/LPRC><8>
<SETTING_VALUE_TYPE><FRC><Use FRC when WINDIS = 0, system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><c>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale><f0><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><10>
<SETTING_VALUE_TYPE><4><1:4><20>
<SETTING_VALUE_TYPE><8><1:8><30>
<SETTING_VALUE_TYPE><16><1:16><40>
<SETTING_VALUE_TYPE><32><1:32><50>
<SETTING_VALUE_TYPE><64><1:64><60>
<SETTING_VALUE_TYPE><128><1:128><70>
<SETTING_VALUE_TYPE><256><1:256><80>
<SETTING_VALUE_TYPE><512><1:512><90>
<SETTING_VALUE_TYPE><1024><1:1024><a0>
<SETTING_VALUE_TYPE><2048><1:2048><b0>
<SETTING_VALUE_TYPE><4096><1:4096><c0>
<SETTING_VALUE_TYPE><8192><1:8192><d0>
<SETTING_VALUE_TYPE><16384><1:16384><e0>
<SETTING_VALUE_TYPE><32768><1:32768><f0>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WINDIS><Windowed Watchdog Timer Disable><4><2>
<SETTING_VALUE_TYPE><WDTWIN><Windowed WDT enabled><0>
<SETTING_VALUE_TYPE><WDTSTD><Standard WDT selected; windowed WDT disabled><4>
<SWITCH_INFO_TYPE><WPSA><WDT Prescaler><8><2>
<SETTING_VALUE_TYPE><32><WDT prescaler ratio of 1:32><0>
<SETTING_VALUE_TYPE><128><WDT prescaler ratio of 1:128><8>
<CONFIGREG_INFO_TYPE><7ffc><0><1d><4>
<SWITCH_INFO_TYPE><RETEN><Retention Voltage Regulator Control Enable><1><2>
<SETTING_VALUE_TYPE><ON><Retention controlled by SRETEN during Sleep><0>
<SETTING_VALUE_TYPE><OFF><Retention not available><1>
<SWITCH_INFO_TYPE><VBTBOR><VBAT BOR Enable><4><2>
<SETTING_VALUE_TYPE><OFF><VBAT BOR is disabled><0>
<SETTING_VALUE_TYPE><ON><VBAT BOR is enabled><4>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR Enable><8><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled in Deep Sleep (does not affect operation in non-Deep Sleep modes)><0>
<SETTING_VALUE_TYPE><ON><BOR enabled in Deep Sleep><8>
<SWITCH_INFO_TYPE><DSBITEN><DSEN Bit Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Deep Sleep operation is always disabled><0>
<SETTING_VALUE_TYPE><ON><Deep Sleep is controlled by the register bit DSEN><10>
<CONFIGREG_INFO_TYPE><7ffd><0><f0><0>
<CONFIGREG_INFO_TYPE><7ffe><0><f8><1>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Timer Postscale Select><f8><20>
<SETTING_VALUE_TYPE><DSWDTPS0><1:32 (1 mS)><0>
<SETTING_VALUE_TYPE><DSWDTPS1><1:64 (2.1 mS)><8>
<SETTING_VALUE_TYPE><DSWDTPS2><1:128 (4.1 mS)><10>
<SETTING_VALUE_TYPE><DSWDTPS3><1: 256 (8.3 mS)><18>
<SETTING_VALUE_TYPE><DSWDTPS4><1:512 (16.5 mS)><20>
<SETTING_VALUE_TYPE><DSWDTPS5><1:1024 (33 mS)><28>
<SETTING_VALUE_TYPE><DSWDTPS6><1:2048 (66.1 mS)><30>
<SETTING_VALUE_TYPE><DSWDTPS7><1:4096 (132.1 mS)><38>
<SETTING_VALUE_TYPE><DSWDTPS8><1:8192 (264.3 mS)><40>
<SETTING_VALUE_TYPE><DSWDTPS9><1:16384 (528.5 mS)><48>
<SETTING_VALUE_TYPE><DSWDTPSA><1:32768 (1.057 Secs)><50>
<SETTING_VALUE_TYPE><DSWDTPSB><1:65536 (2.114 Secs)><58>
<SETTING_VALUE_TYPE><DSWDTPSC><1:131072 (4.228 Secs)><60>
<SETTING_VALUE_TYPE><DSWDTPSD><1:262114 (8.456 Secs)><68>
<SETTING_VALUE_TYPE><DSWDTPSE><1:524288 (16.912 Secs)><70>
<SETTING_VALUE_TYPE><DSWDTPSF><1:1048576 (33.825 Secs)><78>
<SETTING_VALUE_TYPE><DSWDTPS10><1:2097152 (67.7 Secs)><80>
<SETTING_VALUE_TYPE><DSWDTPS11><1:4194304 (135.3 Secs)><88>
<SETTING_VALUE_TYPE><DSWDTPS12><1:8388608 (4.5 Minutes)><90>
<SETTING_VALUE_TYPE><DSWDTPS13><1:16777216 (9 Minutes)><98>
<SETTING_VALUE_TYPE><DSWDTPS14><1:33554432 (18 Minutes)><a0>
<SETTING_VALUE_TYPE><DSWDTPS15><1:67108864 (36.1 Minutes)><a8>
<SETTING_VALUE_TYPE><DSWDTPS16><1:134217728 (72.2 Minutes)><b0>
<SETTING_VALUE_TYPE><DSWDTPS17><1:268435456 (2.4 Hours)><b8>
<SETTING_VALUE_TYPE><DSWDTPS18><1:536870912 (4.8 Hours)><c0>
<SETTING_VALUE_TYPE><DSWDTPS19><1:1073741824 (9.6 Hours)><c8>
<SETTING_VALUE_TYPE><DSWDTPS1A><1:2147483648 (19.2 Hours)><d0>
<SETTING_VALUE_TYPE><DSWDTPS1B><1:4294967296 (38.5 Hours)><d8>
<SETTING_VALUE_TYPE><DSWDTPS1C><1:8589934592 (77 Hours)><e0>
<SETTING_VALUE_TYPE><DSWDTPS1D><1:17179869184 (6.4 Days)><e8>
<SETTING_VALUE_TYPE><DSWDTPS1E><1:34359738368 (12.8  Days)><f0>
<SETTING_VALUE_TYPE><DSWDTPS1F><1:68719476736 (25.7 Days)><f8>
<CONFIGREG_INFO_TYPE><7fff><0><f3><2>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer Enable><1><2>
<SETTING_VALUE_TYPE><OFF><DSWDT Disabled><0>
<SETTING_VALUE_TYPE><ON><DSWDT Enabled><1>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Reference Clock Select><2><2>
<SETTING_VALUE_TYPE><SOSC><DSWDT uses SOSC as reference clock><0>
<SETTING_VALUE_TYPE><LPRC><DSWDT uses LPRC as reference clock><2>
<PART_INFO_TYPE><8522><PIC18F85K22><18xxxx><6><1><7fff><10><ff><3ff><0-5f><f60-fff><0><d>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SRETEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300004><0><f9><5>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><1><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><SOSCREF><RTCC uses SOSC><1>
<SWITCH_INFO_TYPE><EASHFT><External Address Shift bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled><8>
<SWITCH_INFO_TYPE><ABW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><XM20><20-bit address bus><0>
<SETTING_VALUE_TYPE><XM16><16-bit address bus><10>
<SETTING_VALUE_TYPE><XM12><12-bit address bus><20>
<SETTING_VALUE_TYPE><MM><8-bit address bus><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300005><0><8b><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><RE7-Microcontroller Mode/RB3-All other modes><0>
<SETTING_VALUE_TYPE><PORTC><RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP Mux><2><2>
<SETTING_VALUE_TYPE><PORTH><Enhanced CCP1/3 [P1B/P1C/P3B/P3C] muxed with RH7/RH6/RH5/RH4><0>
<SETTING_VALUE_TYPE><PORTE><Enhanced CCP1/3 [P1B/P1C/P3B/P3C] muxed with RE6/RE5/RE4/RE3><2>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RG5 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RG5 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-017FF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 01800-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBRT0><Table Read Protect 00800-017FF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBRT1><Table Read Protect 01800-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBRT2><Table Read Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBRT3><Table Read Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBRTB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><c591><PIC18F85K90><18xxxx><6><1><7fff><10><ff><3ff><0-5f><f60-fff><0><d>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SRETEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300004><0><1><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><1><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><SOSCREF><RTCC uses SOSC><1>
<CONFIGREG_INFO_TYPE><300005><0><8b><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><RE7-Microcontroller Mode/RB3-All other modes><0>
<SETTING_VALUE_TYPE><PORTC><RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP Mux><2><2>
<SETTING_VALUE_TYPE><PORTH><Enhanced CCP1/3 [P1B/P1C/P3B/P3C] muxed with RH7/RH6/RH5/RH4><0>
<SETTING_VALUE_TYPE><PORTE><Enhanced CCP1/3 [P1B/P1C/P3B/P3C] muxed with RE6/RE5/RE4/RE3><2>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RG5 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RG5 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-017FF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 01800-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBRT0><Table Read Protect 00800-017FF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBRT1><Table Read Protect 01800-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBRT2><Table Read Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBRT3><Table Read Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBRTB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><a862><PIC18F8620><18xxxx><2><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator w/ OSC2 configured as divide-by-4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300004><0><83><2>
<SWITCH_INFO_TYPE><MODE><Processor Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><3><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><8621><PIC18F8621><18xxxx><2><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><2f><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><b>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator with OSC2 configured as divide by 4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator with OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator with OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with HW enabled 4x PLL><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator with OSC2 configured as RA6><7>
<SETTING_VALUE_TYPE><ECIOPLL><EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL><c>
<SETTING_VALUE_TYPE><ECIOSWPLL><EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL><d>
<SETTING_VALUE_TYPE><HSSWPLL><HS oscillator with SW enabled 4x PLL><e>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><83><2>
<SWITCH_INFO_TYPE><MODE><Processor Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by WAIT1:WAIT0 bits (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><Multiplexed with RB3 or RE7><0>
<SETTING_VALUE_TYPE><PORTC><Multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP Mux bit><2><2>
<SETTING_VALUE_TYPE><PORTH><ECCP1 (P1B/P1C) and ECCP3 (P3B/P3C) PWM outputs are multiplexed with RH7 through RH4><0>
<SETTING_VALUE_TYPE><PORTE><ECCP1 (P1B/P1C) and ECCP3 (P3B/P3C) PWM outputs are multiplexed with RE6 through RE3><2>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh)  code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><8622><PIC18F8622><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><f3><4>
<SWITCH_INFO_TYPE><MODE><Processor Data Memory Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><ADDRBW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><ADDR8BIT><8-bit Address Bus><0>
<SETTING_VALUE_TYPE><ADDR12BIT><12-bit Address Bus><10>
<SETTING_VALUE_TYPE><ADDR16BIT><16-bit Address Bus><20>
<SETTING_VALUE_TYPE><ADDR20BIT><20-bit Address Bus><30>
<SWITCH_INFO_TYPE><DATABW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><DATA8BIT><8-bit External Bus mode><0>
<SETTING_VALUE_TYPE><DATA16BIT><16-bit External Bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits><0>
<SETTING_VALUE_TYPE><OFF><Wait selections are unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><ECCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><PORTH><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RH7, RH6, RH5 and RH4 respectively><0>
<SETTING_VALUE_TYPE><PORTE><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RE6, RE5, RE4 and RE3 respectively><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><8625><PIC18F8627><18xxxx><6><1><17fff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><f3><4>
<SWITCH_INFO_TYPE><MODE><Processor Data Memory Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><ADDRBW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><ADDR8BIT><8-bit Address Bus><0>
<SETTING_VALUE_TYPE><ADDR12BIT><12-bit Address Bus><10>
<SETTING_VALUE_TYPE><ADDR16BIT><16-bit Address Bus><20>
<SETTING_VALUE_TYPE><ADDR20BIT><20-bit Address Bus><30>
<SWITCH_INFO_TYPE><DATABW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><DATA8BIT><8-bit External Bus mode><0>
<SETTING_VALUE_TYPE><DATA16BIT><16-bit External Bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits><0>
<SETTING_VALUE_TYPE><OFF><Wait selections are unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><ECCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><PORTH><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RH7, RH6, RH5 and RH4 respectively><0>
<SETTING_VALUE_TYPE><PORTE><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RE6, RE5, RE4 and RE3 respectively><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><6>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><6>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><6>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><8628><PIC18F8628><18xxxx><6><1><17fff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><f3><4>
<SWITCH_INFO_TYPE><MODE><Processor Data Memory Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><ADDRBW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><ADDR8BIT><8-bit Address Bus><0>
<SETTING_VALUE_TYPE><ADDR12BIT><12-bit Address Bus><10>
<SETTING_VALUE_TYPE><ADDR16BIT><16-bit Address Bus><20>
<SETTING_VALUE_TYPE><ADDR20BIT><20-bit Address Bus><30>
<SWITCH_INFO_TYPE><DATABW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><DATA8BIT><8-bit External Bus mode><0>
<SETTING_VALUE_TYPE><DATA16BIT><16-bit External Bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits><0>
<SETTING_VALUE_TYPE><OFF><Wait selections are unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><ECCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><PORTH><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RH7, RH6, RH5 and RH4 respectively><0>
<SETTING_VALUE_TYPE><PORTE><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RE6, RE5, RE4 and RE3 respectively><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><6>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><6>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><6>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><8680><PIC18F8680><18xxxx><2><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><2f><2>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><b>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator with OSC2 configured as divide by 4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator with OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator with OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with HW enabled 4x PLL><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator with OSC2 configured as RA6><7>
<SETTING_VALUE_TYPE><ECIOPLL><EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL><c>
<SETTING_VALUE_TYPE><ECIOSWPLL><EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL><d>
<SETTING_VALUE_TYPE><HSSWPLL><HS oscillator with SW enabled 4x PLL><e>
<SWITCH_INFO_TYPE><OSCS><Osc. Switch Enable><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown Out Detect><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><83><2>
<SWITCH_INFO_TYPE><MODE><Processor Mode><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by WAIT1:WAIT0 bits (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP Mux><2><2>
<SETTING_VALUE_TYPE><PORTH><P1B, P1C are multiplexed with RH7, RH6><0>
<SETTING_VALUE_TYPE><PORTE><P1B, P1C are multiplexed with RE6, RE5><2>
<SWITCH_INFO_TYPE><MCLRE><MCLR enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage Program><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 000800-0003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 0004000-007FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 008000-00BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 00C000-00FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh)  code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 004000-007FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 004000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><c610><PIC18F86J10><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled, address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled, address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode - 20-bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode - 16-bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode - 12-bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode - External bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states for operations on external memory bus enabled><0>
<SETTING_VALUE_TYPE><OFF><Wait states for operations on external memory bus disabled><80>
<CONFIGREG_INFO_TYPE><fffd><0><f3><2>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCPx MUX bit><2><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<PART_INFO_TYPE><c611><PIC18F86J11><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><c7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><Internal oscillator, port function on RA6 and RA7 ><0>
<SETTING_VALUE_TYPE><INTOSCO><Internal oscillator, CLKOUT on RA6 and port function on RA7><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, port function on RA6 and RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKOUT on RA6 and port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator, CLKO  on RA6><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator, PLL enabled, CLKO on RA6><7>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled, address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled, address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus Configuration bits><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode - 20-bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode - 16-bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode - 12-bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode - External bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states on the external bus are enabled and selected by MEMCON<5:4>><0>
<SETTING_VALUE_TYPE><OFF><Wait states on the external bus are disabled><80>
<CONFIGREG_INFO_TYPE><fffd><0><ff><4>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCPx MUX bit><2><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<SWITCH_INFO_TYPE><PMPMX><PMP Pin Multiplex bit><4><2>
<SETTING_VALUE_TYPE><ALTERNATE><PMP port pins not connected to EMB (PORTA, PORTF and PORTH)><0>
<SETTING_VALUE_TYPE><DEFAULT><PMP port pins connected to EMB (PORTD and PORTE)><4>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP Address Masking Mode Select bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5-Bit Address Masking mode enable><0>
<SETTING_VALUE_TYPE><MSK7><7-Bit Address Masking mode enable><8>
<PART_INFO_TYPE><c615><PIC18F86J15><18xxxx><6><1><17ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><17ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><17ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><17ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><17ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><17ffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled, address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled, address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode - 20-bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode - 16-bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode - 12-bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode - External bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states for operations on external memory bus enabled><0>
<SETTING_VALUE_TYPE><OFF><Wait states for operations on external memory bus disabled><80>
<CONFIGREG_INFO_TYPE><17ffd><0><f3><2>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCPx MUX bit><2><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<PART_INFO_TYPE><c616><PIC18F86J16><18xxxx><6><1><17ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><17ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><17ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><17ffa><0><c7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><Internal oscillator, port function on RA6 and RA7 ><0>
<SETTING_VALUE_TYPE><INTOSCO><Internal oscillator, CLKOUT on RA6 and port function on RA7><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, port function on RA6 and RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKOUT on RA6 and port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator, CLKO  on RA6><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator, PLL enabled, CLKO on RA6><7>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><17ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><17ffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled, address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled, address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus Configuration bits><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode - 20-bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode - 16-bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode - 12-bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode - External bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states on the external bus are enabled and selected by MEMCON<5:4>><0>
<SETTING_VALUE_TYPE><OFF><Wait states on the external bus are disabled><80>
<CONFIGREG_INFO_TYPE><17ffd><0><ff><4>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCPx MUX bit><2><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<SWITCH_INFO_TYPE><PMPMX><PMP Pin Multiplex bit><4><2>
<SETTING_VALUE_TYPE><ALTERNATE><PMP port pins not connected to EMB (PORTA, PORTF and PORTH)><0>
<SETTING_VALUE_TYPE><DEFAULT><PMP port pins connected to EMB (PORTD and PORTE)><4>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP Address Masking Mode Select bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5-Bit Address Masking mode enable><0>
<SETTING_VALUE_TYPE><MSK7><7-Bit Address Masking mode enable><8>
<PART_INFO_TYPE><c650><PIC18F86J50><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><fff8><0><ef><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><fff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><c7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC, Port function on RA6 and RA7><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSC, CLKO on RA6 and Port function on RA7><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, Port function on RA6 and RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKO on RA6 and Port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator, HS used by USB><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled, HSPLL used by USB><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with CLKO on RA6, EC used by USB><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL, CLKO on RA6, ECPLL used by USB><7>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled, address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled, address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus Configuration bits><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode - 20-bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode - 16-bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode - 12-bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode - External bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states on the external bus are enabled and selected by MEMCON<5:4>><0>
<SETTING_VALUE_TYPE><OFF><Wait states on the external bus are disabled><80>
<CONFIGREG_INFO_TYPE><fffd><0><ff><4>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCPx MUX bit><2><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<SWITCH_INFO_TYPE><PMPMX><PMP Pin Multiplex bit><4><2>
<SETTING_VALUE_TYPE><ALTERNATE><PMP pins placed else where><0>
<SETTING_VALUE_TYPE><DEFAULT><PMP pins placed on EMB><4>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP Address Masking Mode Select bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5-Bit Address Masking mode enable><0>
<SETTING_VALUE_TYPE><MSK7><7-Bit Address Masking mode enable><8>
<PART_INFO_TYPE><c655><PIC18F86J55><18xxxx><6><1><17ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><17ff8><0><ef><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><17ff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><17ffa><0><c7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC, Port function on RA6 and RA7><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSC, CLKO on RA6 and Port function on RA7><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, Port function on RA6 and RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKO on RA6 and Port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator, HS used by USB><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled, HSPLL used by USB><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with CLKO on RA6, EC used by USB><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL, CLKO on RA6, ECPLL used by USB><7>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><17ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><17ffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled, address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled, address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus Configuration bits><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode - 20-bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode - 16-bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode - 12-bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode - External bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states on the external bus are enabled and selected by MEMCON<5:4>><0>
<SETTING_VALUE_TYPE><OFF><Wait states on the external bus are disabled><80>
<CONFIGREG_INFO_TYPE><17ffd><0><ff><4>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCPx MUX bit><2><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<SWITCH_INFO_TYPE><PMPMX><PMP Pin Multiplex bit><4><2>
<SETTING_VALUE_TYPE><ALTERNATE><PMP pins placed else where><0>
<SETTING_VALUE_TYPE><DEFAULT><PMP pins placed on EMB><4>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP Address Masking Mode Select bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5-Bit Address Masking mode enable><0>
<SETTING_VALUE_TYPE><MSK7><7-Bit Address Masking mode enable><8>
<PART_INFO_TYPE><c660><PIC18F86J60><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVR><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLKO function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><f8><0>
<CONFIGREG_INFO_TYPE><fffd><0><f7><3>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode (80-pin and 100-pin devices) or with RB3 in Extended Microcontroller mode (100-pin devices only)><0>
<SETTING_VALUE_TYPE><ON><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><OFF><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><ON><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<SWITCH_INFO_TYPE><ETHLED><Ethernet LED Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><RA0/RA1 function as I/O regardless of Ethernet module status><0>
<SETTING_VALUE_TYPE><ON><RA0/RA1 are multiplexed with LEDA/LEDB when Ethernet module is enabled and function as I/O when Ethernet is disabled><4>
<PART_INFO_TYPE><c665><PIC18F86J65><18xxxx><6><1><17ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><17ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVR><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><17ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><17ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLKO function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><17ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><17ffc><0><f8><0>
<CONFIGREG_INFO_TYPE><17ffd><0><f7><3>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode (80-pin and 100-pin devices) or with RB3 in Extended Microcontroller mode (100-pin devices only)><0>
<SETTING_VALUE_TYPE><ON><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><OFF><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><ON><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<SWITCH_INFO_TYPE><ETHLED><Ethernet LED Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><RA0/RA1 function as I/O regardless of Ethernet module status><0>
<SETTING_VALUE_TYPE><ON><RA0/RA1 are multiplexed with LEDA/LEDB when Ethernet module is enabled and function as I/O when Ethernet is disabled><4>
<PART_INFO_TYPE><8672><PIC18F86J72><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><fff8><0><e1><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled-Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<CONFIGREG_INFO_TYPE><fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><Internal oscillator, port function on RA6 and RA7 ><0>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, port function on RA6 and RA7><1>
<SETTING_VALUE_TYPE><INTOSCO><Internal oscillator, CLKOUT on RA6 and port function on RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKOUT on RA6 and port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with clock out on RA6><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL><7>
<SWITCH_INFO_TYPE><T1DIG><Secondary Clock Source T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator configured for low-power operation><0>
<SETTING_VALUE_TYPE><OFF><Timer1 oscillator configured for higher power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><2><1>
<SWITCH_INFO_TYPE><RTCSOSC><RTCC Reference Clock Select bit><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTOSC/INTRC as reference clock><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI as reference clock><2>
<CONFIGREG_INFO_TYPE><fffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><RE7 <Microcontroller> / RB3><0>
<SETTING_VALUE_TYPE><DEFAULT><RC1><1>
<PART_INFO_TYPE><8690><PIC18F86J90><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled-Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<CONFIGREG_INFO_TYPE><fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><Internal oscillator, port function on RA6 and RA7 ><0>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, port function on RA6 and RA7><1>
<SETTING_VALUE_TYPE><INTOSCO><Internal oscillator, CLKOUT on RA6 and port function on RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKOUT on RA6 and port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with clock out on RA6><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL><7>
<SWITCH_INFO_TYPE><T1DIG><Secondary Clock Source T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator configured for low-power operation><0>
<SETTING_VALUE_TYPE><OFF><Timer1 oscillator configured for higher power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><f2><1>
<SWITCH_INFO_TYPE><RTCSOSC><RTCC Reference Clock Select bit><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTOSC/INTRC as reference clock><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI as reference clock><2>
<CONFIGREG_INFO_TYPE><fffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><RC1><1>
<PART_INFO_TYPE><8693><PIC18F86J93><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><fff8><0><e1><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled-Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<CONFIGREG_INFO_TYPE><fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><Internal oscillator, port function on RA6 and RA7 ><0>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, port function on RA6 and RA7><1>
<SETTING_VALUE_TYPE><INTOSCO><Internal oscillator, CLKOUT on RA6 and port function on RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKOUT on RA6 and port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with clock out on RA6><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL><7>
<SWITCH_INFO_TYPE><T1DIG><Secondary Clock Source T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator configured for low-power operation><0>
<SETTING_VALUE_TYPE><OFF><Timer1 oscillator configured for higher power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><f2><1>
<SWITCH_INFO_TYPE><RTCSOSC><RTCC Reference Clock Select bit><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTOSC/INTRC as reference clock><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI as reference clock><2>
<CONFIGREG_INFO_TYPE><fffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><RC1><1>
<PART_INFO_TYPE><8694><PIC18F86J94><18xxxx><6><1><ffef><10><ff><0><0-5f><f60-fff><0><10>
<CONFIGREG_INFO_TYPE><fff0><0><e0><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><fff1><0><f7><3>
<SWITCH_INFO_TYPE><BOREN><Brown-Out Reset Enable><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit, disabled in Deep Sleep><1>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><2><2>
<SETTING_VALUE_TYPE><0><2.0V><0>
<SETTING_VALUE_TYPE><1><1.8V><2>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fff2><0><af><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><FRC><Fast RC Oscillator (FRC)><0>
<SETTING_VALUE_TYPE><FRCPLL><Fast RC Oscillator with PLL module (FRCPLL)><1>
<SETTING_VALUE_TYPE><PRI><Primary Oscillator (XT, HS, EC)><2>
<SETTING_VALUE_TYPE><PRIPLL><Primary Oscillator with PLL module (XTPLL,HSPLL,ECPLL)><3>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator (SOSC)><4>
<SETTING_VALUE_TYPE><LPRC><Low-Power RC Oscillator (LPRC)><5>
<SETTING_VALUE_TYPE><FRC500KHZ><Fast RC Oscillator divided by 16 (500 kHz)><6>
<SETTING_VALUE_TYPE><FRCDIV><Fast RC Oscillator with Postscaler (FRCDIV)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><8><2>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SWITCH_INFO_TYPE><CLKOEN><Clock Out Enable Bit><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fff3><0><ff><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Frequency Multiplier Select bits><f><10>
<SETTING_VALUE_TYPE><NODIV><96 MHz PLL selected; No divide - Oscillator used directly (4 MHz input)><0>
<SETTING_VALUE_TYPE><DIV2><96 MHz PLL selected; Oscillator divided by 2 (8 MHz input)><1>
<SETTING_VALUE_TYPE><DIV3><96 MHz PLL selected; Oscillator divided by 3 (12 MHz input)><2>
<SETTING_VALUE_TYPE><DIV4><96 MHz PLL selected; Oscillator divided by 4 (16 MHz input)><3>
<SETTING_VALUE_TYPE><DIV5><96 MHz PLL selected; Oscillator divided by 5 (20 MHz input)><4>
<SETTING_VALUE_TYPE><DIV6><96 MHz PLL selected; Oscillator divided by 6 (24 MHz input)><5>
<SETTING_VALUE_TYPE><DIV10><96 MHz PLL selected; Oscillator divided by 10 (40 MHz input)><6>
<SETTING_VALUE_TYPE><DIV12><96 MHz PLL selected; Oscillator divided by 12 (48 MHz input)><7>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><8>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><9>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><a>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><b>
<SETTING_VALUE_TYPE><PLL4X><4x PLL selected><c>
<SETTING_VALUE_TYPE><PLL6X><6x PLL selected><d>
<SETTING_VALUE_TYPE><PLL8X><8x PLL selected><e>
<SETTING_VALUE_TYPE><NOPLL><No PLL used - PLLGO bit not available to user><f>
<CONFIGREG_INFO_TYPE><fff4><0><33><2>
<SWITCH_INFO_TYPE><POSCMD><Primary Oscillator Select><3><4>
<SETTING_VALUE_TYPE><EC><External clock mode selected><0>
<SETTING_VALUE_TYPE><MS><MS oscillator mode selected(3.5 MHz -10 MHz)><1>
<SETTING_VALUE_TYPE><HS><HS oscillator mode selected(10 MHz - 40 MHz)><2>
<SETTING_VALUE_TYPE><NONE><Primary oscillator disabled><3>
<SWITCH_INFO_TYPE><FSCM><Clock Switching and Monitor Selection Configuration bits><30><3>
<SETTING_VALUE_TYPE><CSECME><Clock switching is enabled, fail safe clock monitor is enabled><0>
<SETTING_VALUE_TYPE><CSECMD><Clock switching is enabled, fail safe clock monitor is disabled><10>
<SETTING_VALUE_TYPE><CSDCMD><Clock switching is disabled, fail safe clock monitor is disabled><20>
<CONFIGREG_INFO_TYPE><fff5><0><f0><0>
<CONFIGREG_INFO_TYPE><fff6><0><ff><1>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Boundary><ff><100>
<SETTING_VALUE_TYPE><WPFP0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><WPFP1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><WPFP2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><WPFP3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><WPFP4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><WPFP5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><WPFP6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><WPFP7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><WPFP8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><WPFP9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><WPFP10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><WPFP11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><WPFP12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><WPFP13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><WPFP14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><WPFP15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><WPFP16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><WPFP17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><WPFP18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><WPFP19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><WPFP20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><WPFP21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><WPFP22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><WPFP23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><WPFP24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><WPFP25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><WPFP26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><WPFP27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><WPFP28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><WPFP29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><WPFP30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><WPFP31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><WPFP32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><WPFP33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><WPFP34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><WPFP35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><WPFP36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><WPFP37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><WPFP38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><WPFP39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><WPFP40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><WPFP41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><WPFP42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><WPFP43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><WPFP44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><WPFP45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><WPFP46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><WPFP47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><WPFP48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><WPFP49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><WPFP50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><WPFP51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><WPFP52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><WPFP53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><WPFP54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><WPFP55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><WPFP56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><WPFP57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><WPFP58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><WPFP59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><WPFP60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><WPFP61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><WPFP62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><WPFP63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><WPFP64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><WPFP65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><WPFP66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><WPFP67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><WPFP68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><WPFP69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><WPFP70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><WPFP71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><WPFP72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><WPFP73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><WPFP74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><WPFP75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><WPFP76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><WPFP77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><WPFP78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><WPFP79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><WPFP80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><WPFP81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><WPFP82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><WPFP83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><WPFP84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><WPFP85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><WPFP86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><WPFP87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><WPFP88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><WPFP89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><WPFP90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><WPFP91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><WPFP92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><WPFP93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><WPFP94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><WPFP95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><WPFP96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><WPFP97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><WPFP98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><WPFP99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><WPFP100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><WPFP101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><WPFP102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><WPFP103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><WPFP104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><WPFP105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><WPFP106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><WPFP107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><WPFP108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><WPFP109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><WPFP110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><WPFP111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><WPFP112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><WPFP113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><WPFP114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><WPFP115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><WPFP116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><WPFP117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><WPFP118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><WPFP119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><WPFP120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><WPFP121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><WPFP122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><WPFP123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><WPFP124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><WPFP125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><WPFP126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><WPFP127><Write Protect Program Flash Page 127><7f>
<SETTING_VALUE_TYPE><WPFP128><Write Protect Program Flash Page 128><80>
<SETTING_VALUE_TYPE><WPFP129><Write Protect Program Flash Page 129><81>
<SETTING_VALUE_TYPE><WPFP130><Write Protect Program Flash Page 130><82>
<SETTING_VALUE_TYPE><WPFP131><Write Protect Program Flash Page 131><83>
<SETTING_VALUE_TYPE><WPFP132><Write Protect Program Flash Page 132><84>
<SETTING_VALUE_TYPE><WPFP133><Write Protect Program Flash Page 133><85>
<SETTING_VALUE_TYPE><WPFP134><Write Protect Program Flash Page 134><86>
<SETTING_VALUE_TYPE><WPFP135><Write Protect Program Flash Page 135><87>
<SETTING_VALUE_TYPE><WPFP136><Write Protect Program Flash Page 136><88>
<SETTING_VALUE_TYPE><WPFP137><Write Protect Program Flash Page 137><89>
<SETTING_VALUE_TYPE><WPFP138><Write Protect Program Flash Page 138><8a>
<SETTING_VALUE_TYPE><WPFP139><Write Protect Program Flash Page 139><8b>
<SETTING_VALUE_TYPE><WPFP140><Write Protect Program Flash Page 140><8c>
<SETTING_VALUE_TYPE><WPFP141><Write Protect Program Flash Page 141><8d>
<SETTING_VALUE_TYPE><WPFP142><Write Protect Program Flash Page 142><8e>
<SETTING_VALUE_TYPE><WPFP143><Write Protect Program Flash Page 143><8f>
<SETTING_VALUE_TYPE><WPFP144><Write Protect Program Flash Page 144><90>
<SETTING_VALUE_TYPE><WPFP145><Write Protect Program Flash Page 145><91>
<SETTING_VALUE_TYPE><WPFP146><Write Protect Program Flash Page 146><92>
<SETTING_VALUE_TYPE><WPFP147><Write Protect Program Flash Page 147><93>
<SETTING_VALUE_TYPE><WPFP148><Write Protect Program Flash Page 148><94>
<SETTING_VALUE_TYPE><WPFP149><Write Protect Program Flash Page 149><95>
<SETTING_VALUE_TYPE><WPFP150><Write Protect Program Flash Page 150><96>
<SETTING_VALUE_TYPE><WPFP151><Write Protect Program Flash Page 151><97>
<SETTING_VALUE_TYPE><WPFP152><Write Protect Program Flash Page 152><98>
<SETTING_VALUE_TYPE><WPFP153><Write Protect Program Flash Page 153><99>
<SETTING_VALUE_TYPE><WPFP154><Write Protect Program Flash Page 154><9a>
<SETTING_VALUE_TYPE><WPFP155><Write Protect Program Flash Page 155><9b>
<SETTING_VALUE_TYPE><WPFP156><Write Protect Program Flash Page 156><9c>
<SETTING_VALUE_TYPE><WPFP157><Write Protect Program Flash Page 157><9d>
<SETTING_VALUE_TYPE><WPFP158><Write Protect Program Flash Page 158><9e>
<SETTING_VALUE_TYPE><WPFP159><Write Protect Program Flash Page 159><9f>
<SETTING_VALUE_TYPE><WPFP160><Write Protect Program Flash Page 160><a0>
<SETTING_VALUE_TYPE><WPFP161><Write Protect Program Flash Page 161><a1>
<SETTING_VALUE_TYPE><WPFP162><Write Protect Program Flash Page 162><a2>
<SETTING_VALUE_TYPE><WPFP163><Write Protect Program Flash Page 163><a3>
<SETTING_VALUE_TYPE><WPFP164><Write Protect Program Flash Page 164><a4>
<SETTING_VALUE_TYPE><WPFP165><Write Protect Program Flash Page 165><a5>
<SETTING_VALUE_TYPE><WPFP166><Write Protect Program Flash Page 166><a6>
<SETTING_VALUE_TYPE><WPFP167><Write Protect Program Flash Page 167><a7>
<SETTING_VALUE_TYPE><WPFP168><Write Protect Program Flash Page 168><a8>
<SETTING_VALUE_TYPE><WPFP169><Write Protect Program Flash Page 169><a9>
<SETTING_VALUE_TYPE><WPFP170><Write Protect Program Flash Page 170><aa>
<SETTING_VALUE_TYPE><WPFP171><Write Protect Program Flash Page 171><ab>
<SETTING_VALUE_TYPE><WPFP172><Write Protect Program Flash Page 172><ac>
<SETTING_VALUE_TYPE><WPFP173><Write Protect Program Flash Page 173><ad>
<SETTING_VALUE_TYPE><WPFP174><Write Protect Program Flash Page 174><ae>
<SETTING_VALUE_TYPE><WPFP175><Write Protect Program Flash Page 175><af>
<SETTING_VALUE_TYPE><WPFP176><Write Protect Program Flash Page 176><b0>
<SETTING_VALUE_TYPE><WPFP177><Write Protect Program Flash Page 177><b1>
<SETTING_VALUE_TYPE><WPFP178><Write Protect Program Flash Page 178><b2>
<SETTING_VALUE_TYPE><WPFP179><Write Protect Program Flash Page 179><b3>
<SETTING_VALUE_TYPE><WPFP180><Write Protect Program Flash Page 180><b4>
<SETTING_VALUE_TYPE><WPFP181><Write Protect Program Flash Page 181><b5>
<SETTING_VALUE_TYPE><WPFP182><Write Protect Program Flash Page 182><b6>
<SETTING_VALUE_TYPE><WPFP183><Write Protect Program Flash Page 183><b7>
<SETTING_VALUE_TYPE><WPFP184><Write Protect Program Flash Page 184><b8>
<SETTING_VALUE_TYPE><WPFP185><Write Protect Program Flash Page 185><b9>
<SETTING_VALUE_TYPE><WPFP186><Write Protect Program Flash Page 186><ba>
<SETTING_VALUE_TYPE><WPFP187><Write Protect Program Flash Page 187><bb>
<SETTING_VALUE_TYPE><WPFP188><Write Protect Program Flash Page 188><bc>
<SETTING_VALUE_TYPE><WPFP189><Write Protect Program Flash Page 189><bd>
<SETTING_VALUE_TYPE><WPFP190><Write Protect Program Flash Page 190><be>
<SETTING_VALUE_TYPE><WPFP191><Write Protect Program Flash Page 191><bf>
<SETTING_VALUE_TYPE><WPFP192><Write Protect Program Flash Page 192><c0>
<SETTING_VALUE_TYPE><WPFP193><Write Protect Program Flash Page 193><c1>
<SETTING_VALUE_TYPE><WPFP194><Write Protect Program Flash Page 194><c2>
<SETTING_VALUE_TYPE><WPFP195><Write Protect Program Flash Page 195><c3>
<SETTING_VALUE_TYPE><WPFP196><Write Protect Program Flash Page 196><c4>
<SETTING_VALUE_TYPE><WPFP197><Write Protect Program Flash Page 197><c5>
<SETTING_VALUE_TYPE><WPFP198><Write Protect Program Flash Page 198><c6>
<SETTING_VALUE_TYPE><WPFP199><Write Protect Program Flash Page 199><c7>
<SETTING_VALUE_TYPE><WPFP200><Write Protect Program Flash Page 200><c8>
<SETTING_VALUE_TYPE><WPFP201><Write Protect Program Flash Page 201><c9>
<SETTING_VALUE_TYPE><WPFP202><Write Protect Program Flash Page 202><ca>
<SETTING_VALUE_TYPE><WPFP203><Write Protect Program Flash Page 203><cb>
<SETTING_VALUE_TYPE><WPFP204><Write Protect Program Flash Page 204><cc>
<SETTING_VALUE_TYPE><WPFP205><Write Protect Program Flash Page 205><cd>
<SETTING_VALUE_TYPE><WPFP206><Write Protect Program Flash Page 206><ce>
<SETTING_VALUE_TYPE><WPFP207><Write Protect Program Flash Page 207><cf>
<SETTING_VALUE_TYPE><WPFP208><Write Protect Program Flash Page 208><d0>
<SETTING_VALUE_TYPE><WPFP209><Write Protect Program Flash Page 209><d1>
<SETTING_VALUE_TYPE><WPFP210><Write Protect Program Flash Page 210><d2>
<SETTING_VALUE_TYPE><WPFP211><Write Protect Program Flash Page 211><d3>
<SETTING_VALUE_TYPE><WPFP212><Write Protect Program Flash Page 212><d4>
<SETTING_VALUE_TYPE><WPFP213><Write Protect Program Flash Page 213><d5>
<SETTING_VALUE_TYPE><WPFP214><Write Protect Program Flash Page 214><d6>
<SETTING_VALUE_TYPE><WPFP215><Write Protect Program Flash Page 215><d7>
<SETTING_VALUE_TYPE><WPFP216><Write Protect Program Flash Page 216><d8>
<SETTING_VALUE_TYPE><WPFP217><Write Protect Program Flash Page 217><d9>
<SETTING_VALUE_TYPE><WPFP218><Write Protect Program Flash Page 218><da>
<SETTING_VALUE_TYPE><WPFP219><Write Protect Program Flash Page 219><db>
<SETTING_VALUE_TYPE><WPFP220><Write Protect Program Flash Page 220><dc>
<SETTING_VALUE_TYPE><WPFP221><Write Protect Program Flash Page 221><dd>
<SETTING_VALUE_TYPE><WPFP222><Write Protect Program Flash Page 222><de>
<SETTING_VALUE_TYPE><WPFP223><Write Protect Program Flash Page 223><df>
<SETTING_VALUE_TYPE><WPFP224><Write Protect Program Flash Page 224><e0>
<SETTING_VALUE_TYPE><WPFP225><Write Protect Program Flash Page 225><e1>
<SETTING_VALUE_TYPE><WPFP226><Write Protect Program Flash Page 226><e2>
<SETTING_VALUE_TYPE><WPFP227><Write Protect Program Flash Page 227><e3>
<SETTING_VALUE_TYPE><WPFP228><Write Protect Program Flash Page 228><e4>
<SETTING_VALUE_TYPE><WPFP229><Write Protect Program Flash Page 229><e5>
<SETTING_VALUE_TYPE><WPFP230><Write Protect Program Flash Page 230><e6>
<SETTING_VALUE_TYPE><WPFP231><Write Protect Program Flash Page 231><e7>
<SETTING_VALUE_TYPE><WPFP232><Write Protect Program Flash Page 232><e8>
<SETTING_VALUE_TYPE><WPFP233><Write Protect Program Flash Page 233><e9>
<SETTING_VALUE_TYPE><WPFP234><Write Protect Program Flash Page 234><ea>
<SETTING_VALUE_TYPE><WPFP235><Write Protect Program Flash Page 235><eb>
<SETTING_VALUE_TYPE><WPFP236><Write Protect Program Flash Page 236><ec>
<SETTING_VALUE_TYPE><WPFP237><Write Protect Program Flash Page 237><ed>
<SETTING_VALUE_TYPE><WPFP238><Write Protect Program Flash Page 238><ee>
<SETTING_VALUE_TYPE><WPFP239><Write Protect Program Flash Page 239><ef>
<SETTING_VALUE_TYPE><WPFP240><Write Protect Program Flash Page 240><f0>
<SETTING_VALUE_TYPE><WPFP241><Write Protect Program Flash Page 241><f1>
<SETTING_VALUE_TYPE><WPFP242><Write Protect Program Flash Page 242><f2>
<SETTING_VALUE_TYPE><WPFP243><Write Protect Program Flash Page 243><f3>
<SETTING_VALUE_TYPE><WPFP244><Write Protect Program Flash Page 244><f4>
<SETTING_VALUE_TYPE><WPFP245><Write Protect Program Flash Page 245><f5>
<SETTING_VALUE_TYPE><WPFP246><Write Protect Program Flash Page 246><f6>
<SETTING_VALUE_TYPE><WPFP247><Write Protect Program Flash Page 247><f7>
<SETTING_VALUE_TYPE><WPFP248><Write Protect Program Flash Page 248><f8>
<SETTING_VALUE_TYPE><WPFP249><Write Protect Program Flash Page 249><f9>
<SETTING_VALUE_TYPE><WPFP250><Write Protect Program Flash Page 250><fa>
<SETTING_VALUE_TYPE><WPFP251><Write Protect Program Flash Page 251><fb>
<SETTING_VALUE_TYPE><WPFP252><Write Protect Program Flash Page 252><fc>
<SETTING_VALUE_TYPE><WPFP253><Write Protect Program Flash Page 253><fd>
<SETTING_VALUE_TYPE><WPFP254><Write Protect Program Flash Page 254><fe>
<SETTING_VALUE_TYPE><WPFP255><Write Protect Program Flash Page 255><ff>
<CONFIGREG_INFO_TYPE><fff7><0><f7><3>
<SWITCH_INFO_TYPE><WPDIS><Segment Write Protection Disable><1><2>
<SETTING_VALUE_TYPE><WPEN><Enabled><0>
<SETTING_VALUE_TYPE><WPDIS><Disabled><1>
<SWITCH_INFO_TYPE><WPEND><Segment Write Protection End Page Select><2><2>
<SETTING_VALUE_TYPE><WPSTARTMEM><write Protect from page 0 to WPFP><0>
<SETTING_VALUE_TYPE><WPENDMEM><Write Protect from WPFP to the last page of memory><2>
<SWITCH_INFO_TYPE><WPCFG><Write Protect Configuration Page Select><4><2>
<SETTING_VALUE_TYPE><WPCFGEN><Enabled><0>
<SETTING_VALUE_TYPE><WPCFGDIS><Disabled><4>
<CONFIGREG_INFO_TYPE><fff8><0><fb><6>
<SWITCH_INFO_TYPE><T5GSEL><TMR5 Gate Select bit><1><2>
<SETTING_VALUE_TYPE><T3G><TMR5 Gate is driven by the T3G input><0>
<SETTING_VALUE_TYPE><T5G><TMR5 Gate is driven by the T5G input><1>
<SWITCH_INFO_TYPE><CINASEL><CxINA Gate Select bit><2><2>
<SETTING_VALUE_TYPE><RA5><C1INA and C3INA are all re-mapped to pin RA5><0>
<SETTING_VALUE_TYPE><DEFAULT><C1INA and C3INA are on their default pin locations><2>
<SWITCH_INFO_TYPE><EASHFT><External Address Shift bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address Shifting disabled><0>
<SETTING_VALUE_TYPE><ON><Address Shifting enabled><8>
<SWITCH_INFO_TYPE><ABW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><XM20><20-bit address bus><0>
<SETTING_VALUE_TYPE><XM16><16-bit address bus><10>
<SETTING_VALUE_TYPE><XM12><12-bit address bus><20>
<SETTING_VALUE_TYPE><MM><8-bit address bus><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><fff9><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><the IOLOCK bit can be set and cleared using the unlock sequence><0>
<SETTING_VALUE_TYPE><ON><Once set, the IOLOCK bit cannot be cleared><1>
<SWITCH_INFO_TYPE><LS48MHZ><USB Low Speed Clock Select bit><2><2>
<SETTING_VALUE_TYPE><SYSX1><Divide-by-1 (System clock must be 6 MHz)><0>
<SETTING_VALUE_TYPE><SYSX2><Divide-by-2 (System clock must be 12 MHz)><2>
<SWITCH_INFO_TYPE><MSSPMSK2><MSSP2 7-Bit Address Masking Mode Enable bit><4><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><4>
<SWITCH_INFO_TYPE><MSSPMSK1><MSSP1 7-Bit Address Masking Mode Enable bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffa><0><ff><3>
<SWITCH_INFO_TYPE><WDTWIN><Watch Dog Timer Window><3><4>
<SETTING_VALUE_TYPE><PS75_0><Watch Dog Timer Window Width is 75 percent><0>
<SETTING_VALUE_TYPE><PS50_0><Watch Dog Timer Window Width is 50 percent><1>
<SETTING_VALUE_TYPE><PS37_5><Watch Dog Timer Window Width is 37.5 percent><2>
<SETTING_VALUE_TYPE><PS25_0><Watch Dog Timer Window Width is 25 percent><3>
<SWITCH_INFO_TYPE><WDTCLK><Watch Dog Timer Clock Source><c><4>
<SETTING_VALUE_TYPE><SYS><Use FOSC/4 when system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><0>
<SETTING_VALUE_TYPE><SOSC><Always use SOSC><4>
<SETTING_VALUE_TYPE><LPRC><Always use INTOSC/LPRC><8>
<SETTING_VALUE_TYPE><FRC><Use FRC when WINDIS = 0, system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><c>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale><f0><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><10>
<SETTING_VALUE_TYPE><4><1:4><20>
<SETTING_VALUE_TYPE><8><1:8><30>
<SETTING_VALUE_TYPE><16><1:16><40>
<SETTING_VALUE_TYPE><32><1:32><50>
<SETTING_VALUE_TYPE><64><1:64><60>
<SETTING_VALUE_TYPE><128><1:128><70>
<SETTING_VALUE_TYPE><256><1:256><80>
<SETTING_VALUE_TYPE><512><1:512><90>
<SETTING_VALUE_TYPE><1024><1:1024><a0>
<SETTING_VALUE_TYPE><2048><1:2048><b0>
<SETTING_VALUE_TYPE><4096><1:4096><c0>
<SETTING_VALUE_TYPE><8192><1:8192><d0>
<SETTING_VALUE_TYPE><16384><1:16384><e0>
<SETTING_VALUE_TYPE><32768><1:32768><f0>
<CONFIGREG_INFO_TYPE><fffb><0><ff><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WINDIS><Windowed Watchdog Timer Disable><4><2>
<SETTING_VALUE_TYPE><WDTWIN><Windowed WDT enabled><0>
<SETTING_VALUE_TYPE><WDTSTD><Standard WDT selected; windowed WDT disabled><4>
<SWITCH_INFO_TYPE><WPSA><WDT Prescaler><8><2>
<SETTING_VALUE_TYPE><32><WDT prescaler ratio of 1:32><0>
<SETTING_VALUE_TYPE><128><WDT prescaler ratio of 1:128><8>
<CONFIGREG_INFO_TYPE><fffc><0><1d><4>
<SWITCH_INFO_TYPE><RETEN><Retention Voltage Regulator Control Enable><1><2>
<SETTING_VALUE_TYPE><ON><Retention controlled by SRETEN during Sleep><0>
<SETTING_VALUE_TYPE><OFF><Retention not available><1>
<SWITCH_INFO_TYPE><VBTBOR><VBAT BOR Enable><4><2>
<SETTING_VALUE_TYPE><OFF><VBAT BOR is disabled><0>
<SETTING_VALUE_TYPE><ON><VBAT BOR is enabled><4>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR Enable><8><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled in Deep Sleep (does not affect operation in non-Deep Sleep modes)><0>
<SETTING_VALUE_TYPE><ON><BOR enabled in Deep Sleep><8>
<SWITCH_INFO_TYPE><DSBITEN><DSEN Bit Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Deep Sleep operation is always disabled><0>
<SETTING_VALUE_TYPE><ON><Deep Sleep is controlled by the register bit DSEN><10>
<CONFIGREG_INFO_TYPE><fffd><0><f0><0>
<CONFIGREG_INFO_TYPE><fffe><0><f8><1>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Timer Postscale Select><f8><20>
<SETTING_VALUE_TYPE><DSWDTPS0><1:32 (1 mS)><0>
<SETTING_VALUE_TYPE><DSWDTPS1><1:64 (2.1 mS)><8>
<SETTING_VALUE_TYPE><DSWDTPS2><1:128 (4.1 mS)><10>
<SETTING_VALUE_TYPE><DSWDTPS3><1: 256 (8.3 mS)><18>
<SETTING_VALUE_TYPE><DSWDTPS4><1:512 (16.5 mS)><20>
<SETTING_VALUE_TYPE><DSWDTPS5><1:1024 (33 mS)><28>
<SETTING_VALUE_TYPE><DSWDTPS6><1:2048 (66.1 mS)><30>
<SETTING_VALUE_TYPE><DSWDTPS7><1:4096 (132.1 mS)><38>
<SETTING_VALUE_TYPE><DSWDTPS8><1:8192 (264.3 mS)><40>
<SETTING_VALUE_TYPE><DSWDTPS9><1:16384 (528.5 mS)><48>
<SETTING_VALUE_TYPE><DSWDTPSA><1:32768 (1.057 Secs)><50>
<SETTING_VALUE_TYPE><DSWDTPSB><1:65536 (2.114 Secs)><58>
<SETTING_VALUE_TYPE><DSWDTPSC><1:131072 (4.228 Secs)><60>
<SETTING_VALUE_TYPE><DSWDTPSD><1:262114 (8.456 Secs)><68>
<SETTING_VALUE_TYPE><DSWDTPSE><1:524288 (16.912 Secs)><70>
<SETTING_VALUE_TYPE><DSWDTPSF><1:1048576 (33.825 Secs)><78>
<SETTING_VALUE_TYPE><DSWDTPS10><1:2097152 (67.7 Secs)><80>
<SETTING_VALUE_TYPE><DSWDTPS11><1:4194304 (135.3 Secs)><88>
<SETTING_VALUE_TYPE><DSWDTPS12><1:8388608 (4.5 Minutes)><90>
<SETTING_VALUE_TYPE><DSWDTPS13><1:16777216 (9 Minutes)><98>
<SETTING_VALUE_TYPE><DSWDTPS14><1:33554432 (18 Minutes)><a0>
<SETTING_VALUE_TYPE><DSWDTPS15><1:67108864 (36.1 Minutes)><a8>
<SETTING_VALUE_TYPE><DSWDTPS16><1:134217728 (72.2 Minutes)><b0>
<SETTING_VALUE_TYPE><DSWDTPS17><1:268435456 (2.4 Hours)><b8>
<SETTING_VALUE_TYPE><DSWDTPS18><1:536870912 (4.8 Hours)><c0>
<SETTING_VALUE_TYPE><DSWDTPS19><1:1073741824 (9.6 Hours)><c8>
<SETTING_VALUE_TYPE><DSWDTPS1A><1:2147483648 (19.2 Hours)><d0>
<SETTING_VALUE_TYPE><DSWDTPS1B><1:4294967296 (38.5 Hours)><d8>
<SETTING_VALUE_TYPE><DSWDTPS1C><1:8589934592 (77 Hours)><e0>
<SETTING_VALUE_TYPE><DSWDTPS1D><1:17179869184 (6.4 Days)><e8>
<SETTING_VALUE_TYPE><DSWDTPS1E><1:34359738368 (12.8  Days)><f0>
<SETTING_VALUE_TYPE><DSWDTPS1F><1:68719476736 (25.7 Days)><f8>
<CONFIGREG_INFO_TYPE><ffff><0><f3><2>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer Enable><1><2>
<SETTING_VALUE_TYPE><OFF><DSWDT Disabled><0>
<SETTING_VALUE_TYPE><ON><DSWDT Enabled><1>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Reference Clock Select><2><2>
<SETTING_VALUE_TYPE><SOSC><DSWDT uses SOSC as reference clock><0>
<SETTING_VALUE_TYPE><LPRC><DSWDT uses LPRC as reference clock><2>
<PART_INFO_TYPE><8699><PIC18F86J99><18xxxx><6><1><17fef><10><ff><0><0-5f><f60-fff><0><10>
<CONFIGREG_INFO_TYPE><17ff0><0><e0><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><17ff1><0><f7><3>
<SWITCH_INFO_TYPE><BOREN><Brown-Out Reset Enable><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit, disabled in Deep Sleep><1>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><2><2>
<SETTING_VALUE_TYPE><0><2.0V><0>
<SETTING_VALUE_TYPE><1><1.8V><2>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><17ff2><0><af><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><FRC><Fast RC Oscillator (FRC)><0>
<SETTING_VALUE_TYPE><FRCPLL><Fast RC Oscillator with PLL module (FRCPLL)><1>
<SETTING_VALUE_TYPE><PRI><Primary Oscillator (XT, HS, EC)><2>
<SETTING_VALUE_TYPE><PRIPLL><Primary Oscillator with PLL module (XTPLL,HSPLL,ECPLL)><3>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator (SOSC)><4>
<SETTING_VALUE_TYPE><LPRC><Low-Power RC Oscillator (LPRC)><5>
<SETTING_VALUE_TYPE><FRC500KHZ><Fast RC Oscillator divided by 16 (500 kHz)><6>
<SETTING_VALUE_TYPE><FRCDIV><Fast RC Oscillator with Postscaler (FRCDIV)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><8><2>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SWITCH_INFO_TYPE><CLKOEN><Clock Out Enable Bit><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><17ff3><0><ff><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Frequency Multiplier Select bits><f><10>
<SETTING_VALUE_TYPE><NODIV><96 MHz PLL selected; No divide - Oscillator used directly (4 MHz input)><0>
<SETTING_VALUE_TYPE><DIV2><96 MHz PLL selected; Oscillator divided by 2 (8 MHz input)><1>
<SETTING_VALUE_TYPE><DIV3><96 MHz PLL selected; Oscillator divided by 3 (12 MHz input)><2>
<SETTING_VALUE_TYPE><DIV4><96 MHz PLL selected; Oscillator divided by 4 (16 MHz input)><3>
<SETTING_VALUE_TYPE><DIV5><96 MHz PLL selected; Oscillator divided by 5 (20 MHz input)><4>
<SETTING_VALUE_TYPE><DIV6><96 MHz PLL selected; Oscillator divided by 6 (24 MHz input)><5>
<SETTING_VALUE_TYPE><DIV10><96 MHz PLL selected; Oscillator divided by 10 (40 MHz input)><6>
<SETTING_VALUE_TYPE><DIV12><96 MHz PLL selected; Oscillator divided by 12 (48 MHz input)><7>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><8>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><9>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><a>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><b>
<SETTING_VALUE_TYPE><PLL4X><4x PLL selected><c>
<SETTING_VALUE_TYPE><PLL6X><6x PLL selected><d>
<SETTING_VALUE_TYPE><PLL8X><8x PLL selected><e>
<SETTING_VALUE_TYPE><NOPLL><No PLL used - PLLGO bit not available to user><f>
<CONFIGREG_INFO_TYPE><17ff4><0><33><2>
<SWITCH_INFO_TYPE><POSCMD><Primary Oscillator Select><3><4>
<SETTING_VALUE_TYPE><EC><External clock mode selected><0>
<SETTING_VALUE_TYPE><MS><MS oscillator mode selected(3.5 MHz -10 MHz)><1>
<SETTING_VALUE_TYPE><HS><HS oscillator mode selected(10 MHz - 40 MHz)><2>
<SETTING_VALUE_TYPE><NONE><Primary oscillator disabled><3>
<SWITCH_INFO_TYPE><FSCM><Clock Switching and Monitor Selection Configuration bits><30><3>
<SETTING_VALUE_TYPE><CSECME><Clock switching is enabled, fail safe clock monitor is enabled><0>
<SETTING_VALUE_TYPE><CSECMD><Clock switching is enabled, fail safe clock monitor is disabled><10>
<SETTING_VALUE_TYPE><CSDCMD><Clock switching is disabled, fail safe clock monitor is disabled><20>
<CONFIGREG_INFO_TYPE><17ff5><0><f0><0>
<CONFIGREG_INFO_TYPE><17ff6><0><ff><1>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Boundary><ff><100>
<SETTING_VALUE_TYPE><WPFP0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><WPFP1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><WPFP2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><WPFP3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><WPFP4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><WPFP5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><WPFP6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><WPFP7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><WPFP8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><WPFP9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><WPFP10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><WPFP11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><WPFP12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><WPFP13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><WPFP14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><WPFP15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><WPFP16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><WPFP17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><WPFP18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><WPFP19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><WPFP20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><WPFP21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><WPFP22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><WPFP23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><WPFP24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><WPFP25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><WPFP26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><WPFP27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><WPFP28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><WPFP29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><WPFP30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><WPFP31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><WPFP32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><WPFP33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><WPFP34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><WPFP35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><WPFP36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><WPFP37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><WPFP38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><WPFP39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><WPFP40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><WPFP41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><WPFP42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><WPFP43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><WPFP44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><WPFP45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><WPFP46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><WPFP47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><WPFP48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><WPFP49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><WPFP50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><WPFP51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><WPFP52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><WPFP53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><WPFP54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><WPFP55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><WPFP56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><WPFP57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><WPFP58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><WPFP59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><WPFP60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><WPFP61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><WPFP62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><WPFP63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><WPFP64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><WPFP65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><WPFP66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><WPFP67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><WPFP68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><WPFP69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><WPFP70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><WPFP71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><WPFP72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><WPFP73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><WPFP74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><WPFP75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><WPFP76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><WPFP77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><WPFP78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><WPFP79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><WPFP80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><WPFP81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><WPFP82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><WPFP83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><WPFP84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><WPFP85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><WPFP86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><WPFP87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><WPFP88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><WPFP89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><WPFP90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><WPFP91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><WPFP92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><WPFP93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><WPFP94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><WPFP95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><WPFP96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><WPFP97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><WPFP98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><WPFP99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><WPFP100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><WPFP101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><WPFP102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><WPFP103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><WPFP104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><WPFP105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><WPFP106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><WPFP107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><WPFP108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><WPFP109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><WPFP110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><WPFP111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><WPFP112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><WPFP113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><WPFP114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><WPFP115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><WPFP116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><WPFP117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><WPFP118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><WPFP119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><WPFP120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><WPFP121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><WPFP122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><WPFP123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><WPFP124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><WPFP125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><WPFP126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><WPFP127><Write Protect Program Flash Page 127><7f>
<SETTING_VALUE_TYPE><WPFP128><Write Protect Program Flash Page 128><80>
<SETTING_VALUE_TYPE><WPFP129><Write Protect Program Flash Page 129><81>
<SETTING_VALUE_TYPE><WPFP130><Write Protect Program Flash Page 130><82>
<SETTING_VALUE_TYPE><WPFP131><Write Protect Program Flash Page 131><83>
<SETTING_VALUE_TYPE><WPFP132><Write Protect Program Flash Page 132><84>
<SETTING_VALUE_TYPE><WPFP133><Write Protect Program Flash Page 133><85>
<SETTING_VALUE_TYPE><WPFP134><Write Protect Program Flash Page 134><86>
<SETTING_VALUE_TYPE><WPFP135><Write Protect Program Flash Page 135><87>
<SETTING_VALUE_TYPE><WPFP136><Write Protect Program Flash Page 136><88>
<SETTING_VALUE_TYPE><WPFP137><Write Protect Program Flash Page 137><89>
<SETTING_VALUE_TYPE><WPFP138><Write Protect Program Flash Page 138><8a>
<SETTING_VALUE_TYPE><WPFP139><Write Protect Program Flash Page 139><8b>
<SETTING_VALUE_TYPE><WPFP140><Write Protect Program Flash Page 140><8c>
<SETTING_VALUE_TYPE><WPFP141><Write Protect Program Flash Page 141><8d>
<SETTING_VALUE_TYPE><WPFP142><Write Protect Program Flash Page 142><8e>
<SETTING_VALUE_TYPE><WPFP143><Write Protect Program Flash Page 143><8f>
<SETTING_VALUE_TYPE><WPFP144><Write Protect Program Flash Page 144><90>
<SETTING_VALUE_TYPE><WPFP145><Write Protect Program Flash Page 145><91>
<SETTING_VALUE_TYPE><WPFP146><Write Protect Program Flash Page 146><92>
<SETTING_VALUE_TYPE><WPFP147><Write Protect Program Flash Page 147><93>
<SETTING_VALUE_TYPE><WPFP148><Write Protect Program Flash Page 148><94>
<SETTING_VALUE_TYPE><WPFP149><Write Protect Program Flash Page 149><95>
<SETTING_VALUE_TYPE><WPFP150><Write Protect Program Flash Page 150><96>
<SETTING_VALUE_TYPE><WPFP151><Write Protect Program Flash Page 151><97>
<SETTING_VALUE_TYPE><WPFP152><Write Protect Program Flash Page 152><98>
<SETTING_VALUE_TYPE><WPFP153><Write Protect Program Flash Page 153><99>
<SETTING_VALUE_TYPE><WPFP154><Write Protect Program Flash Page 154><9a>
<SETTING_VALUE_TYPE><WPFP155><Write Protect Program Flash Page 155><9b>
<SETTING_VALUE_TYPE><WPFP156><Write Protect Program Flash Page 156><9c>
<SETTING_VALUE_TYPE><WPFP157><Write Protect Program Flash Page 157><9d>
<SETTING_VALUE_TYPE><WPFP158><Write Protect Program Flash Page 158><9e>
<SETTING_VALUE_TYPE><WPFP159><Write Protect Program Flash Page 159><9f>
<SETTING_VALUE_TYPE><WPFP160><Write Protect Program Flash Page 160><a0>
<SETTING_VALUE_TYPE><WPFP161><Write Protect Program Flash Page 161><a1>
<SETTING_VALUE_TYPE><WPFP162><Write Protect Program Flash Page 162><a2>
<SETTING_VALUE_TYPE><WPFP163><Write Protect Program Flash Page 163><a3>
<SETTING_VALUE_TYPE><WPFP164><Write Protect Program Flash Page 164><a4>
<SETTING_VALUE_TYPE><WPFP165><Write Protect Program Flash Page 165><a5>
<SETTING_VALUE_TYPE><WPFP166><Write Protect Program Flash Page 166><a6>
<SETTING_VALUE_TYPE><WPFP167><Write Protect Program Flash Page 167><a7>
<SETTING_VALUE_TYPE><WPFP168><Write Protect Program Flash Page 168><a8>
<SETTING_VALUE_TYPE><WPFP169><Write Protect Program Flash Page 169><a9>
<SETTING_VALUE_TYPE><WPFP170><Write Protect Program Flash Page 170><aa>
<SETTING_VALUE_TYPE><WPFP171><Write Protect Program Flash Page 171><ab>
<SETTING_VALUE_TYPE><WPFP172><Write Protect Program Flash Page 172><ac>
<SETTING_VALUE_TYPE><WPFP173><Write Protect Program Flash Page 173><ad>
<SETTING_VALUE_TYPE><WPFP174><Write Protect Program Flash Page 174><ae>
<SETTING_VALUE_TYPE><WPFP175><Write Protect Program Flash Page 175><af>
<SETTING_VALUE_TYPE><WPFP176><Write Protect Program Flash Page 176><b0>
<SETTING_VALUE_TYPE><WPFP177><Write Protect Program Flash Page 177><b1>
<SETTING_VALUE_TYPE><WPFP178><Write Protect Program Flash Page 178><b2>
<SETTING_VALUE_TYPE><WPFP179><Write Protect Program Flash Page 179><b3>
<SETTING_VALUE_TYPE><WPFP180><Write Protect Program Flash Page 180><b4>
<SETTING_VALUE_TYPE><WPFP181><Write Protect Program Flash Page 181><b5>
<SETTING_VALUE_TYPE><WPFP182><Write Protect Program Flash Page 182><b6>
<SETTING_VALUE_TYPE><WPFP183><Write Protect Program Flash Page 183><b7>
<SETTING_VALUE_TYPE><WPFP184><Write Protect Program Flash Page 184><b8>
<SETTING_VALUE_TYPE><WPFP185><Write Protect Program Flash Page 185><b9>
<SETTING_VALUE_TYPE><WPFP186><Write Protect Program Flash Page 186><ba>
<SETTING_VALUE_TYPE><WPFP187><Write Protect Program Flash Page 187><bb>
<SETTING_VALUE_TYPE><WPFP188><Write Protect Program Flash Page 188><bc>
<SETTING_VALUE_TYPE><WPFP189><Write Protect Program Flash Page 189><bd>
<SETTING_VALUE_TYPE><WPFP190><Write Protect Program Flash Page 190><be>
<SETTING_VALUE_TYPE><WPFP191><Write Protect Program Flash Page 191><bf>
<SETTING_VALUE_TYPE><WPFP192><Write Protect Program Flash Page 192><c0>
<SETTING_VALUE_TYPE><WPFP193><Write Protect Program Flash Page 193><c1>
<SETTING_VALUE_TYPE><WPFP194><Write Protect Program Flash Page 194><c2>
<SETTING_VALUE_TYPE><WPFP195><Write Protect Program Flash Page 195><c3>
<SETTING_VALUE_TYPE><WPFP196><Write Protect Program Flash Page 196><c4>
<SETTING_VALUE_TYPE><WPFP197><Write Protect Program Flash Page 197><c5>
<SETTING_VALUE_TYPE><WPFP198><Write Protect Program Flash Page 198><c6>
<SETTING_VALUE_TYPE><WPFP199><Write Protect Program Flash Page 199><c7>
<SETTING_VALUE_TYPE><WPFP200><Write Protect Program Flash Page 200><c8>
<SETTING_VALUE_TYPE><WPFP201><Write Protect Program Flash Page 201><c9>
<SETTING_VALUE_TYPE><WPFP202><Write Protect Program Flash Page 202><ca>
<SETTING_VALUE_TYPE><WPFP203><Write Protect Program Flash Page 203><cb>
<SETTING_VALUE_TYPE><WPFP204><Write Protect Program Flash Page 204><cc>
<SETTING_VALUE_TYPE><WPFP205><Write Protect Program Flash Page 205><cd>
<SETTING_VALUE_TYPE><WPFP206><Write Protect Program Flash Page 206><ce>
<SETTING_VALUE_TYPE><WPFP207><Write Protect Program Flash Page 207><cf>
<SETTING_VALUE_TYPE><WPFP208><Write Protect Program Flash Page 208><d0>
<SETTING_VALUE_TYPE><WPFP209><Write Protect Program Flash Page 209><d1>
<SETTING_VALUE_TYPE><WPFP210><Write Protect Program Flash Page 210><d2>
<SETTING_VALUE_TYPE><WPFP211><Write Protect Program Flash Page 211><d3>
<SETTING_VALUE_TYPE><WPFP212><Write Protect Program Flash Page 212><d4>
<SETTING_VALUE_TYPE><WPFP213><Write Protect Program Flash Page 213><d5>
<SETTING_VALUE_TYPE><WPFP214><Write Protect Program Flash Page 214><d6>
<SETTING_VALUE_TYPE><WPFP215><Write Protect Program Flash Page 215><d7>
<SETTING_VALUE_TYPE><WPFP216><Write Protect Program Flash Page 216><d8>
<SETTING_VALUE_TYPE><WPFP217><Write Protect Program Flash Page 217><d9>
<SETTING_VALUE_TYPE><WPFP218><Write Protect Program Flash Page 218><da>
<SETTING_VALUE_TYPE><WPFP219><Write Protect Program Flash Page 219><db>
<SETTING_VALUE_TYPE><WPFP220><Write Protect Program Flash Page 220><dc>
<SETTING_VALUE_TYPE><WPFP221><Write Protect Program Flash Page 221><dd>
<SETTING_VALUE_TYPE><WPFP222><Write Protect Program Flash Page 222><de>
<SETTING_VALUE_TYPE><WPFP223><Write Protect Program Flash Page 223><df>
<SETTING_VALUE_TYPE><WPFP224><Write Protect Program Flash Page 224><e0>
<SETTING_VALUE_TYPE><WPFP225><Write Protect Program Flash Page 225><e1>
<SETTING_VALUE_TYPE><WPFP226><Write Protect Program Flash Page 226><e2>
<SETTING_VALUE_TYPE><WPFP227><Write Protect Program Flash Page 227><e3>
<SETTING_VALUE_TYPE><WPFP228><Write Protect Program Flash Page 228><e4>
<SETTING_VALUE_TYPE><WPFP229><Write Protect Program Flash Page 229><e5>
<SETTING_VALUE_TYPE><WPFP230><Write Protect Program Flash Page 230><e6>
<SETTING_VALUE_TYPE><WPFP231><Write Protect Program Flash Page 231><e7>
<SETTING_VALUE_TYPE><WPFP232><Write Protect Program Flash Page 232><e8>
<SETTING_VALUE_TYPE><WPFP233><Write Protect Program Flash Page 233><e9>
<SETTING_VALUE_TYPE><WPFP234><Write Protect Program Flash Page 234><ea>
<SETTING_VALUE_TYPE><WPFP235><Write Protect Program Flash Page 235><eb>
<SETTING_VALUE_TYPE><WPFP236><Write Protect Program Flash Page 236><ec>
<SETTING_VALUE_TYPE><WPFP237><Write Protect Program Flash Page 237><ed>
<SETTING_VALUE_TYPE><WPFP238><Write Protect Program Flash Page 238><ee>
<SETTING_VALUE_TYPE><WPFP239><Write Protect Program Flash Page 239><ef>
<SETTING_VALUE_TYPE><WPFP240><Write Protect Program Flash Page 240><f0>
<SETTING_VALUE_TYPE><WPFP241><Write Protect Program Flash Page 241><f1>
<SETTING_VALUE_TYPE><WPFP242><Write Protect Program Flash Page 242><f2>
<SETTING_VALUE_TYPE><WPFP243><Write Protect Program Flash Page 243><f3>
<SETTING_VALUE_TYPE><WPFP244><Write Protect Program Flash Page 244><f4>
<SETTING_VALUE_TYPE><WPFP245><Write Protect Program Flash Page 245><f5>
<SETTING_VALUE_TYPE><WPFP246><Write Protect Program Flash Page 246><f6>
<SETTING_VALUE_TYPE><WPFP247><Write Protect Program Flash Page 247><f7>
<SETTING_VALUE_TYPE><WPFP248><Write Protect Program Flash Page 248><f8>
<SETTING_VALUE_TYPE><WPFP249><Write Protect Program Flash Page 249><f9>
<SETTING_VALUE_TYPE><WPFP250><Write Protect Program Flash Page 250><fa>
<SETTING_VALUE_TYPE><WPFP251><Write Protect Program Flash Page 251><fb>
<SETTING_VALUE_TYPE><WPFP252><Write Protect Program Flash Page 252><fc>
<SETTING_VALUE_TYPE><WPFP253><Write Protect Program Flash Page 253><fd>
<SETTING_VALUE_TYPE><WPFP254><Write Protect Program Flash Page 254><fe>
<SETTING_VALUE_TYPE><WPFP255><Write Protect Program Flash Page 255><ff>
<CONFIGREG_INFO_TYPE><17ff7><0><f7><3>
<SWITCH_INFO_TYPE><WPDIS><Segment Write Protection Disable><1><2>
<SETTING_VALUE_TYPE><WPEN><Enabled><0>
<SETTING_VALUE_TYPE><WPDIS><Disabled><1>
<SWITCH_INFO_TYPE><WPEND><Segment Write Protection End Page Select><2><2>
<SETTING_VALUE_TYPE><WPSTARTMEM><write Protect from page 0 to WPFP><0>
<SETTING_VALUE_TYPE><WPENDMEM><Write Protect from WPFP to the last page of memory><2>
<SWITCH_INFO_TYPE><WPCFG><Write Protect Configuration Page Select><4><2>
<SETTING_VALUE_TYPE><WPCFGEN><Enabled><0>
<SETTING_VALUE_TYPE><WPCFGDIS><Disabled><4>
<CONFIGREG_INFO_TYPE><17ff8><0><fb><6>
<SWITCH_INFO_TYPE><T5GSEL><TMR5 Gate Select bit><1><2>
<SETTING_VALUE_TYPE><T3G><TMR5 Gate is driven by the T3G input><0>
<SETTING_VALUE_TYPE><T5G><TMR5 Gate is driven by the T5G input><1>
<SWITCH_INFO_TYPE><CINASEL><CxINA Gate Select bit><2><2>
<SETTING_VALUE_TYPE><RA5><C1INA and C3INA are all re-mapped to pin RA5><0>
<SETTING_VALUE_TYPE><DEFAULT><C1INA and C3INA are on their default pin locations><2>
<SWITCH_INFO_TYPE><EASHFT><External Address Shift bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address Shifting disabled><0>
<SETTING_VALUE_TYPE><ON><Address Shifting enabled><8>
<SWITCH_INFO_TYPE><ABW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><XM20><20-bit address bus><0>
<SETTING_VALUE_TYPE><XM16><16-bit address bus><10>
<SETTING_VALUE_TYPE><XM12><12-bit address bus><20>
<SETTING_VALUE_TYPE><MM><8-bit address bus><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><17ff9><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><the IOLOCK bit can be set and cleared using the unlock sequence><0>
<SETTING_VALUE_TYPE><ON><Once set, the IOLOCK bit cannot be cleared><1>
<SWITCH_INFO_TYPE><LS48MHZ><USB Low Speed Clock Select bit><2><2>
<SETTING_VALUE_TYPE><SYSX1><Divide-by-1 (System clock must be 6 MHz)><0>
<SETTING_VALUE_TYPE><SYSX2><Divide-by-2 (System clock must be 12 MHz)><2>
<SWITCH_INFO_TYPE><MSSPMSK2><MSSP2 7-Bit Address Masking Mode Enable bit><4><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><4>
<SWITCH_INFO_TYPE><MSSPMSK1><MSSP1 7-Bit Address Masking Mode Enable bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><17ffa><0><ff><3>
<SWITCH_INFO_TYPE><WDTWIN><Watch Dog Timer Window><3><4>
<SETTING_VALUE_TYPE><PS75_0><Watch Dog Timer Window Width is 75 percent><0>
<SETTING_VALUE_TYPE><PS50_0><Watch Dog Timer Window Width is 50 percent><1>
<SETTING_VALUE_TYPE><PS37_5><Watch Dog Timer Window Width is 37.5 percent><2>
<SETTING_VALUE_TYPE><PS25_0><Watch Dog Timer Window Width is 25 percent><3>
<SWITCH_INFO_TYPE><WDTCLK><Watch Dog Timer Clock Source><c><4>
<SETTING_VALUE_TYPE><SYS><Use FOSC/4 when system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><0>
<SETTING_VALUE_TYPE><SOSC><Always use SOSC><4>
<SETTING_VALUE_TYPE><LPRC><Always use INTOSC/LPRC><8>
<SETTING_VALUE_TYPE><FRC><Use FRC when WINDIS = 0, system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><c>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale><f0><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><10>
<SETTING_VALUE_TYPE><4><1:4><20>
<SETTING_VALUE_TYPE><8><1:8><30>
<SETTING_VALUE_TYPE><16><1:16><40>
<SETTING_VALUE_TYPE><32><1:32><50>
<SETTING_VALUE_TYPE><64><1:64><60>
<SETTING_VALUE_TYPE><128><1:128><70>
<SETTING_VALUE_TYPE><256><1:256><80>
<SETTING_VALUE_TYPE><512><1:512><90>
<SETTING_VALUE_TYPE><1024><1:1024><a0>
<SETTING_VALUE_TYPE><2048><1:2048><b0>
<SETTING_VALUE_TYPE><4096><1:4096><c0>
<SETTING_VALUE_TYPE><8192><1:8192><d0>
<SETTING_VALUE_TYPE><16384><1:16384><e0>
<SETTING_VALUE_TYPE><32768><1:32768><f0>
<CONFIGREG_INFO_TYPE><17ffb><0><ff><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WINDIS><Windowed Watchdog Timer Disable><4><2>
<SETTING_VALUE_TYPE><WDTWIN><Windowed WDT enabled><0>
<SETTING_VALUE_TYPE><WDTSTD><Standard WDT selected; windowed WDT disabled><4>
<SWITCH_INFO_TYPE><WPSA><WDT Prescaler><8><2>
<SETTING_VALUE_TYPE><32><WDT prescaler ratio of 1:32><0>
<SETTING_VALUE_TYPE><128><WDT prescaler ratio of 1:128><8>
<CONFIGREG_INFO_TYPE><17ffc><0><1d><4>
<SWITCH_INFO_TYPE><RETEN><Retention Voltage Regulator Control Enable><1><2>
<SETTING_VALUE_TYPE><ON><Retention controlled by SRETEN during Sleep><0>
<SETTING_VALUE_TYPE><OFF><Retention not available><1>
<SWITCH_INFO_TYPE><VBTBOR><VBAT BOR Enable><4><2>
<SETTING_VALUE_TYPE><OFF><VBAT BOR is disabled><0>
<SETTING_VALUE_TYPE><ON><VBAT BOR is enabled><4>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR Enable><8><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled in Deep Sleep (does not affect operation in non-Deep Sleep modes)><0>
<SETTING_VALUE_TYPE><ON><BOR enabled in Deep Sleep><8>
<SWITCH_INFO_TYPE><DSBITEN><DSEN Bit Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Deep Sleep operation is always disabled><0>
<SETTING_VALUE_TYPE><ON><Deep Sleep is controlled by the register bit DSEN><10>
<CONFIGREG_INFO_TYPE><17ffd><0><f0><0>
<CONFIGREG_INFO_TYPE><17ffe><0><f8><1>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Timer Postscale Select><f8><20>
<SETTING_VALUE_TYPE><DSWDTPS0><1:32 (1 mS)><0>
<SETTING_VALUE_TYPE><DSWDTPS1><1:64 (2.1 mS)><8>
<SETTING_VALUE_TYPE><DSWDTPS2><1:128 (4.1 mS)><10>
<SETTING_VALUE_TYPE><DSWDTPS3><1: 256 (8.3 mS)><18>
<SETTING_VALUE_TYPE><DSWDTPS4><1:512 (16.5 mS)><20>
<SETTING_VALUE_TYPE><DSWDTPS5><1:1024 (33 mS)><28>
<SETTING_VALUE_TYPE><DSWDTPS6><1:2048 (66.1 mS)><30>
<SETTING_VALUE_TYPE><DSWDTPS7><1:4096 (132.1 mS)><38>
<SETTING_VALUE_TYPE><DSWDTPS8><1:8192 (264.3 mS)><40>
<SETTING_VALUE_TYPE><DSWDTPS9><1:16384 (528.5 mS)><48>
<SETTING_VALUE_TYPE><DSWDTPSA><1:32768 (1.057 Secs)><50>
<SETTING_VALUE_TYPE><DSWDTPSB><1:65536 (2.114 Secs)><58>
<SETTING_VALUE_TYPE><DSWDTPSC><1:131072 (4.228 Secs)><60>
<SETTING_VALUE_TYPE><DSWDTPSD><1:262114 (8.456 Secs)><68>
<SETTING_VALUE_TYPE><DSWDTPSE><1:524288 (16.912 Secs)><70>
<SETTING_VALUE_TYPE><DSWDTPSF><1:1048576 (33.825 Secs)><78>
<SETTING_VALUE_TYPE><DSWDTPS10><1:2097152 (67.7 Secs)><80>
<SETTING_VALUE_TYPE><DSWDTPS11><1:4194304 (135.3 Secs)><88>
<SETTING_VALUE_TYPE><DSWDTPS12><1:8388608 (4.5 Minutes)><90>
<SETTING_VALUE_TYPE><DSWDTPS13><1:16777216 (9 Minutes)><98>
<SETTING_VALUE_TYPE><DSWDTPS14><1:33554432 (18 Minutes)><a0>
<SETTING_VALUE_TYPE><DSWDTPS15><1:67108864 (36.1 Minutes)><a8>
<SETTING_VALUE_TYPE><DSWDTPS16><1:134217728 (72.2 Minutes)><b0>
<SETTING_VALUE_TYPE><DSWDTPS17><1:268435456 (2.4 Hours)><b8>
<SETTING_VALUE_TYPE><DSWDTPS18><1:536870912 (4.8 Hours)><c0>
<SETTING_VALUE_TYPE><DSWDTPS19><1:1073741824 (9.6 Hours)><c8>
<SETTING_VALUE_TYPE><DSWDTPS1A><1:2147483648 (19.2 Hours)><d0>
<SETTING_VALUE_TYPE><DSWDTPS1B><1:4294967296 (38.5 Hours)><d8>
<SETTING_VALUE_TYPE><DSWDTPS1C><1:8589934592 (77 Hours)><e0>
<SETTING_VALUE_TYPE><DSWDTPS1D><1:17179869184 (6.4 Days)><e8>
<SETTING_VALUE_TYPE><DSWDTPS1E><1:34359738368 (12.8  Days)><f0>
<SETTING_VALUE_TYPE><DSWDTPS1F><1:68719476736 (25.7 Days)><f8>
<CONFIGREG_INFO_TYPE><17fff><0><f3><2>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer Enable><1><2>
<SETTING_VALUE_TYPE><OFF><DSWDT Disabled><0>
<SETTING_VALUE_TYPE><ON><DSWDT Enabled><1>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Reference Clock Select><2><2>
<SETTING_VALUE_TYPE><SOSC><DSWDT uses SOSC as reference clock><0>
<SETTING_VALUE_TYPE><LPRC><DSWDT uses LPRC as reference clock><2>
<PART_INFO_TYPE><c622><PIC18F86K22><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><d>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SRETEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300004><0><f9><5>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><1><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><SOSCREF><RTCC uses SOSC><1>
<SWITCH_INFO_TYPE><EASHFT><External Address Shift bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled><8>
<SWITCH_INFO_TYPE><ABW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><XM20><20-bit address bus><0>
<SETTING_VALUE_TYPE><XM16><16-bit address bus><10>
<SETTING_VALUE_TYPE><XM12><12-bit address bus><20>
<SETTING_VALUE_TYPE><MM><8-bit address bus><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300005><0><8b><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><RE7-Microcontroller Mode/RB3-All other modes><0>
<SETTING_VALUE_TYPE><PORTC><RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP Mux><2><2>
<SETTING_VALUE_TYPE><PORTH><Enhanced CCP1/3 [P1B/P1C/P3B/P3C] muxed with RH7/RH6/RH5/RH4><0>
<SETTING_VALUE_TYPE><PORTE><Enhanced CCP1/3 [P1B/P1C/P3B/P3C] muxed with RE6/RE5/RE4/RE3><2>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RG5 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RG5 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBRT0><Table Read Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBRT1><Table Read Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBRT2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBRT3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBRTB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><c690><PIC18F86K90><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><d>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SRETEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300004><0><1><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><1><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><SOSCREF><RTCC uses SOSC><1>
<CONFIGREG_INFO_TYPE><300005><0><8b><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><RE7-Microcontroller Mode/RB3-All other modes><0>
<SETTING_VALUE_TYPE><PORTC><RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP Mux><2><2>
<SETTING_VALUE_TYPE><PORTH><Enhanced CCP1/3 [P1B/P1C/P3B/P3C] muxed with RH7/RH6/RH5/RH4><0>
<SETTING_VALUE_TYPE><PORTE><Enhanced CCP1/3 [P1B/P1C/P3B/P3C] muxed with RE6/RE5/RE4/RE3><2>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RG5 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RG5 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBRT0><Table Read Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBRT1><Table Read Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBRT2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBRT3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBRTB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><a872><PIC18F8720><18xxxx><2><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator w/ OSC2 configured as divide-by-4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300004><0><83><2>
<SWITCH_INFO_TYPE><MODE><Processor Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><3><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><8>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<SWITCH_INFO_TYPE><CP6><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not code-protected><40>
<SWITCH_INFO_TYPE><CP7><Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not code-protected><80>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><8721><PIC18F8722><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><f3><4>
<SWITCH_INFO_TYPE><MODE><Processor Data Memory Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><ADDRBW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><ADDR8BIT><8-bit Address Bus><0>
<SETTING_VALUE_TYPE><ADDR12BIT><12-bit Address Bus><10>
<SETTING_VALUE_TYPE><ADDR16BIT><16-bit Address Bus><20>
<SETTING_VALUE_TYPE><ADDR20BIT><20-bit Address Bus><30>
<SWITCH_INFO_TYPE><DATABW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><DATA8BIT><8-bit External Bus mode><0>
<SETTING_VALUE_TYPE><DATA16BIT><16-bit External Bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits><0>
<SETTING_VALUE_TYPE><OFF><Wait selections are unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><ECCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><PORTH><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RH7, RH6, RH5 and RH4 respectively><0>
<SETTING_VALUE_TYPE><PORTE><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RE6, RE5, RE4 and RE3 respectively><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><8>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<SWITCH_INFO_TYPE><CP6><Code Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (01BFFF-018000h) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (01BFFF-018000h) not code-protected><40>
<SWITCH_INFO_TYPE><CP7><Code Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not code-protected><80>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (01BFFF-018000h) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (01BFFF-018000h) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><8723><PIC18F8723><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><f3><4>
<SWITCH_INFO_TYPE><MODE><Processor Data Memory Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><ADDRBW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><ADDR8BIT><8-bit Address Bus><0>
<SETTING_VALUE_TYPE><ADDR12BIT><12-bit Address Bus><10>
<SETTING_VALUE_TYPE><ADDR16BIT><16-bit Address Bus><20>
<SETTING_VALUE_TYPE><ADDR20BIT><20-bit Address Bus><30>
<SWITCH_INFO_TYPE><DATABW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><DATA8BIT><8-bit External Bus mode><0>
<SETTING_VALUE_TYPE><DATA16BIT><16-bit External Bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits><0>
<SETTING_VALUE_TYPE><OFF><Wait selections are unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><ECCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><PORTH><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RH7, RH6, RH5 and RH4 respectively><0>
<SETTING_VALUE_TYPE><PORTE><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RE6, RE5, RE4 and RE3 respectively><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><8>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<SWITCH_INFO_TYPE><CP6><Code Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (01BFFF-018000h) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (01BFFF-018000h) not code-protected><40>
<SWITCH_INFO_TYPE><CP7><Code Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not code-protected><80>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (01BFFF-018000h) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (01BFFF-018000h) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><c710><PIC18F87J10><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><1fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLK function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled, address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled, address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode - 20-bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode - 16-bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode - 12-bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode - External bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states for operations on external memory bus enabled><0>
<SETTING_VALUE_TYPE><OFF><Wait states for operations on external memory bus disabled><80>
<CONFIGREG_INFO_TYPE><1fffd><0><f3><2>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCPx MUX bit><2><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<PART_INFO_TYPE><c711><PIC18F87J11><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><1fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fffa><0><c7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><Internal oscillator, port function on RA6 and RA7 ><0>
<SETTING_VALUE_TYPE><INTOSCO><Internal oscillator, CLKOUT on RA6 and port function on RA7><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, port function on RA6 and RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKOUT on RA6 and port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator, CLKO  on RA6><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator, PLL enabled, CLKO on RA6><7>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled, address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled, address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus Configuration bits><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode - 20-bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode - 16-bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode - 12-bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode - External bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states on the external bus are enabled and selected by MEMCON<5:4>><0>
<SETTING_VALUE_TYPE><OFF><Wait states on the external bus are disabled><80>
<CONFIGREG_INFO_TYPE><1fffd><0><ff><4>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCPx MUX bit><2><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<SWITCH_INFO_TYPE><PMPMX><PMP Pin Multiplex bit><4><2>
<SETTING_VALUE_TYPE><ALTERNATE><PMP port pins not connected to EMB (PORTA, PORTF and PORTH)><0>
<SETTING_VALUE_TYPE><DEFAULT><PMP port pins connected to EMB (PORTD and PORTE)><4>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP Address Masking Mode Select bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5-Bit Address Masking mode enable><0>
<SETTING_VALUE_TYPE><MSK7><7-Bit Address Masking mode enable><8>
<PART_INFO_TYPE><c750><PIC18F87J50><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1fff8><0><ef><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><1fff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fffa><0><c7><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC, Port function on RA6 and RA7><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSC, CLKO on RA6 and Port function on RA7><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, Port function on RA6 and RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKO on RA6 and Port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator, HS used by USB><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled, HSPLL used by USB><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with CLKO on RA6, EC used by USB><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL, CLKO on RA6, ECPLL used by USB><7>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled, address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled, address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus Configuration bits><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode - 20-bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode - 16-bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode - 12-bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode - External bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states on the external bus are enabled and selected by MEMCON<5:4>><0>
<SETTING_VALUE_TYPE><OFF><Wait states on the external bus are disabled><80>
<CONFIGREG_INFO_TYPE><1fffd><0><ff><4>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode or with RB3 in Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCPx MUX bit><2><2>
<SETTING_VALUE_TYPE><ALTERNATE><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><DEFAULT><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<SWITCH_INFO_TYPE><PMPMX><PMP Pin Multiplex bit><4><2>
<SETTING_VALUE_TYPE><ALTERNATE><PMP pins placed else where><0>
<SETTING_VALUE_TYPE><DEFAULT><PMP pins placed on EMB><4>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP Address Masking Mode Select bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5-Bit Address Masking mode enable><0>
<SETTING_VALUE_TYPE><MSK7><7-Bit Address Masking mode enable><8>
<PART_INFO_TYPE><c760><PIC18F87J60><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVR><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><1fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLKO function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><f8><0>
<CONFIGREG_INFO_TYPE><1fffd><0><f7><3>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode (80-pin and 100-pin devices) or with RB3 in Extended Microcontroller mode (100-pin devices only)><0>
<SETTING_VALUE_TYPE><ON><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><OFF><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><ON><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<SWITCH_INFO_TYPE><ETHLED><Ethernet LED Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><RA0/RA1 function as I/O regardless of Ethernet module status><0>
<SETTING_VALUE_TYPE><ON><RA0/RA1 are multiplexed with LEDA/LEDB when Ethernet module is enabled and function as I/O when Ethernet is disabled><4>
<PART_INFO_TYPE><8772><PIC18F87J72><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1fff8><0><e1><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled-Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><1fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<CONFIGREG_INFO_TYPE><1fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><Internal oscillator, port function on RA6 and RA7 ><0>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, port function on RA6 and RA7><1>
<SETTING_VALUE_TYPE><INTOSCO><Internal oscillator, CLKOUT on RA6 and port function on RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKOUT on RA6 and port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with clock out on RA6><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL><7>
<SWITCH_INFO_TYPE><T1DIG><Secondary Clock Source T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator configured for low-power operation><0>
<SETTING_VALUE_TYPE><OFF><Timer1 oscillator configured for higher power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><2><1>
<SWITCH_INFO_TYPE><RTCSOSC><RTCC Reference Clock Select bit><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTOSC/INTRC as reference clock><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI as reference clock><2>
<CONFIGREG_INFO_TYPE><1fffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><RE7 <Microcontroller> / RB3><0>
<SETTING_VALUE_TYPE><DEFAULT><RC1><1>
<PART_INFO_TYPE><8790><PIC18F87J90><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled-Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><1fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<CONFIGREG_INFO_TYPE><1fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><Internal oscillator, port function on RA6 and RA7 ><0>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, port function on RA6 and RA7><1>
<SETTING_VALUE_TYPE><INTOSCO><Internal oscillator, CLKOUT on RA6 and port function on RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKOUT on RA6 and port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with clock out on RA6><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL><7>
<SWITCH_INFO_TYPE><T1DIG><Secondary Clock Source T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator configured for low-power operation><0>
<SETTING_VALUE_TYPE><OFF><Timer1 oscillator configured for higher power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><f2><1>
<SWITCH_INFO_TYPE><RTCSOSC><RTCC Reference Clock Select bit><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTOSC/INTRC as reference clock><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI as reference clock><2>
<CONFIGREG_INFO_TYPE><1fffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><RC1><1>
<PART_INFO_TYPE><8793><PIC18F87J93><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1fff8><0><e1><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled-Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><1fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<CONFIGREG_INFO_TYPE><1fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><INTOSC><Internal oscillator, port function on RA6 and RA7 ><0>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSC with PLL enabled, port function on RA6 and RA7><1>
<SETTING_VALUE_TYPE><INTOSCO><Internal oscillator, CLKOUT on RA6 and port function on RA7><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSC with PLL enabled, CLKOUT on RA6 and port function on RA7><3>
<SETTING_VALUE_TYPE><HS><HS oscillator><4>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled><5>
<SETTING_VALUE_TYPE><EC><EC Oscillator with clock out on RA6><6>
<SETTING_VALUE_TYPE><ECPLL><EC Oscillator with PLL><7>
<SWITCH_INFO_TYPE><T1DIG><Secondary Clock Source T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator configured for low-power operation><0>
<SETTING_VALUE_TYPE><OFF><Timer1 oscillator configured for higher power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><f2><1>
<SWITCH_INFO_TYPE><RTCSOSC><RTCC Reference Clock Select bit><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTOSC/INTRC as reference clock><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI as reference clock><2>
<CONFIGREG_INFO_TYPE><1fffd><0><f1><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><RE7><0>
<SETTING_VALUE_TYPE><DEFAULT><RC1><1>
<PART_INFO_TYPE><8794><PIC18F87J94><18xxxx><6><1><1ffef><10><ff><0><0-5f><f60-fff><0><10>
<CONFIGREG_INFO_TYPE><1fff0><0><e0><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><1fff1><0><f7><3>
<SWITCH_INFO_TYPE><BOREN><Brown-Out Reset Enable><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit, disabled in Deep Sleep><1>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><2><2>
<SETTING_VALUE_TYPE><0><2.0V><0>
<SETTING_VALUE_TYPE><1><1.8V><2>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fff2><0><af><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><FRC><Fast RC Oscillator (FRC)><0>
<SETTING_VALUE_TYPE><FRCPLL><Fast RC Oscillator with PLL module (FRCPLL)><1>
<SETTING_VALUE_TYPE><PRI><Primary Oscillator (XT, HS, EC)><2>
<SETTING_VALUE_TYPE><PRIPLL><Primary Oscillator with PLL module (XTPLL,HSPLL,ECPLL)><3>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator (SOSC)><4>
<SETTING_VALUE_TYPE><LPRC><Low-Power RC Oscillator (LPRC)><5>
<SETTING_VALUE_TYPE><FRC500KHZ><Fast RC Oscillator divided by 16 (500 kHz)><6>
<SETTING_VALUE_TYPE><FRCDIV><Fast RC Oscillator with Postscaler (FRCDIV)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><8><2>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SWITCH_INFO_TYPE><CLKOEN><Clock Out Enable Bit><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><1fff3><0><ff><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Frequency Multiplier Select bits><f><10>
<SETTING_VALUE_TYPE><NODIV><96 MHz PLL selected; No divide - Oscillator used directly (4 MHz input)><0>
<SETTING_VALUE_TYPE><DIV2><96 MHz PLL selected; Oscillator divided by 2 (8 MHz input)><1>
<SETTING_VALUE_TYPE><DIV3><96 MHz PLL selected; Oscillator divided by 3 (12 MHz input)><2>
<SETTING_VALUE_TYPE><DIV4><96 MHz PLL selected; Oscillator divided by 4 (16 MHz input)><3>
<SETTING_VALUE_TYPE><DIV5><96 MHz PLL selected; Oscillator divided by 5 (20 MHz input)><4>
<SETTING_VALUE_TYPE><DIV6><96 MHz PLL selected; Oscillator divided by 6 (24 MHz input)><5>
<SETTING_VALUE_TYPE><DIV10><96 MHz PLL selected; Oscillator divided by 10 (40 MHz input)><6>
<SETTING_VALUE_TYPE><DIV12><96 MHz PLL selected; Oscillator divided by 12 (48 MHz input)><7>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><8>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><9>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><a>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><b>
<SETTING_VALUE_TYPE><PLL4X><4x PLL selected><c>
<SETTING_VALUE_TYPE><PLL6X><6x PLL selected><d>
<SETTING_VALUE_TYPE><PLL8X><8x PLL selected><e>
<SETTING_VALUE_TYPE><NOPLL><No PLL used - PLLGO bit not available to user><f>
<CONFIGREG_INFO_TYPE><1fff4><0><33><2>
<SWITCH_INFO_TYPE><POSCMD><Primary Oscillator Select><3><4>
<SETTING_VALUE_TYPE><EC><External clock mode selected><0>
<SETTING_VALUE_TYPE><MS><MS oscillator mode selected(3.5 MHz -10 MHz)><1>
<SETTING_VALUE_TYPE><HS><HS oscillator mode selected(10 MHz - 40 MHz)><2>
<SETTING_VALUE_TYPE><NONE><Primary oscillator disabled><3>
<SWITCH_INFO_TYPE><FSCM><Clock Switching and Monitor Selection Configuration bits><30><3>
<SETTING_VALUE_TYPE><CSECME><Clock switching is enabled, fail safe clock monitor is enabled><0>
<SETTING_VALUE_TYPE><CSECMD><Clock switching is enabled, fail safe clock monitor is disabled><10>
<SETTING_VALUE_TYPE><CSDCMD><Clock switching is disabled, fail safe clock monitor is disabled><20>
<CONFIGREG_INFO_TYPE><1fff5><0><f0><0>
<CONFIGREG_INFO_TYPE><1fff6><0><ff><1>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Boundary><ff><100>
<SETTING_VALUE_TYPE><WPFP0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><WPFP1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><WPFP2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><WPFP3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><WPFP4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><WPFP5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><WPFP6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><WPFP7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><WPFP8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><WPFP9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><WPFP10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><WPFP11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><WPFP12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><WPFP13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><WPFP14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><WPFP15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><WPFP16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><WPFP17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><WPFP18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><WPFP19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><WPFP20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><WPFP21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><WPFP22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><WPFP23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><WPFP24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><WPFP25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><WPFP26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><WPFP27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><WPFP28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><WPFP29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><WPFP30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><WPFP31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><WPFP32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><WPFP33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><WPFP34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><WPFP35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><WPFP36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><WPFP37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><WPFP38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><WPFP39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><WPFP40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><WPFP41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><WPFP42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><WPFP43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><WPFP44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><WPFP45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><WPFP46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><WPFP47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><WPFP48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><WPFP49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><WPFP50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><WPFP51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><WPFP52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><WPFP53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><WPFP54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><WPFP55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><WPFP56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><WPFP57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><WPFP58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><WPFP59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><WPFP60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><WPFP61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><WPFP62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><WPFP63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><WPFP64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><WPFP65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><WPFP66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><WPFP67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><WPFP68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><WPFP69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><WPFP70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><WPFP71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><WPFP72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><WPFP73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><WPFP74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><WPFP75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><WPFP76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><WPFP77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><WPFP78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><WPFP79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><WPFP80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><WPFP81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><WPFP82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><WPFP83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><WPFP84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><WPFP85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><WPFP86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><WPFP87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><WPFP88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><WPFP89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><WPFP90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><WPFP91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><WPFP92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><WPFP93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><WPFP94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><WPFP95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><WPFP96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><WPFP97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><WPFP98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><WPFP99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><WPFP100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><WPFP101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><WPFP102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><WPFP103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><WPFP104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><WPFP105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><WPFP106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><WPFP107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><WPFP108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><WPFP109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><WPFP110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><WPFP111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><WPFP112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><WPFP113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><WPFP114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><WPFP115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><WPFP116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><WPFP117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><WPFP118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><WPFP119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><WPFP120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><WPFP121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><WPFP122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><WPFP123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><WPFP124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><WPFP125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><WPFP126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><WPFP127><Write Protect Program Flash Page 127><7f>
<SETTING_VALUE_TYPE><WPFP128><Write Protect Program Flash Page 128><80>
<SETTING_VALUE_TYPE><WPFP129><Write Protect Program Flash Page 129><81>
<SETTING_VALUE_TYPE><WPFP130><Write Protect Program Flash Page 130><82>
<SETTING_VALUE_TYPE><WPFP131><Write Protect Program Flash Page 131><83>
<SETTING_VALUE_TYPE><WPFP132><Write Protect Program Flash Page 132><84>
<SETTING_VALUE_TYPE><WPFP133><Write Protect Program Flash Page 133><85>
<SETTING_VALUE_TYPE><WPFP134><Write Protect Program Flash Page 134><86>
<SETTING_VALUE_TYPE><WPFP135><Write Protect Program Flash Page 135><87>
<SETTING_VALUE_TYPE><WPFP136><Write Protect Program Flash Page 136><88>
<SETTING_VALUE_TYPE><WPFP137><Write Protect Program Flash Page 137><89>
<SETTING_VALUE_TYPE><WPFP138><Write Protect Program Flash Page 138><8a>
<SETTING_VALUE_TYPE><WPFP139><Write Protect Program Flash Page 139><8b>
<SETTING_VALUE_TYPE><WPFP140><Write Protect Program Flash Page 140><8c>
<SETTING_VALUE_TYPE><WPFP141><Write Protect Program Flash Page 141><8d>
<SETTING_VALUE_TYPE><WPFP142><Write Protect Program Flash Page 142><8e>
<SETTING_VALUE_TYPE><WPFP143><Write Protect Program Flash Page 143><8f>
<SETTING_VALUE_TYPE><WPFP144><Write Protect Program Flash Page 144><90>
<SETTING_VALUE_TYPE><WPFP145><Write Protect Program Flash Page 145><91>
<SETTING_VALUE_TYPE><WPFP146><Write Protect Program Flash Page 146><92>
<SETTING_VALUE_TYPE><WPFP147><Write Protect Program Flash Page 147><93>
<SETTING_VALUE_TYPE><WPFP148><Write Protect Program Flash Page 148><94>
<SETTING_VALUE_TYPE><WPFP149><Write Protect Program Flash Page 149><95>
<SETTING_VALUE_TYPE><WPFP150><Write Protect Program Flash Page 150><96>
<SETTING_VALUE_TYPE><WPFP151><Write Protect Program Flash Page 151><97>
<SETTING_VALUE_TYPE><WPFP152><Write Protect Program Flash Page 152><98>
<SETTING_VALUE_TYPE><WPFP153><Write Protect Program Flash Page 153><99>
<SETTING_VALUE_TYPE><WPFP154><Write Protect Program Flash Page 154><9a>
<SETTING_VALUE_TYPE><WPFP155><Write Protect Program Flash Page 155><9b>
<SETTING_VALUE_TYPE><WPFP156><Write Protect Program Flash Page 156><9c>
<SETTING_VALUE_TYPE><WPFP157><Write Protect Program Flash Page 157><9d>
<SETTING_VALUE_TYPE><WPFP158><Write Protect Program Flash Page 158><9e>
<SETTING_VALUE_TYPE><WPFP159><Write Protect Program Flash Page 159><9f>
<SETTING_VALUE_TYPE><WPFP160><Write Protect Program Flash Page 160><a0>
<SETTING_VALUE_TYPE><WPFP161><Write Protect Program Flash Page 161><a1>
<SETTING_VALUE_TYPE><WPFP162><Write Protect Program Flash Page 162><a2>
<SETTING_VALUE_TYPE><WPFP163><Write Protect Program Flash Page 163><a3>
<SETTING_VALUE_TYPE><WPFP164><Write Protect Program Flash Page 164><a4>
<SETTING_VALUE_TYPE><WPFP165><Write Protect Program Flash Page 165><a5>
<SETTING_VALUE_TYPE><WPFP166><Write Protect Program Flash Page 166><a6>
<SETTING_VALUE_TYPE><WPFP167><Write Protect Program Flash Page 167><a7>
<SETTING_VALUE_TYPE><WPFP168><Write Protect Program Flash Page 168><a8>
<SETTING_VALUE_TYPE><WPFP169><Write Protect Program Flash Page 169><a9>
<SETTING_VALUE_TYPE><WPFP170><Write Protect Program Flash Page 170><aa>
<SETTING_VALUE_TYPE><WPFP171><Write Protect Program Flash Page 171><ab>
<SETTING_VALUE_TYPE><WPFP172><Write Protect Program Flash Page 172><ac>
<SETTING_VALUE_TYPE><WPFP173><Write Protect Program Flash Page 173><ad>
<SETTING_VALUE_TYPE><WPFP174><Write Protect Program Flash Page 174><ae>
<SETTING_VALUE_TYPE><WPFP175><Write Protect Program Flash Page 175><af>
<SETTING_VALUE_TYPE><WPFP176><Write Protect Program Flash Page 176><b0>
<SETTING_VALUE_TYPE><WPFP177><Write Protect Program Flash Page 177><b1>
<SETTING_VALUE_TYPE><WPFP178><Write Protect Program Flash Page 178><b2>
<SETTING_VALUE_TYPE><WPFP179><Write Protect Program Flash Page 179><b3>
<SETTING_VALUE_TYPE><WPFP180><Write Protect Program Flash Page 180><b4>
<SETTING_VALUE_TYPE><WPFP181><Write Protect Program Flash Page 181><b5>
<SETTING_VALUE_TYPE><WPFP182><Write Protect Program Flash Page 182><b6>
<SETTING_VALUE_TYPE><WPFP183><Write Protect Program Flash Page 183><b7>
<SETTING_VALUE_TYPE><WPFP184><Write Protect Program Flash Page 184><b8>
<SETTING_VALUE_TYPE><WPFP185><Write Protect Program Flash Page 185><b9>
<SETTING_VALUE_TYPE><WPFP186><Write Protect Program Flash Page 186><ba>
<SETTING_VALUE_TYPE><WPFP187><Write Protect Program Flash Page 187><bb>
<SETTING_VALUE_TYPE><WPFP188><Write Protect Program Flash Page 188><bc>
<SETTING_VALUE_TYPE><WPFP189><Write Protect Program Flash Page 189><bd>
<SETTING_VALUE_TYPE><WPFP190><Write Protect Program Flash Page 190><be>
<SETTING_VALUE_TYPE><WPFP191><Write Protect Program Flash Page 191><bf>
<SETTING_VALUE_TYPE><WPFP192><Write Protect Program Flash Page 192><c0>
<SETTING_VALUE_TYPE><WPFP193><Write Protect Program Flash Page 193><c1>
<SETTING_VALUE_TYPE><WPFP194><Write Protect Program Flash Page 194><c2>
<SETTING_VALUE_TYPE><WPFP195><Write Protect Program Flash Page 195><c3>
<SETTING_VALUE_TYPE><WPFP196><Write Protect Program Flash Page 196><c4>
<SETTING_VALUE_TYPE><WPFP197><Write Protect Program Flash Page 197><c5>
<SETTING_VALUE_TYPE><WPFP198><Write Protect Program Flash Page 198><c6>
<SETTING_VALUE_TYPE><WPFP199><Write Protect Program Flash Page 199><c7>
<SETTING_VALUE_TYPE><WPFP200><Write Protect Program Flash Page 200><c8>
<SETTING_VALUE_TYPE><WPFP201><Write Protect Program Flash Page 201><c9>
<SETTING_VALUE_TYPE><WPFP202><Write Protect Program Flash Page 202><ca>
<SETTING_VALUE_TYPE><WPFP203><Write Protect Program Flash Page 203><cb>
<SETTING_VALUE_TYPE><WPFP204><Write Protect Program Flash Page 204><cc>
<SETTING_VALUE_TYPE><WPFP205><Write Protect Program Flash Page 205><cd>
<SETTING_VALUE_TYPE><WPFP206><Write Protect Program Flash Page 206><ce>
<SETTING_VALUE_TYPE><WPFP207><Write Protect Program Flash Page 207><cf>
<SETTING_VALUE_TYPE><WPFP208><Write Protect Program Flash Page 208><d0>
<SETTING_VALUE_TYPE><WPFP209><Write Protect Program Flash Page 209><d1>
<SETTING_VALUE_TYPE><WPFP210><Write Protect Program Flash Page 210><d2>
<SETTING_VALUE_TYPE><WPFP211><Write Protect Program Flash Page 211><d3>
<SETTING_VALUE_TYPE><WPFP212><Write Protect Program Flash Page 212><d4>
<SETTING_VALUE_TYPE><WPFP213><Write Protect Program Flash Page 213><d5>
<SETTING_VALUE_TYPE><WPFP214><Write Protect Program Flash Page 214><d6>
<SETTING_VALUE_TYPE><WPFP215><Write Protect Program Flash Page 215><d7>
<SETTING_VALUE_TYPE><WPFP216><Write Protect Program Flash Page 216><d8>
<SETTING_VALUE_TYPE><WPFP217><Write Protect Program Flash Page 217><d9>
<SETTING_VALUE_TYPE><WPFP218><Write Protect Program Flash Page 218><da>
<SETTING_VALUE_TYPE><WPFP219><Write Protect Program Flash Page 219><db>
<SETTING_VALUE_TYPE><WPFP220><Write Protect Program Flash Page 220><dc>
<SETTING_VALUE_TYPE><WPFP221><Write Protect Program Flash Page 221><dd>
<SETTING_VALUE_TYPE><WPFP222><Write Protect Program Flash Page 222><de>
<SETTING_VALUE_TYPE><WPFP223><Write Protect Program Flash Page 223><df>
<SETTING_VALUE_TYPE><WPFP224><Write Protect Program Flash Page 224><e0>
<SETTING_VALUE_TYPE><WPFP225><Write Protect Program Flash Page 225><e1>
<SETTING_VALUE_TYPE><WPFP226><Write Protect Program Flash Page 226><e2>
<SETTING_VALUE_TYPE><WPFP227><Write Protect Program Flash Page 227><e3>
<SETTING_VALUE_TYPE><WPFP228><Write Protect Program Flash Page 228><e4>
<SETTING_VALUE_TYPE><WPFP229><Write Protect Program Flash Page 229><e5>
<SETTING_VALUE_TYPE><WPFP230><Write Protect Program Flash Page 230><e6>
<SETTING_VALUE_TYPE><WPFP231><Write Protect Program Flash Page 231><e7>
<SETTING_VALUE_TYPE><WPFP232><Write Protect Program Flash Page 232><e8>
<SETTING_VALUE_TYPE><WPFP233><Write Protect Program Flash Page 233><e9>
<SETTING_VALUE_TYPE><WPFP234><Write Protect Program Flash Page 234><ea>
<SETTING_VALUE_TYPE><WPFP235><Write Protect Program Flash Page 235><eb>
<SETTING_VALUE_TYPE><WPFP236><Write Protect Program Flash Page 236><ec>
<SETTING_VALUE_TYPE><WPFP237><Write Protect Program Flash Page 237><ed>
<SETTING_VALUE_TYPE><WPFP238><Write Protect Program Flash Page 238><ee>
<SETTING_VALUE_TYPE><WPFP239><Write Protect Program Flash Page 239><ef>
<SETTING_VALUE_TYPE><WPFP240><Write Protect Program Flash Page 240><f0>
<SETTING_VALUE_TYPE><WPFP241><Write Protect Program Flash Page 241><f1>
<SETTING_VALUE_TYPE><WPFP242><Write Protect Program Flash Page 242><f2>
<SETTING_VALUE_TYPE><WPFP243><Write Protect Program Flash Page 243><f3>
<SETTING_VALUE_TYPE><WPFP244><Write Protect Program Flash Page 244><f4>
<SETTING_VALUE_TYPE><WPFP245><Write Protect Program Flash Page 245><f5>
<SETTING_VALUE_TYPE><WPFP246><Write Protect Program Flash Page 246><f6>
<SETTING_VALUE_TYPE><WPFP247><Write Protect Program Flash Page 247><f7>
<SETTING_VALUE_TYPE><WPFP248><Write Protect Program Flash Page 248><f8>
<SETTING_VALUE_TYPE><WPFP249><Write Protect Program Flash Page 249><f9>
<SETTING_VALUE_TYPE><WPFP250><Write Protect Program Flash Page 250><fa>
<SETTING_VALUE_TYPE><WPFP251><Write Protect Program Flash Page 251><fb>
<SETTING_VALUE_TYPE><WPFP252><Write Protect Program Flash Page 252><fc>
<SETTING_VALUE_TYPE><WPFP253><Write Protect Program Flash Page 253><fd>
<SETTING_VALUE_TYPE><WPFP254><Write Protect Program Flash Page 254><fe>
<SETTING_VALUE_TYPE><WPFP255><Write Protect Program Flash Page 255><ff>
<CONFIGREG_INFO_TYPE><1fff7><0><f7><3>
<SWITCH_INFO_TYPE><WPDIS><Segment Write Protection Disable><1><2>
<SETTING_VALUE_TYPE><WPEN><Enabled><0>
<SETTING_VALUE_TYPE><WPDIS><Disabled><1>
<SWITCH_INFO_TYPE><WPEND><Segment Write Protection End Page Select><2><2>
<SETTING_VALUE_TYPE><WPSTARTMEM><write Protect from page 0 to WPFP><0>
<SETTING_VALUE_TYPE><WPENDMEM><Write Protect from WPFP to the last page of memory><2>
<SWITCH_INFO_TYPE><WPCFG><Write Protect Configuration Page Select><4><2>
<SETTING_VALUE_TYPE><WPCFGEN><Enabled><0>
<SETTING_VALUE_TYPE><WPCFGDIS><Disabled><4>
<CONFIGREG_INFO_TYPE><1fff8><0><fb><6>
<SWITCH_INFO_TYPE><T5GSEL><TMR5 Gate Select bit><1><2>
<SETTING_VALUE_TYPE><T3G><TMR5 Gate is driven by the T3G input><0>
<SETTING_VALUE_TYPE><T5G><TMR5 Gate is driven by the T5G input><1>
<SWITCH_INFO_TYPE><CINASEL><CxINA Gate Select bit><2><2>
<SETTING_VALUE_TYPE><RA5><C1INA and C3INA are all re-mapped to pin RA5><0>
<SETTING_VALUE_TYPE><DEFAULT><C1INA and C3INA are on their default pin locations><2>
<SWITCH_INFO_TYPE><EASHFT><External Address Shift bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address Shifting disabled><0>
<SETTING_VALUE_TYPE><ON><Address Shifting enabled><8>
<SWITCH_INFO_TYPE><ABW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><XM20><20-bit address bus><0>
<SETTING_VALUE_TYPE><XM16><16-bit address bus><10>
<SETTING_VALUE_TYPE><XM12><12-bit address bus><20>
<SETTING_VALUE_TYPE><MM><8-bit address bus><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><1fff9><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><the IOLOCK bit can be set and cleared using the unlock sequence><0>
<SETTING_VALUE_TYPE><ON><Once set, the IOLOCK bit cannot be cleared><1>
<SWITCH_INFO_TYPE><LS48MHZ><USB Low Speed Clock Select bit><2><2>
<SETTING_VALUE_TYPE><SYSX1><Divide-by-1 (System clock must be 6 MHz)><0>
<SETTING_VALUE_TYPE><SYSX2><Divide-by-2 (System clock must be 12 MHz)><2>
<SWITCH_INFO_TYPE><MSSPMSK2><MSSP2 7-Bit Address Masking Mode Enable bit><4><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><4>
<SWITCH_INFO_TYPE><MSSPMSK1><MSSP1 7-Bit Address Masking Mode Enable bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><1fffa><0><ff><3>
<SWITCH_INFO_TYPE><WDTWIN><Watch Dog Timer Window><3><4>
<SETTING_VALUE_TYPE><PS75_0><Watch Dog Timer Window Width is 75 percent><0>
<SETTING_VALUE_TYPE><PS50_0><Watch Dog Timer Window Width is 50 percent><1>
<SETTING_VALUE_TYPE><PS37_5><Watch Dog Timer Window Width is 37.5 percent><2>
<SETTING_VALUE_TYPE><PS25_0><Watch Dog Timer Window Width is 25 percent><3>
<SWITCH_INFO_TYPE><WDTCLK><Watch Dog Timer Clock Source><c><4>
<SETTING_VALUE_TYPE><SYS><Use FOSC/4 when system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><0>
<SETTING_VALUE_TYPE><SOSC><Always use SOSC><4>
<SETTING_VALUE_TYPE><LPRC><Always use INTOSC/LPRC><8>
<SETTING_VALUE_TYPE><FRC><Use FRC when WINDIS = 0, system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><c>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale><f0><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><10>
<SETTING_VALUE_TYPE><4><1:4><20>
<SETTING_VALUE_TYPE><8><1:8><30>
<SETTING_VALUE_TYPE><16><1:16><40>
<SETTING_VALUE_TYPE><32><1:32><50>
<SETTING_VALUE_TYPE><64><1:64><60>
<SETTING_VALUE_TYPE><128><1:128><70>
<SETTING_VALUE_TYPE><256><1:256><80>
<SETTING_VALUE_TYPE><512><1:512><90>
<SETTING_VALUE_TYPE><1024><1:1024><a0>
<SETTING_VALUE_TYPE><2048><1:2048><b0>
<SETTING_VALUE_TYPE><4096><1:4096><c0>
<SETTING_VALUE_TYPE><8192><1:8192><d0>
<SETTING_VALUE_TYPE><16384><1:16384><e0>
<SETTING_VALUE_TYPE><32768><1:32768><f0>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WINDIS><Windowed Watchdog Timer Disable><4><2>
<SETTING_VALUE_TYPE><WDTWIN><Windowed WDT enabled><0>
<SETTING_VALUE_TYPE><WDTSTD><Standard WDT selected; windowed WDT disabled><4>
<SWITCH_INFO_TYPE><WPSA><WDT Prescaler><8><2>
<SETTING_VALUE_TYPE><32><WDT prescaler ratio of 1:32><0>
<SETTING_VALUE_TYPE><128><WDT prescaler ratio of 1:128><8>
<CONFIGREG_INFO_TYPE><1fffc><0><1d><4>
<SWITCH_INFO_TYPE><RETEN><Retention Voltage Regulator Control Enable><1><2>
<SETTING_VALUE_TYPE><ON><Retention controlled by SRETEN during Sleep><0>
<SETTING_VALUE_TYPE><OFF><Retention not available><1>
<SWITCH_INFO_TYPE><VBTBOR><VBAT BOR Enable><4><2>
<SETTING_VALUE_TYPE><OFF><VBAT BOR is disabled><0>
<SETTING_VALUE_TYPE><ON><VBAT BOR is enabled><4>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR Enable><8><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled in Deep Sleep (does not affect operation in non-Deep Sleep modes)><0>
<SETTING_VALUE_TYPE><ON><BOR enabled in Deep Sleep><8>
<SWITCH_INFO_TYPE><DSBITEN><DSEN Bit Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Deep Sleep operation is always disabled><0>
<SETTING_VALUE_TYPE><ON><Deep Sleep is controlled by the register bit DSEN><10>
<CONFIGREG_INFO_TYPE><1fffd><0><f0><0>
<CONFIGREG_INFO_TYPE><1fffe><0><f8><1>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Timer Postscale Select><f8><20>
<SETTING_VALUE_TYPE><DSWDTPS0><1:32 (1 mS)><0>
<SETTING_VALUE_TYPE><DSWDTPS1><1:64 (2.1 mS)><8>
<SETTING_VALUE_TYPE><DSWDTPS2><1:128 (4.1 mS)><10>
<SETTING_VALUE_TYPE><DSWDTPS3><1: 256 (8.3 mS)><18>
<SETTING_VALUE_TYPE><DSWDTPS4><1:512 (16.5 mS)><20>
<SETTING_VALUE_TYPE><DSWDTPS5><1:1024 (33 mS)><28>
<SETTING_VALUE_TYPE><DSWDTPS6><1:2048 (66.1 mS)><30>
<SETTING_VALUE_TYPE><DSWDTPS7><1:4096 (132.1 mS)><38>
<SETTING_VALUE_TYPE><DSWDTPS8><1:8192 (264.3 mS)><40>
<SETTING_VALUE_TYPE><DSWDTPS9><1:16384 (528.5 mS)><48>
<SETTING_VALUE_TYPE><DSWDTPSA><1:32768 (1.057 Secs)><50>
<SETTING_VALUE_TYPE><DSWDTPSB><1:65536 (2.114 Secs)><58>
<SETTING_VALUE_TYPE><DSWDTPSC><1:131072 (4.228 Secs)><60>
<SETTING_VALUE_TYPE><DSWDTPSD><1:262114 (8.456 Secs)><68>
<SETTING_VALUE_TYPE><DSWDTPSE><1:524288 (16.912 Secs)><70>
<SETTING_VALUE_TYPE><DSWDTPSF><1:1048576 (33.825 Secs)><78>
<SETTING_VALUE_TYPE><DSWDTPS10><1:2097152 (67.7 Secs)><80>
<SETTING_VALUE_TYPE><DSWDTPS11><1:4194304 (135.3 Secs)><88>
<SETTING_VALUE_TYPE><DSWDTPS12><1:8388608 (4.5 Minutes)><90>
<SETTING_VALUE_TYPE><DSWDTPS13><1:16777216 (9 Minutes)><98>
<SETTING_VALUE_TYPE><DSWDTPS14><1:33554432 (18 Minutes)><a0>
<SETTING_VALUE_TYPE><DSWDTPS15><1:67108864 (36.1 Minutes)><a8>
<SETTING_VALUE_TYPE><DSWDTPS16><1:134217728 (72.2 Minutes)><b0>
<SETTING_VALUE_TYPE><DSWDTPS17><1:268435456 (2.4 Hours)><b8>
<SETTING_VALUE_TYPE><DSWDTPS18><1:536870912 (4.8 Hours)><c0>
<SETTING_VALUE_TYPE><DSWDTPS19><1:1073741824 (9.6 Hours)><c8>
<SETTING_VALUE_TYPE><DSWDTPS1A><1:2147483648 (19.2 Hours)><d0>
<SETTING_VALUE_TYPE><DSWDTPS1B><1:4294967296 (38.5 Hours)><d8>
<SETTING_VALUE_TYPE><DSWDTPS1C><1:8589934592 (77 Hours)><e0>
<SETTING_VALUE_TYPE><DSWDTPS1D><1:17179869184 (6.4 Days)><e8>
<SETTING_VALUE_TYPE><DSWDTPS1E><1:34359738368 (12.8  Days)><f0>
<SETTING_VALUE_TYPE><DSWDTPS1F><1:68719476736 (25.7 Days)><f8>
<CONFIGREG_INFO_TYPE><1ffff><0><f3><2>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer Enable><1><2>
<SETTING_VALUE_TYPE><OFF><DSWDT Disabled><0>
<SETTING_VALUE_TYPE><ON><DSWDT Enabled><1>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Reference Clock Select><2><2>
<SETTING_VALUE_TYPE><SOSC><DSWDT uses SOSC as reference clock><0>
<SETTING_VALUE_TYPE><LPRC><DSWDT uses LPRC as reference clock><2>
<PART_INFO_TYPE><8722><PIC18F87K22><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><d>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SRETEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300004><0><f9><5>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><1><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><SOSCREF><RTCC uses SOSC><1>
<SWITCH_INFO_TYPE><EASHFT><External Address Shift bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address Shifting disabled><0>
<SETTING_VALUE_TYPE><ON><Address Shifting enabled><8>
<SWITCH_INFO_TYPE><ABW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><XM20><20-bit address bus><0>
<SETTING_VALUE_TYPE><XM16><16-bit address bus><10>
<SETTING_VALUE_TYPE><XM12><12-bit address bus><20>
<SETTING_VALUE_TYPE><MM><8-bit address bus><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300005><0><8b><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><RE7-Microcontroller Mode/RB3-All other modes><0>
<SETTING_VALUE_TYPE><PORTC><RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP Mux><2><2>
<SETTING_VALUE_TYPE><PORTH><Enhanced CCP1/3 [P1B/P1C/P3B/P3C] muxed with RH7/RH6/RH5/RH4><0>
<SETTING_VALUE_TYPE><PORTE><Enhanced CCP1/3 [P1B/P1C/P3B/P3C] muxed with RE6/RE5/RE4/RE3><2>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RG5 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RG5 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><8>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<SWITCH_INFO_TYPE><CP4><Code Protect 10000-13FFF><10><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><10>
<SWITCH_INFO_TYPE><CP5><Code Protect 14000-17FFF><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><CP6><Code Protect 18000-1BFFF><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CP7><Code Protect 1C000-1FFFF><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<SWITCH_INFO_TYPE><WRT4><Table Write Protect 10000-13FFF><10><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><10>
<SWITCH_INFO_TYPE><WRT5><Table Write Protect 14000-17FFF><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRT6><Table Write Protect 18000-1BFFF><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRT7><Table Write Protect 1C000-1FFFF><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><8>
<SWITCH_INFO_TYPE><EBRT0><Table Read Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBRT1><Table Read Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBRT2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBRT3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<SWITCH_INFO_TYPE><EBRT4><Table Read Protect 10000-13FFF><10><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><10>
<SWITCH_INFO_TYPE><EBRT5><Table Read Protect 14000-17FFF><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><EBRT6><Table Read Protect 18000-1BFFF><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><EBRT7><Table Read Protect 1C000-1FFFF><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBRTB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><c790><PIC18F87K90><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><d>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SRETEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300004><0><1><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><1><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><SOSCREF><RTCC uses SOSC><1>
<CONFIGREG_INFO_TYPE><300005><0><8b><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><RE7-Microcontroller Mode/RB3-All other modes><0>
<SETTING_VALUE_TYPE><PORTC><RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP Mux><2><2>
<SETTING_VALUE_TYPE><PORTH><Enhanced CCP1/3 [P1B/P1C/P3B/P3C] muxed with RH7/RH6/RH5/RH4><0>
<SETTING_VALUE_TYPE><PORTE><Enhanced CCP1/3 [P1B/P1C/P3B/P3C] muxed with RE6/RE5/RE4/RE3><2>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RG5 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RG5 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><8>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<SWITCH_INFO_TYPE><CP4><Code Protect 10000-13FFF><10><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><10>
<SWITCH_INFO_TYPE><CP5><Code Protect 14000-17FFF><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><CP6><Code Protect 18000-1BFFF><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CP7><Code Protect 1C000-1FFFF><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<SWITCH_INFO_TYPE><WRT4><Table Write Protect 10000-13FFF><10><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><10>
<SWITCH_INFO_TYPE><WRT5><Table Write Protect 14000-17FFF><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRT6><Table Write Protect 18000-1BFFF><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRT7><Table Write Protect 1C000-1FFFF><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><8>
<SWITCH_INFO_TYPE><EBRT0><Table Read Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBRT1><Table Read Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBRT2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBRT3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<SWITCH_INFO_TYPE><EBRT4><Table Read Protect 10000-13FFF><10><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><10>
<SWITCH_INFO_TYPE><EBRT5><Table Read Protect 14000-17FFF><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><EBRT6><Table Read Protect 18000-1BFFF><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><EBRT7><Table Read Protect 1C000-1FFFF><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBRTB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><9594><PIC18F95J94><18xxxx><6><1><7fef><10><ff><0><0-5f><f60-fff><0><10>
<CONFIGREG_INFO_TYPE><7ff0><0><e0><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><7ff1><0><f7><3>
<SWITCH_INFO_TYPE><BOREN><Brown-Out Reset Enable><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit, disabled in Deep Sleep><1>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><2><2>
<SETTING_VALUE_TYPE><0><2.0V><0>
<SETTING_VALUE_TYPE><1><1.8V><2>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ff2><0><af><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><FRC><Fast RC Oscillator (FRC)><0>
<SETTING_VALUE_TYPE><FRCPLL><Fast RC Oscillator with PLL module (FRCPLL)><1>
<SETTING_VALUE_TYPE><PRI><Primary Oscillator (XT, HS, EC)><2>
<SETTING_VALUE_TYPE><PRIPLL><Primary Oscillator with PLL module (XTPLL,HSPLL,ECPLL)><3>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator (SOSC)><4>
<SETTING_VALUE_TYPE><LPRC><Low-Power RC Oscillator (LPRC)><5>
<SETTING_VALUE_TYPE><FRC500KHZ><Fast RC Oscillator divided by 16 (500 kHz)><6>
<SETTING_VALUE_TYPE><FRCDIV><Fast RC Oscillator with Postscaler (FRCDIV)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><8><2>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SWITCH_INFO_TYPE><CLKOEN><Clock Out Enable Bit><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><7ff3><0><ff><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Frequency Multiplier Select bits><f><10>
<SETTING_VALUE_TYPE><NODIV><96 MHz PLL selected; No divide - Oscillator used directly (4 MHz input)><0>
<SETTING_VALUE_TYPE><DIV2><96 MHz PLL selected; Oscillator divided by 2 (8 MHz input)><1>
<SETTING_VALUE_TYPE><DIV3><96 MHz PLL selected; Oscillator divided by 3 (12 MHz input)><2>
<SETTING_VALUE_TYPE><DIV4><96 MHz PLL selected; Oscillator divided by 4 (16 MHz input)><3>
<SETTING_VALUE_TYPE><DIV5><96 MHz PLL selected; Oscillator divided by 5 (20 MHz input)><4>
<SETTING_VALUE_TYPE><DIV6><96 MHz PLL selected; Oscillator divided by 6 (24 MHz input)><5>
<SETTING_VALUE_TYPE><DIV10><96 MHz PLL selected; Oscillator divided by 10 (40 MHz input)><6>
<SETTING_VALUE_TYPE><DIV12><96 MHz PLL selected; Oscillator divided by 12 (48 MHz input)><7>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><8>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><9>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><a>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><b>
<SETTING_VALUE_TYPE><PLL4X><4x PLL selected><c>
<SETTING_VALUE_TYPE><PLL6X><6x PLL selected><d>
<SETTING_VALUE_TYPE><PLL8X><8x PLL selected><e>
<SETTING_VALUE_TYPE><NOPLL><No PLL used - PLLGO bit not available to user><f>
<CONFIGREG_INFO_TYPE><7ff4><0><33><2>
<SWITCH_INFO_TYPE><POSCMD><Primary Oscillator Select><3><4>
<SETTING_VALUE_TYPE><EC><External clock mode selected><0>
<SETTING_VALUE_TYPE><MS><MS oscillator mode selected(3.5 MHz -10 MHz)><1>
<SETTING_VALUE_TYPE><HS><HS oscillator mode selected(10 MHz - 40 MHz)><2>
<SETTING_VALUE_TYPE><NONE><Primary oscillator disabled><3>
<SWITCH_INFO_TYPE><FSCM><Clock Switching and Monitor Selection Configuration bits><30><3>
<SETTING_VALUE_TYPE><CSECME><Clock switching is enabled, fail safe clock monitor is enabled><0>
<SETTING_VALUE_TYPE><CSECMD><Clock switching is enabled, fail safe clock monitor is disabled><10>
<SETTING_VALUE_TYPE><CSDCMD><Clock switching is disabled, fail safe clock monitor is disabled><20>
<CONFIGREG_INFO_TYPE><7ff5><0><f0><0>
<CONFIGREG_INFO_TYPE><7ff6><0><ff><1>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Boundary><ff><100>
<SETTING_VALUE_TYPE><WPFP0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><WPFP1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><WPFP2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><WPFP3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><WPFP4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><WPFP5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><WPFP6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><WPFP7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><WPFP8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><WPFP9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><WPFP10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><WPFP11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><WPFP12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><WPFP13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><WPFP14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><WPFP15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><WPFP16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><WPFP17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><WPFP18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><WPFP19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><WPFP20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><WPFP21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><WPFP22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><WPFP23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><WPFP24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><WPFP25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><WPFP26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><WPFP27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><WPFP28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><WPFP29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><WPFP30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><WPFP31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><WPFP32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><WPFP33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><WPFP34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><WPFP35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><WPFP36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><WPFP37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><WPFP38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><WPFP39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><WPFP40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><WPFP41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><WPFP42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><WPFP43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><WPFP44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><WPFP45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><WPFP46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><WPFP47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><WPFP48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><WPFP49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><WPFP50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><WPFP51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><WPFP52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><WPFP53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><WPFP54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><WPFP55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><WPFP56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><WPFP57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><WPFP58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><WPFP59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><WPFP60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><WPFP61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><WPFP62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><WPFP63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><WPFP64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><WPFP65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><WPFP66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><WPFP67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><WPFP68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><WPFP69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><WPFP70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><WPFP71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><WPFP72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><WPFP73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><WPFP74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><WPFP75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><WPFP76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><WPFP77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><WPFP78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><WPFP79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><WPFP80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><WPFP81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><WPFP82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><WPFP83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><WPFP84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><WPFP85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><WPFP86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><WPFP87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><WPFP88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><WPFP89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><WPFP90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><WPFP91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><WPFP92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><WPFP93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><WPFP94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><WPFP95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><WPFP96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><WPFP97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><WPFP98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><WPFP99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><WPFP100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><WPFP101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><WPFP102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><WPFP103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><WPFP104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><WPFP105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><WPFP106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><WPFP107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><WPFP108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><WPFP109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><WPFP110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><WPFP111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><WPFP112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><WPFP113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><WPFP114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><WPFP115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><WPFP116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><WPFP117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><WPFP118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><WPFP119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><WPFP120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><WPFP121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><WPFP122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><WPFP123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><WPFP124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><WPFP125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><WPFP126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><WPFP127><Write Protect Program Flash Page 127><7f>
<SETTING_VALUE_TYPE><WPFP128><Write Protect Program Flash Page 128><80>
<SETTING_VALUE_TYPE><WPFP129><Write Protect Program Flash Page 129><81>
<SETTING_VALUE_TYPE><WPFP130><Write Protect Program Flash Page 130><82>
<SETTING_VALUE_TYPE><WPFP131><Write Protect Program Flash Page 131><83>
<SETTING_VALUE_TYPE><WPFP132><Write Protect Program Flash Page 132><84>
<SETTING_VALUE_TYPE><WPFP133><Write Protect Program Flash Page 133><85>
<SETTING_VALUE_TYPE><WPFP134><Write Protect Program Flash Page 134><86>
<SETTING_VALUE_TYPE><WPFP135><Write Protect Program Flash Page 135><87>
<SETTING_VALUE_TYPE><WPFP136><Write Protect Program Flash Page 136><88>
<SETTING_VALUE_TYPE><WPFP137><Write Protect Program Flash Page 137><89>
<SETTING_VALUE_TYPE><WPFP138><Write Protect Program Flash Page 138><8a>
<SETTING_VALUE_TYPE><WPFP139><Write Protect Program Flash Page 139><8b>
<SETTING_VALUE_TYPE><WPFP140><Write Protect Program Flash Page 140><8c>
<SETTING_VALUE_TYPE><WPFP141><Write Protect Program Flash Page 141><8d>
<SETTING_VALUE_TYPE><WPFP142><Write Protect Program Flash Page 142><8e>
<SETTING_VALUE_TYPE><WPFP143><Write Protect Program Flash Page 143><8f>
<SETTING_VALUE_TYPE><WPFP144><Write Protect Program Flash Page 144><90>
<SETTING_VALUE_TYPE><WPFP145><Write Protect Program Flash Page 145><91>
<SETTING_VALUE_TYPE><WPFP146><Write Protect Program Flash Page 146><92>
<SETTING_VALUE_TYPE><WPFP147><Write Protect Program Flash Page 147><93>
<SETTING_VALUE_TYPE><WPFP148><Write Protect Program Flash Page 148><94>
<SETTING_VALUE_TYPE><WPFP149><Write Protect Program Flash Page 149><95>
<SETTING_VALUE_TYPE><WPFP150><Write Protect Program Flash Page 150><96>
<SETTING_VALUE_TYPE><WPFP151><Write Protect Program Flash Page 151><97>
<SETTING_VALUE_TYPE><WPFP152><Write Protect Program Flash Page 152><98>
<SETTING_VALUE_TYPE><WPFP153><Write Protect Program Flash Page 153><99>
<SETTING_VALUE_TYPE><WPFP154><Write Protect Program Flash Page 154><9a>
<SETTING_VALUE_TYPE><WPFP155><Write Protect Program Flash Page 155><9b>
<SETTING_VALUE_TYPE><WPFP156><Write Protect Program Flash Page 156><9c>
<SETTING_VALUE_TYPE><WPFP157><Write Protect Program Flash Page 157><9d>
<SETTING_VALUE_TYPE><WPFP158><Write Protect Program Flash Page 158><9e>
<SETTING_VALUE_TYPE><WPFP159><Write Protect Program Flash Page 159><9f>
<SETTING_VALUE_TYPE><WPFP160><Write Protect Program Flash Page 160><a0>
<SETTING_VALUE_TYPE><WPFP161><Write Protect Program Flash Page 161><a1>
<SETTING_VALUE_TYPE><WPFP162><Write Protect Program Flash Page 162><a2>
<SETTING_VALUE_TYPE><WPFP163><Write Protect Program Flash Page 163><a3>
<SETTING_VALUE_TYPE><WPFP164><Write Protect Program Flash Page 164><a4>
<SETTING_VALUE_TYPE><WPFP165><Write Protect Program Flash Page 165><a5>
<SETTING_VALUE_TYPE><WPFP166><Write Protect Program Flash Page 166><a6>
<SETTING_VALUE_TYPE><WPFP167><Write Protect Program Flash Page 167><a7>
<SETTING_VALUE_TYPE><WPFP168><Write Protect Program Flash Page 168><a8>
<SETTING_VALUE_TYPE><WPFP169><Write Protect Program Flash Page 169><a9>
<SETTING_VALUE_TYPE><WPFP170><Write Protect Program Flash Page 170><aa>
<SETTING_VALUE_TYPE><WPFP171><Write Protect Program Flash Page 171><ab>
<SETTING_VALUE_TYPE><WPFP172><Write Protect Program Flash Page 172><ac>
<SETTING_VALUE_TYPE><WPFP173><Write Protect Program Flash Page 173><ad>
<SETTING_VALUE_TYPE><WPFP174><Write Protect Program Flash Page 174><ae>
<SETTING_VALUE_TYPE><WPFP175><Write Protect Program Flash Page 175><af>
<SETTING_VALUE_TYPE><WPFP176><Write Protect Program Flash Page 176><b0>
<SETTING_VALUE_TYPE><WPFP177><Write Protect Program Flash Page 177><b1>
<SETTING_VALUE_TYPE><WPFP178><Write Protect Program Flash Page 178><b2>
<SETTING_VALUE_TYPE><WPFP179><Write Protect Program Flash Page 179><b3>
<SETTING_VALUE_TYPE><WPFP180><Write Protect Program Flash Page 180><b4>
<SETTING_VALUE_TYPE><WPFP181><Write Protect Program Flash Page 181><b5>
<SETTING_VALUE_TYPE><WPFP182><Write Protect Program Flash Page 182><b6>
<SETTING_VALUE_TYPE><WPFP183><Write Protect Program Flash Page 183><b7>
<SETTING_VALUE_TYPE><WPFP184><Write Protect Program Flash Page 184><b8>
<SETTING_VALUE_TYPE><WPFP185><Write Protect Program Flash Page 185><b9>
<SETTING_VALUE_TYPE><WPFP186><Write Protect Program Flash Page 186><ba>
<SETTING_VALUE_TYPE><WPFP187><Write Protect Program Flash Page 187><bb>
<SETTING_VALUE_TYPE><WPFP188><Write Protect Program Flash Page 188><bc>
<SETTING_VALUE_TYPE><WPFP189><Write Protect Program Flash Page 189><bd>
<SETTING_VALUE_TYPE><WPFP190><Write Protect Program Flash Page 190><be>
<SETTING_VALUE_TYPE><WPFP191><Write Protect Program Flash Page 191><bf>
<SETTING_VALUE_TYPE><WPFP192><Write Protect Program Flash Page 192><c0>
<SETTING_VALUE_TYPE><WPFP193><Write Protect Program Flash Page 193><c1>
<SETTING_VALUE_TYPE><WPFP194><Write Protect Program Flash Page 194><c2>
<SETTING_VALUE_TYPE><WPFP195><Write Protect Program Flash Page 195><c3>
<SETTING_VALUE_TYPE><WPFP196><Write Protect Program Flash Page 196><c4>
<SETTING_VALUE_TYPE><WPFP197><Write Protect Program Flash Page 197><c5>
<SETTING_VALUE_TYPE><WPFP198><Write Protect Program Flash Page 198><c6>
<SETTING_VALUE_TYPE><WPFP199><Write Protect Program Flash Page 199><c7>
<SETTING_VALUE_TYPE><WPFP200><Write Protect Program Flash Page 200><c8>
<SETTING_VALUE_TYPE><WPFP201><Write Protect Program Flash Page 201><c9>
<SETTING_VALUE_TYPE><WPFP202><Write Protect Program Flash Page 202><ca>
<SETTING_VALUE_TYPE><WPFP203><Write Protect Program Flash Page 203><cb>
<SETTING_VALUE_TYPE><WPFP204><Write Protect Program Flash Page 204><cc>
<SETTING_VALUE_TYPE><WPFP205><Write Protect Program Flash Page 205><cd>
<SETTING_VALUE_TYPE><WPFP206><Write Protect Program Flash Page 206><ce>
<SETTING_VALUE_TYPE><WPFP207><Write Protect Program Flash Page 207><cf>
<SETTING_VALUE_TYPE><WPFP208><Write Protect Program Flash Page 208><d0>
<SETTING_VALUE_TYPE><WPFP209><Write Protect Program Flash Page 209><d1>
<SETTING_VALUE_TYPE><WPFP210><Write Protect Program Flash Page 210><d2>
<SETTING_VALUE_TYPE><WPFP211><Write Protect Program Flash Page 211><d3>
<SETTING_VALUE_TYPE><WPFP212><Write Protect Program Flash Page 212><d4>
<SETTING_VALUE_TYPE><WPFP213><Write Protect Program Flash Page 213><d5>
<SETTING_VALUE_TYPE><WPFP214><Write Protect Program Flash Page 214><d6>
<SETTING_VALUE_TYPE><WPFP215><Write Protect Program Flash Page 215><d7>
<SETTING_VALUE_TYPE><WPFP216><Write Protect Program Flash Page 216><d8>
<SETTING_VALUE_TYPE><WPFP217><Write Protect Program Flash Page 217><d9>
<SETTING_VALUE_TYPE><WPFP218><Write Protect Program Flash Page 218><da>
<SETTING_VALUE_TYPE><WPFP219><Write Protect Program Flash Page 219><db>
<SETTING_VALUE_TYPE><WPFP220><Write Protect Program Flash Page 220><dc>
<SETTING_VALUE_TYPE><WPFP221><Write Protect Program Flash Page 221><dd>
<SETTING_VALUE_TYPE><WPFP222><Write Protect Program Flash Page 222><de>
<SETTING_VALUE_TYPE><WPFP223><Write Protect Program Flash Page 223><df>
<SETTING_VALUE_TYPE><WPFP224><Write Protect Program Flash Page 224><e0>
<SETTING_VALUE_TYPE><WPFP225><Write Protect Program Flash Page 225><e1>
<SETTING_VALUE_TYPE><WPFP226><Write Protect Program Flash Page 226><e2>
<SETTING_VALUE_TYPE><WPFP227><Write Protect Program Flash Page 227><e3>
<SETTING_VALUE_TYPE><WPFP228><Write Protect Program Flash Page 228><e4>
<SETTING_VALUE_TYPE><WPFP229><Write Protect Program Flash Page 229><e5>
<SETTING_VALUE_TYPE><WPFP230><Write Protect Program Flash Page 230><e6>
<SETTING_VALUE_TYPE><WPFP231><Write Protect Program Flash Page 231><e7>
<SETTING_VALUE_TYPE><WPFP232><Write Protect Program Flash Page 232><e8>
<SETTING_VALUE_TYPE><WPFP233><Write Protect Program Flash Page 233><e9>
<SETTING_VALUE_TYPE><WPFP234><Write Protect Program Flash Page 234><ea>
<SETTING_VALUE_TYPE><WPFP235><Write Protect Program Flash Page 235><eb>
<SETTING_VALUE_TYPE><WPFP236><Write Protect Program Flash Page 236><ec>
<SETTING_VALUE_TYPE><WPFP237><Write Protect Program Flash Page 237><ed>
<SETTING_VALUE_TYPE><WPFP238><Write Protect Program Flash Page 238><ee>
<SETTING_VALUE_TYPE><WPFP239><Write Protect Program Flash Page 239><ef>
<SETTING_VALUE_TYPE><WPFP240><Write Protect Program Flash Page 240><f0>
<SETTING_VALUE_TYPE><WPFP241><Write Protect Program Flash Page 241><f1>
<SETTING_VALUE_TYPE><WPFP242><Write Protect Program Flash Page 242><f2>
<SETTING_VALUE_TYPE><WPFP243><Write Protect Program Flash Page 243><f3>
<SETTING_VALUE_TYPE><WPFP244><Write Protect Program Flash Page 244><f4>
<SETTING_VALUE_TYPE><WPFP245><Write Protect Program Flash Page 245><f5>
<SETTING_VALUE_TYPE><WPFP246><Write Protect Program Flash Page 246><f6>
<SETTING_VALUE_TYPE><WPFP247><Write Protect Program Flash Page 247><f7>
<SETTING_VALUE_TYPE><WPFP248><Write Protect Program Flash Page 248><f8>
<SETTING_VALUE_TYPE><WPFP249><Write Protect Program Flash Page 249><f9>
<SETTING_VALUE_TYPE><WPFP250><Write Protect Program Flash Page 250><fa>
<SETTING_VALUE_TYPE><WPFP251><Write Protect Program Flash Page 251><fb>
<SETTING_VALUE_TYPE><WPFP252><Write Protect Program Flash Page 252><fc>
<SETTING_VALUE_TYPE><WPFP253><Write Protect Program Flash Page 253><fd>
<SETTING_VALUE_TYPE><WPFP254><Write Protect Program Flash Page 254><fe>
<SETTING_VALUE_TYPE><WPFP255><Write Protect Program Flash Page 255><ff>
<CONFIGREG_INFO_TYPE><7ff7><0><f7><3>
<SWITCH_INFO_TYPE><WPDIS><Segment Write Protection Disable><1><2>
<SETTING_VALUE_TYPE><WPEN><Enabled><0>
<SETTING_VALUE_TYPE><WPDIS><Disabled><1>
<SWITCH_INFO_TYPE><WPEND><Segment Write Protection End Page Select><2><2>
<SETTING_VALUE_TYPE><WPSTARTMEM><write Protect from page 0 to WPFP><0>
<SETTING_VALUE_TYPE><WPENDMEM><Write Protect from WPFP to the last page of memory><2>
<SWITCH_INFO_TYPE><WPCFG><Write Protect Configuration Page Select><4><2>
<SETTING_VALUE_TYPE><WPCFGEN><Enabled><0>
<SETTING_VALUE_TYPE><WPCFGDIS><Disabled><4>
<CONFIGREG_INFO_TYPE><7ff8><0><fb><6>
<SWITCH_INFO_TYPE><T5GSEL><TMR5 Gate Select bit><1><2>
<SETTING_VALUE_TYPE><T3G><TMR5 Gate is driven by the T3G input><0>
<SETTING_VALUE_TYPE><T5G><TMR5 Gate is driven by the T5G input><1>
<SWITCH_INFO_TYPE><CINASEL><CxINA Gate Select bit><2><2>
<SETTING_VALUE_TYPE><RA5><C1INA and C3INA are all re-mapped to pin RA5><0>
<SETTING_VALUE_TYPE><DEFAULT><C1INA and C3INA are on their default pin locations><2>
<SWITCH_INFO_TYPE><EASHFT><External Address Shift bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address Shifting disabled><0>
<SETTING_VALUE_TYPE><ON><Address Shifting enabled><8>
<SWITCH_INFO_TYPE><ABW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><XM20><20-bit address bus><0>
<SETTING_VALUE_TYPE><XM16><16-bit address bus><10>
<SETTING_VALUE_TYPE><XM12><12-bit address bus><20>
<SETTING_VALUE_TYPE><MM><8-bit address bus><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><7ff9><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><the IOLOCK bit can be set and cleared using the unlock sequence><0>
<SETTING_VALUE_TYPE><ON><Once set, the IOLOCK bit cannot be cleared><1>
<SWITCH_INFO_TYPE><LS48MHZ><USB Low Speed Clock Select bit><2><2>
<SETTING_VALUE_TYPE><SYSX1><Divide-by-1 (System clock must be 6 MHz)><0>
<SETTING_VALUE_TYPE><SYSX2><Divide-by-2 (System clock must be 12 MHz)><2>
<SWITCH_INFO_TYPE><MSSPMSK2><MSSP2 7-Bit Address Masking Mode Enable bit><4><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><4>
<SWITCH_INFO_TYPE><MSSPMSK1><MSSP1 7-Bit Address Masking Mode Enable bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><7ffa><0><ff><3>
<SWITCH_INFO_TYPE><WDTWIN><Watch Dog Timer Window><3><4>
<SETTING_VALUE_TYPE><PS75_0><Watch Dog Timer Window Width is 75 percent><0>
<SETTING_VALUE_TYPE><PS50_0><Watch Dog Timer Window Width is 50 percent><1>
<SETTING_VALUE_TYPE><PS37_5><Watch Dog Timer Window Width is 37.5 percent><2>
<SETTING_VALUE_TYPE><PS25_0><Watch Dog Timer Window Width is 25 percent><3>
<SWITCH_INFO_TYPE><WDTCLK><Watch Dog Timer Clock Source><c><4>
<SETTING_VALUE_TYPE><SYS><Use FOSC/4 when system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><0>
<SETTING_VALUE_TYPE><SOSC><Always use SOSC><4>
<SETTING_VALUE_TYPE><LPRC><Always use INTOSC/LPRC><8>
<SETTING_VALUE_TYPE><FRC><Use FRC when WINDIS = 0, system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><c>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale><f0><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><10>
<SETTING_VALUE_TYPE><4><1:4><20>
<SETTING_VALUE_TYPE><8><1:8><30>
<SETTING_VALUE_TYPE><16><1:16><40>
<SETTING_VALUE_TYPE><32><1:32><50>
<SETTING_VALUE_TYPE><64><1:64><60>
<SETTING_VALUE_TYPE><128><1:128><70>
<SETTING_VALUE_TYPE><256><1:256><80>
<SETTING_VALUE_TYPE><512><1:512><90>
<SETTING_VALUE_TYPE><1024><1:1024><a0>
<SETTING_VALUE_TYPE><2048><1:2048><b0>
<SETTING_VALUE_TYPE><4096><1:4096><c0>
<SETTING_VALUE_TYPE><8192><1:8192><d0>
<SETTING_VALUE_TYPE><16384><1:16384><e0>
<SETTING_VALUE_TYPE><32768><1:32768><f0>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WINDIS><Windowed Watchdog Timer Disable><4><2>
<SETTING_VALUE_TYPE><WDTWIN><Windowed WDT enabled><0>
<SETTING_VALUE_TYPE><WDTSTD><Standard WDT selected; windowed WDT disabled><4>
<SWITCH_INFO_TYPE><WPSA><WDT Prescaler><8><2>
<SETTING_VALUE_TYPE><32><WDT prescaler ratio of 1:32><0>
<SETTING_VALUE_TYPE><128><WDT prescaler ratio of 1:128><8>
<CONFIGREG_INFO_TYPE><7ffc><0><1d><4>
<SWITCH_INFO_TYPE><RETEN><Retention Voltage Regulator Control Enable><1><2>
<SETTING_VALUE_TYPE><ON><Retention controlled by SRETEN during Sleep><0>
<SETTING_VALUE_TYPE><OFF><Retention not available><1>
<SWITCH_INFO_TYPE><VBTBOR><VBAT BOR Enable><4><2>
<SETTING_VALUE_TYPE><OFF><VBAT BOR is disabled><0>
<SETTING_VALUE_TYPE><ON><VBAT BOR is enabled><4>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR Enable><8><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled in Deep Sleep (does not affect operation in non-Deep Sleep modes)><0>
<SETTING_VALUE_TYPE><ON><BOR enabled in Deep Sleep><8>
<SWITCH_INFO_TYPE><DSBITEN><DSEN Bit Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Deep Sleep operation is always disabled><0>
<SETTING_VALUE_TYPE><ON><Deep Sleep is controlled by the register bit DSEN><10>
<CONFIGREG_INFO_TYPE><7ffd><0><f0><0>
<CONFIGREG_INFO_TYPE><7ffe><0><f8><1>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Timer Postscale Select><f8><20>
<SETTING_VALUE_TYPE><DSWDTPS0><1:32 (1 mS)><0>
<SETTING_VALUE_TYPE><DSWDTPS1><1:64 (2.1 mS)><8>
<SETTING_VALUE_TYPE><DSWDTPS2><1:128 (4.1 mS)><10>
<SETTING_VALUE_TYPE><DSWDTPS3><1: 256 (8.3 mS)><18>
<SETTING_VALUE_TYPE><DSWDTPS4><1:512 (16.5 mS)><20>
<SETTING_VALUE_TYPE><DSWDTPS5><1:1024 (33 mS)><28>
<SETTING_VALUE_TYPE><DSWDTPS6><1:2048 (66.1 mS)><30>
<SETTING_VALUE_TYPE><DSWDTPS7><1:4096 (132.1 mS)><38>
<SETTING_VALUE_TYPE><DSWDTPS8><1:8192 (264.3 mS)><40>
<SETTING_VALUE_TYPE><DSWDTPS9><1:16384 (528.5 mS)><48>
<SETTING_VALUE_TYPE><DSWDTPSA><1:32768 (1.057 Secs)><50>
<SETTING_VALUE_TYPE><DSWDTPSB><1:65536 (2.114 Secs)><58>
<SETTING_VALUE_TYPE><DSWDTPSC><1:131072 (4.228 Secs)><60>
<SETTING_VALUE_TYPE><DSWDTPSD><1:262114 (8.456 Secs)><68>
<SETTING_VALUE_TYPE><DSWDTPSE><1:524288 (16.912 Secs)><70>
<SETTING_VALUE_TYPE><DSWDTPSF><1:1048576 (33.825 Secs)><78>
<SETTING_VALUE_TYPE><DSWDTPS10><1:2097152 (67.7 Secs)><80>
<SETTING_VALUE_TYPE><DSWDTPS11><1:4194304 (135.3 Secs)><88>
<SETTING_VALUE_TYPE><DSWDTPS12><1:8388608 (4.5 Minutes)><90>
<SETTING_VALUE_TYPE><DSWDTPS13><1:16777216 (9 Minutes)><98>
<SETTING_VALUE_TYPE><DSWDTPS14><1:33554432 (18 Minutes)><a0>
<SETTING_VALUE_TYPE><DSWDTPS15><1:67108864 (36.1 Minutes)><a8>
<SETTING_VALUE_TYPE><DSWDTPS16><1:134217728 (72.2 Minutes)><b0>
<SETTING_VALUE_TYPE><DSWDTPS17><1:268435456 (2.4 Hours)><b8>
<SETTING_VALUE_TYPE><DSWDTPS18><1:536870912 (4.8 Hours)><c0>
<SETTING_VALUE_TYPE><DSWDTPS19><1:1073741824 (9.6 Hours)><c8>
<SETTING_VALUE_TYPE><DSWDTPS1A><1:2147483648 (19.2 Hours)><d0>
<SETTING_VALUE_TYPE><DSWDTPS1B><1:4294967296 (38.5 Hours)><d8>
<SETTING_VALUE_TYPE><DSWDTPS1C><1:8589934592 (77 Hours)><e0>
<SETTING_VALUE_TYPE><DSWDTPS1D><1:17179869184 (6.4 Days)><e8>
<SETTING_VALUE_TYPE><DSWDTPS1E><1:34359738368 (12.8  Days)><f0>
<SETTING_VALUE_TYPE><DSWDTPS1F><1:68719476736 (25.7 Days)><f8>
<CONFIGREG_INFO_TYPE><7fff><0><f3><2>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer Enable><1><2>
<SETTING_VALUE_TYPE><OFF><DSWDT Disabled><0>
<SETTING_VALUE_TYPE><ON><DSWDT Enabled><1>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Reference Clock Select><2><2>
<SETTING_VALUE_TYPE><SOSC><DSWDT uses SOSC as reference clock><0>
<SETTING_VALUE_TYPE><LPRC><DSWDT uses LPRC as reference clock><2>
<PART_INFO_TYPE><d660><PIC18F96J60><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVR><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLKO function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled; address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled; address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode, 20-Bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode,16-Bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode,12-Bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode, external bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-Bit Data Width mode><0>
<SETTING_VALUE_TYPE><16><16-Bit Data Width mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states for operations on external memory bus enabled and selected by MEMCON<5:4>><0>
<SETTING_VALUE_TYPE><OFF><Wait states for operations on external memory bus disabled><80>
<CONFIGREG_INFO_TYPE><fffd><0><f7><3>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode (80-pin and 100-pin devices) or with RB3 in Extended Microcontroller mode (100-pin devices only)><0>
<SETTING_VALUE_TYPE><ON><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><OFF><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><ON><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<SWITCH_INFO_TYPE><ETHLED><Ethernet LED Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><RA0/RA1 function as I/O regardless of Ethernet module status><0>
<SETTING_VALUE_TYPE><ON><RA0/RA1 are multiplexed with LEDA/LEDB when Ethernet module is enabled and function as I/O when Ethernet is disabled><4>
<PART_INFO_TYPE><d665><PIC18F96J65><18xxxx><6><1><17ff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><17ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVR><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><17ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><17ffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLKO function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><17ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><17ffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled; address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled; address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode, 20-Bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode,16-Bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode,12-Bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode, external bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-Bit Data Width mode><0>
<SETTING_VALUE_TYPE><16><16-Bit Data Width mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states for operations on external memory bus enabled and selected by MEMCON<5:4>><0>
<SETTING_VALUE_TYPE><OFF><Wait states for operations on external memory bus disabled><80>
<CONFIGREG_INFO_TYPE><17ffd><0><f7><3>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode (80-pin and 100-pin devices) or with RB3 in Extended Microcontroller mode (100-pin devices only)><0>
<SETTING_VALUE_TYPE><ON><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><OFF><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><ON><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<SWITCH_INFO_TYPE><ETHLED><Ethernet LED Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><RA0/RA1 function as I/O regardless of Ethernet module status><0>
<SETTING_VALUE_TYPE><ON><RA0/RA1 are multiplexed with LEDA/LEDB when Ethernet module is enabled and function as I/O when Ethernet is disabled><4>
<PART_INFO_TYPE><9694><PIC18F96J94><18xxxx><6><1><ffef><10><ff><0><0-5f><f60-fff><0><10>
<CONFIGREG_INFO_TYPE><fff0><0><e0><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><fff1><0><f7><3>
<SWITCH_INFO_TYPE><BOREN><Brown-Out Reset Enable><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit, disabled in Deep Sleep><1>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><2><2>
<SETTING_VALUE_TYPE><0><2.0V><0>
<SETTING_VALUE_TYPE><1><1.8V><2>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fff2><0><af><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><FRC><Fast RC Oscillator (FRC)><0>
<SETTING_VALUE_TYPE><FRCPLL><Fast RC Oscillator with PLL module (FRCPLL)><1>
<SETTING_VALUE_TYPE><PRI><Primary Oscillator (XT, HS, EC)><2>
<SETTING_VALUE_TYPE><PRIPLL><Primary Oscillator with PLL module (XTPLL,HSPLL,ECPLL)><3>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator (SOSC)><4>
<SETTING_VALUE_TYPE><LPRC><Low-Power RC Oscillator (LPRC)><5>
<SETTING_VALUE_TYPE><FRC500KHZ><Fast RC Oscillator divided by 16 (500 kHz)><6>
<SETTING_VALUE_TYPE><FRCDIV><Fast RC Oscillator with Postscaler (FRCDIV)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><8><2>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SWITCH_INFO_TYPE><CLKOEN><Clock Out Enable Bit><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fff3><0><ff><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Frequency Multiplier Select bits><f><10>
<SETTING_VALUE_TYPE><NODIV><96 MHz PLL selected; No divide - Oscillator used directly (4 MHz input)><0>
<SETTING_VALUE_TYPE><DIV2><96 MHz PLL selected; Oscillator divided by 2 (8 MHz input)><1>
<SETTING_VALUE_TYPE><DIV3><96 MHz PLL selected; Oscillator divided by 3 (12 MHz input)><2>
<SETTING_VALUE_TYPE><DIV4><96 MHz PLL selected; Oscillator divided by 4 (16 MHz input)><3>
<SETTING_VALUE_TYPE><DIV5><96 MHz PLL selected; Oscillator divided by 5 (20 MHz input)><4>
<SETTING_VALUE_TYPE><DIV6><96 MHz PLL selected; Oscillator divided by 6 (24 MHz input)><5>
<SETTING_VALUE_TYPE><DIV10><96 MHz PLL selected; Oscillator divided by 10 (40 MHz input)><6>
<SETTING_VALUE_TYPE><DIV12><96 MHz PLL selected; Oscillator divided by 12 (48 MHz input)><7>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><8>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><9>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><a>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><b>
<SETTING_VALUE_TYPE><PLL4X><4x PLL selected><c>
<SETTING_VALUE_TYPE><PLL6X><6x PLL selected><d>
<SETTING_VALUE_TYPE><PLL8X><8x PLL selected><e>
<SETTING_VALUE_TYPE><NOPLL><No PLL used - PLLGO bit not available to user><f>
<CONFIGREG_INFO_TYPE><fff4><0><33><2>
<SWITCH_INFO_TYPE><POSCMD><Primary Oscillator Select><3><4>
<SETTING_VALUE_TYPE><EC><External clock mode selected><0>
<SETTING_VALUE_TYPE><MS><MS oscillator mode selected(3.5 MHz -10 MHz)><1>
<SETTING_VALUE_TYPE><HS><HS oscillator mode selected(10 MHz - 40 MHz)><2>
<SETTING_VALUE_TYPE><NONE><Primary oscillator disabled><3>
<SWITCH_INFO_TYPE><FSCM><Clock Switching and Monitor Selection Configuration bits><30><3>
<SETTING_VALUE_TYPE><CSECME><Clock switching is enabled, fail safe clock monitor is enabled><0>
<SETTING_VALUE_TYPE><CSECMD><Clock switching is enabled, fail safe clock monitor is disabled><10>
<SETTING_VALUE_TYPE><CSDCMD><Clock switching is disabled, fail safe clock monitor is disabled><20>
<CONFIGREG_INFO_TYPE><fff5><0><f0><0>
<CONFIGREG_INFO_TYPE><fff6><0><ff><1>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Boundary><ff><100>
<SETTING_VALUE_TYPE><WPFP0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><WPFP1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><WPFP2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><WPFP3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><WPFP4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><WPFP5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><WPFP6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><WPFP7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><WPFP8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><WPFP9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><WPFP10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><WPFP11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><WPFP12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><WPFP13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><WPFP14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><WPFP15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><WPFP16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><WPFP17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><WPFP18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><WPFP19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><WPFP20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><WPFP21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><WPFP22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><WPFP23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><WPFP24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><WPFP25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><WPFP26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><WPFP27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><WPFP28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><WPFP29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><WPFP30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><WPFP31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><WPFP32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><WPFP33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><WPFP34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><WPFP35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><WPFP36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><WPFP37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><WPFP38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><WPFP39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><WPFP40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><WPFP41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><WPFP42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><WPFP43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><WPFP44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><WPFP45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><WPFP46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><WPFP47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><WPFP48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><WPFP49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><WPFP50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><WPFP51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><WPFP52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><WPFP53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><WPFP54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><WPFP55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><WPFP56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><WPFP57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><WPFP58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><WPFP59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><WPFP60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><WPFP61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><WPFP62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><WPFP63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><WPFP64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><WPFP65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><WPFP66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><WPFP67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><WPFP68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><WPFP69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><WPFP70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><WPFP71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><WPFP72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><WPFP73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><WPFP74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><WPFP75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><WPFP76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><WPFP77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><WPFP78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><WPFP79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><WPFP80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><WPFP81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><WPFP82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><WPFP83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><WPFP84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><WPFP85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><WPFP86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><WPFP87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><WPFP88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><WPFP89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><WPFP90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><WPFP91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><WPFP92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><WPFP93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><WPFP94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><WPFP95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><WPFP96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><WPFP97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><WPFP98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><WPFP99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><WPFP100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><WPFP101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><WPFP102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><WPFP103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><WPFP104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><WPFP105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><WPFP106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><WPFP107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><WPFP108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><WPFP109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><WPFP110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><WPFP111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><WPFP112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><WPFP113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><WPFP114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><WPFP115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><WPFP116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><WPFP117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><WPFP118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><WPFP119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><WPFP120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><WPFP121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><WPFP122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><WPFP123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><WPFP124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><WPFP125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><WPFP126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><WPFP127><Write Protect Program Flash Page 127><7f>
<SETTING_VALUE_TYPE><WPFP128><Write Protect Program Flash Page 128><80>
<SETTING_VALUE_TYPE><WPFP129><Write Protect Program Flash Page 129><81>
<SETTING_VALUE_TYPE><WPFP130><Write Protect Program Flash Page 130><82>
<SETTING_VALUE_TYPE><WPFP131><Write Protect Program Flash Page 131><83>
<SETTING_VALUE_TYPE><WPFP132><Write Protect Program Flash Page 132><84>
<SETTING_VALUE_TYPE><WPFP133><Write Protect Program Flash Page 133><85>
<SETTING_VALUE_TYPE><WPFP134><Write Protect Program Flash Page 134><86>
<SETTING_VALUE_TYPE><WPFP135><Write Protect Program Flash Page 135><87>
<SETTING_VALUE_TYPE><WPFP136><Write Protect Program Flash Page 136><88>
<SETTING_VALUE_TYPE><WPFP137><Write Protect Program Flash Page 137><89>
<SETTING_VALUE_TYPE><WPFP138><Write Protect Program Flash Page 138><8a>
<SETTING_VALUE_TYPE><WPFP139><Write Protect Program Flash Page 139><8b>
<SETTING_VALUE_TYPE><WPFP140><Write Protect Program Flash Page 140><8c>
<SETTING_VALUE_TYPE><WPFP141><Write Protect Program Flash Page 141><8d>
<SETTING_VALUE_TYPE><WPFP142><Write Protect Program Flash Page 142><8e>
<SETTING_VALUE_TYPE><WPFP143><Write Protect Program Flash Page 143><8f>
<SETTING_VALUE_TYPE><WPFP144><Write Protect Program Flash Page 144><90>
<SETTING_VALUE_TYPE><WPFP145><Write Protect Program Flash Page 145><91>
<SETTING_VALUE_TYPE><WPFP146><Write Protect Program Flash Page 146><92>
<SETTING_VALUE_TYPE><WPFP147><Write Protect Program Flash Page 147><93>
<SETTING_VALUE_TYPE><WPFP148><Write Protect Program Flash Page 148><94>
<SETTING_VALUE_TYPE><WPFP149><Write Protect Program Flash Page 149><95>
<SETTING_VALUE_TYPE><WPFP150><Write Protect Program Flash Page 150><96>
<SETTING_VALUE_TYPE><WPFP151><Write Protect Program Flash Page 151><97>
<SETTING_VALUE_TYPE><WPFP152><Write Protect Program Flash Page 152><98>
<SETTING_VALUE_TYPE><WPFP153><Write Protect Program Flash Page 153><99>
<SETTING_VALUE_TYPE><WPFP154><Write Protect Program Flash Page 154><9a>
<SETTING_VALUE_TYPE><WPFP155><Write Protect Program Flash Page 155><9b>
<SETTING_VALUE_TYPE><WPFP156><Write Protect Program Flash Page 156><9c>
<SETTING_VALUE_TYPE><WPFP157><Write Protect Program Flash Page 157><9d>
<SETTING_VALUE_TYPE><WPFP158><Write Protect Program Flash Page 158><9e>
<SETTING_VALUE_TYPE><WPFP159><Write Protect Program Flash Page 159><9f>
<SETTING_VALUE_TYPE><WPFP160><Write Protect Program Flash Page 160><a0>
<SETTING_VALUE_TYPE><WPFP161><Write Protect Program Flash Page 161><a1>
<SETTING_VALUE_TYPE><WPFP162><Write Protect Program Flash Page 162><a2>
<SETTING_VALUE_TYPE><WPFP163><Write Protect Program Flash Page 163><a3>
<SETTING_VALUE_TYPE><WPFP164><Write Protect Program Flash Page 164><a4>
<SETTING_VALUE_TYPE><WPFP165><Write Protect Program Flash Page 165><a5>
<SETTING_VALUE_TYPE><WPFP166><Write Protect Program Flash Page 166><a6>
<SETTING_VALUE_TYPE><WPFP167><Write Protect Program Flash Page 167><a7>
<SETTING_VALUE_TYPE><WPFP168><Write Protect Program Flash Page 168><a8>
<SETTING_VALUE_TYPE><WPFP169><Write Protect Program Flash Page 169><a9>
<SETTING_VALUE_TYPE><WPFP170><Write Protect Program Flash Page 170><aa>
<SETTING_VALUE_TYPE><WPFP171><Write Protect Program Flash Page 171><ab>
<SETTING_VALUE_TYPE><WPFP172><Write Protect Program Flash Page 172><ac>
<SETTING_VALUE_TYPE><WPFP173><Write Protect Program Flash Page 173><ad>
<SETTING_VALUE_TYPE><WPFP174><Write Protect Program Flash Page 174><ae>
<SETTING_VALUE_TYPE><WPFP175><Write Protect Program Flash Page 175><af>
<SETTING_VALUE_TYPE><WPFP176><Write Protect Program Flash Page 176><b0>
<SETTING_VALUE_TYPE><WPFP177><Write Protect Program Flash Page 177><b1>
<SETTING_VALUE_TYPE><WPFP178><Write Protect Program Flash Page 178><b2>
<SETTING_VALUE_TYPE><WPFP179><Write Protect Program Flash Page 179><b3>
<SETTING_VALUE_TYPE><WPFP180><Write Protect Program Flash Page 180><b4>
<SETTING_VALUE_TYPE><WPFP181><Write Protect Program Flash Page 181><b5>
<SETTING_VALUE_TYPE><WPFP182><Write Protect Program Flash Page 182><b6>
<SETTING_VALUE_TYPE><WPFP183><Write Protect Program Flash Page 183><b7>
<SETTING_VALUE_TYPE><WPFP184><Write Protect Program Flash Page 184><b8>
<SETTING_VALUE_TYPE><WPFP185><Write Protect Program Flash Page 185><b9>
<SETTING_VALUE_TYPE><WPFP186><Write Protect Program Flash Page 186><ba>
<SETTING_VALUE_TYPE><WPFP187><Write Protect Program Flash Page 187><bb>
<SETTING_VALUE_TYPE><WPFP188><Write Protect Program Flash Page 188><bc>
<SETTING_VALUE_TYPE><WPFP189><Write Protect Program Flash Page 189><bd>
<SETTING_VALUE_TYPE><WPFP190><Write Protect Program Flash Page 190><be>
<SETTING_VALUE_TYPE><WPFP191><Write Protect Program Flash Page 191><bf>
<SETTING_VALUE_TYPE><WPFP192><Write Protect Program Flash Page 192><c0>
<SETTING_VALUE_TYPE><WPFP193><Write Protect Program Flash Page 193><c1>
<SETTING_VALUE_TYPE><WPFP194><Write Protect Program Flash Page 194><c2>
<SETTING_VALUE_TYPE><WPFP195><Write Protect Program Flash Page 195><c3>
<SETTING_VALUE_TYPE><WPFP196><Write Protect Program Flash Page 196><c4>
<SETTING_VALUE_TYPE><WPFP197><Write Protect Program Flash Page 197><c5>
<SETTING_VALUE_TYPE><WPFP198><Write Protect Program Flash Page 198><c6>
<SETTING_VALUE_TYPE><WPFP199><Write Protect Program Flash Page 199><c7>
<SETTING_VALUE_TYPE><WPFP200><Write Protect Program Flash Page 200><c8>
<SETTING_VALUE_TYPE><WPFP201><Write Protect Program Flash Page 201><c9>
<SETTING_VALUE_TYPE><WPFP202><Write Protect Program Flash Page 202><ca>
<SETTING_VALUE_TYPE><WPFP203><Write Protect Program Flash Page 203><cb>
<SETTING_VALUE_TYPE><WPFP204><Write Protect Program Flash Page 204><cc>
<SETTING_VALUE_TYPE><WPFP205><Write Protect Program Flash Page 205><cd>
<SETTING_VALUE_TYPE><WPFP206><Write Protect Program Flash Page 206><ce>
<SETTING_VALUE_TYPE><WPFP207><Write Protect Program Flash Page 207><cf>
<SETTING_VALUE_TYPE><WPFP208><Write Protect Program Flash Page 208><d0>
<SETTING_VALUE_TYPE><WPFP209><Write Protect Program Flash Page 209><d1>
<SETTING_VALUE_TYPE><WPFP210><Write Protect Program Flash Page 210><d2>
<SETTING_VALUE_TYPE><WPFP211><Write Protect Program Flash Page 211><d3>
<SETTING_VALUE_TYPE><WPFP212><Write Protect Program Flash Page 212><d4>
<SETTING_VALUE_TYPE><WPFP213><Write Protect Program Flash Page 213><d5>
<SETTING_VALUE_TYPE><WPFP214><Write Protect Program Flash Page 214><d6>
<SETTING_VALUE_TYPE><WPFP215><Write Protect Program Flash Page 215><d7>
<SETTING_VALUE_TYPE><WPFP216><Write Protect Program Flash Page 216><d8>
<SETTING_VALUE_TYPE><WPFP217><Write Protect Program Flash Page 217><d9>
<SETTING_VALUE_TYPE><WPFP218><Write Protect Program Flash Page 218><da>
<SETTING_VALUE_TYPE><WPFP219><Write Protect Program Flash Page 219><db>
<SETTING_VALUE_TYPE><WPFP220><Write Protect Program Flash Page 220><dc>
<SETTING_VALUE_TYPE><WPFP221><Write Protect Program Flash Page 221><dd>
<SETTING_VALUE_TYPE><WPFP222><Write Protect Program Flash Page 222><de>
<SETTING_VALUE_TYPE><WPFP223><Write Protect Program Flash Page 223><df>
<SETTING_VALUE_TYPE><WPFP224><Write Protect Program Flash Page 224><e0>
<SETTING_VALUE_TYPE><WPFP225><Write Protect Program Flash Page 225><e1>
<SETTING_VALUE_TYPE><WPFP226><Write Protect Program Flash Page 226><e2>
<SETTING_VALUE_TYPE><WPFP227><Write Protect Program Flash Page 227><e3>
<SETTING_VALUE_TYPE><WPFP228><Write Protect Program Flash Page 228><e4>
<SETTING_VALUE_TYPE><WPFP229><Write Protect Program Flash Page 229><e5>
<SETTING_VALUE_TYPE><WPFP230><Write Protect Program Flash Page 230><e6>
<SETTING_VALUE_TYPE><WPFP231><Write Protect Program Flash Page 231><e7>
<SETTING_VALUE_TYPE><WPFP232><Write Protect Program Flash Page 232><e8>
<SETTING_VALUE_TYPE><WPFP233><Write Protect Program Flash Page 233><e9>
<SETTING_VALUE_TYPE><WPFP234><Write Protect Program Flash Page 234><ea>
<SETTING_VALUE_TYPE><WPFP235><Write Protect Program Flash Page 235><eb>
<SETTING_VALUE_TYPE><WPFP236><Write Protect Program Flash Page 236><ec>
<SETTING_VALUE_TYPE><WPFP237><Write Protect Program Flash Page 237><ed>
<SETTING_VALUE_TYPE><WPFP238><Write Protect Program Flash Page 238><ee>
<SETTING_VALUE_TYPE><WPFP239><Write Protect Program Flash Page 239><ef>
<SETTING_VALUE_TYPE><WPFP240><Write Protect Program Flash Page 240><f0>
<SETTING_VALUE_TYPE><WPFP241><Write Protect Program Flash Page 241><f1>
<SETTING_VALUE_TYPE><WPFP242><Write Protect Program Flash Page 242><f2>
<SETTING_VALUE_TYPE><WPFP243><Write Protect Program Flash Page 243><f3>
<SETTING_VALUE_TYPE><WPFP244><Write Protect Program Flash Page 244><f4>
<SETTING_VALUE_TYPE><WPFP245><Write Protect Program Flash Page 245><f5>
<SETTING_VALUE_TYPE><WPFP246><Write Protect Program Flash Page 246><f6>
<SETTING_VALUE_TYPE><WPFP247><Write Protect Program Flash Page 247><f7>
<SETTING_VALUE_TYPE><WPFP248><Write Protect Program Flash Page 248><f8>
<SETTING_VALUE_TYPE><WPFP249><Write Protect Program Flash Page 249><f9>
<SETTING_VALUE_TYPE><WPFP250><Write Protect Program Flash Page 250><fa>
<SETTING_VALUE_TYPE><WPFP251><Write Protect Program Flash Page 251><fb>
<SETTING_VALUE_TYPE><WPFP252><Write Protect Program Flash Page 252><fc>
<SETTING_VALUE_TYPE><WPFP253><Write Protect Program Flash Page 253><fd>
<SETTING_VALUE_TYPE><WPFP254><Write Protect Program Flash Page 254><fe>
<SETTING_VALUE_TYPE><WPFP255><Write Protect Program Flash Page 255><ff>
<CONFIGREG_INFO_TYPE><fff7><0><f7><3>
<SWITCH_INFO_TYPE><WPDIS><Segment Write Protection Disable><1><2>
<SETTING_VALUE_TYPE><WPEN><Enabled><0>
<SETTING_VALUE_TYPE><WPDIS><Disabled><1>
<SWITCH_INFO_TYPE><WPEND><Segment Write Protection End Page Select><2><2>
<SETTING_VALUE_TYPE><WPSTARTMEM><write Protect from page 0 to WPFP><0>
<SETTING_VALUE_TYPE><WPENDMEM><Write Protect from WPFP to the last page of memory><2>
<SWITCH_INFO_TYPE><WPCFG><Write Protect Configuration Page Select><4><2>
<SETTING_VALUE_TYPE><WPCFGEN><Enabled><0>
<SETTING_VALUE_TYPE><WPCFGDIS><Disabled><4>
<CONFIGREG_INFO_TYPE><fff8><0><fb><6>
<SWITCH_INFO_TYPE><T5GSEL><TMR5 Gate Select bit><1><2>
<SETTING_VALUE_TYPE><T3G><TMR5 Gate is driven by the T3G input><0>
<SETTING_VALUE_TYPE><T5G><TMR5 Gate is driven by the T5G input><1>
<SWITCH_INFO_TYPE><CINASEL><CxINA Gate Select bit><2><2>
<SETTING_VALUE_TYPE><RA5><C1INA and C3INA are all re-mapped to pin RA5><0>
<SETTING_VALUE_TYPE><DEFAULT><C1INA and C3INA are on their default pin locations><2>
<SWITCH_INFO_TYPE><EASHFT><External Address Shift bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address Shifting disabled><0>
<SETTING_VALUE_TYPE><ON><Address Shifting enabled><8>
<SWITCH_INFO_TYPE><ABW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><XM20><20-bit address bus><0>
<SETTING_VALUE_TYPE><XM16><16-bit address bus><10>
<SETTING_VALUE_TYPE><XM12><12-bit address bus><20>
<SETTING_VALUE_TYPE><MM><8-bit address bus><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><fff9><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><the IOLOCK bit can be set and cleared using the unlock sequence><0>
<SETTING_VALUE_TYPE><ON><Once set, the IOLOCK bit cannot be cleared><1>
<SWITCH_INFO_TYPE><LS48MHZ><USB Low Speed Clock Select bit><2><2>
<SETTING_VALUE_TYPE><SYSX1><Divide-by-1 (System clock must be 6 MHz)><0>
<SETTING_VALUE_TYPE><SYSX2><Divide-by-2 (System clock must be 12 MHz)><2>
<SWITCH_INFO_TYPE><MSSPMSK2><MSSP2 7-Bit Address Masking Mode Enable bit><4><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><4>
<SWITCH_INFO_TYPE><MSSPMSK1><MSSP1 7-Bit Address Masking Mode Enable bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffa><0><ff><3>
<SWITCH_INFO_TYPE><WDTWIN><Watch Dog Timer Window><3><4>
<SETTING_VALUE_TYPE><PS75_0><Watch Dog Timer Window Width is 75 percent><0>
<SETTING_VALUE_TYPE><PS50_0><Watch Dog Timer Window Width is 50 percent><1>
<SETTING_VALUE_TYPE><PS37_5><Watch Dog Timer Window Width is 37.5 percent><2>
<SETTING_VALUE_TYPE><PS25_0><Watch Dog Timer Window Width is 25 percent><3>
<SWITCH_INFO_TYPE><WDTCLK><Watch Dog Timer Clock Source><c><4>
<SETTING_VALUE_TYPE><SYS><Use FOSC/4 when system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><0>
<SETTING_VALUE_TYPE><SOSC><Always use SOSC><4>
<SETTING_VALUE_TYPE><LPRC><Always use INTOSC/LPRC><8>
<SETTING_VALUE_TYPE><FRC><Use FRC when WINDIS = 0, system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><c>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale><f0><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><10>
<SETTING_VALUE_TYPE><4><1:4><20>
<SETTING_VALUE_TYPE><8><1:8><30>
<SETTING_VALUE_TYPE><16><1:16><40>
<SETTING_VALUE_TYPE><32><1:32><50>
<SETTING_VALUE_TYPE><64><1:64><60>
<SETTING_VALUE_TYPE><128><1:128><70>
<SETTING_VALUE_TYPE><256><1:256><80>
<SETTING_VALUE_TYPE><512><1:512><90>
<SETTING_VALUE_TYPE><1024><1:1024><a0>
<SETTING_VALUE_TYPE><2048><1:2048><b0>
<SETTING_VALUE_TYPE><4096><1:4096><c0>
<SETTING_VALUE_TYPE><8192><1:8192><d0>
<SETTING_VALUE_TYPE><16384><1:16384><e0>
<SETTING_VALUE_TYPE><32768><1:32768><f0>
<CONFIGREG_INFO_TYPE><fffb><0><ff><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WINDIS><Windowed Watchdog Timer Disable><4><2>
<SETTING_VALUE_TYPE><WDTWIN><Windowed WDT enabled><0>
<SETTING_VALUE_TYPE><WDTSTD><Standard WDT selected; windowed WDT disabled><4>
<SWITCH_INFO_TYPE><WPSA><WDT Prescaler><8><2>
<SETTING_VALUE_TYPE><32><WDT prescaler ratio of 1:32><0>
<SETTING_VALUE_TYPE><128><WDT prescaler ratio of 1:128><8>
<CONFIGREG_INFO_TYPE><fffc><0><1d><4>
<SWITCH_INFO_TYPE><RETEN><Retention Voltage Regulator Control Enable><1><2>
<SETTING_VALUE_TYPE><ON><Retention controlled by SRETEN during Sleep><0>
<SETTING_VALUE_TYPE><OFF><Retention not available><1>
<SWITCH_INFO_TYPE><VBTBOR><VBAT BOR Enable><4><2>
<SETTING_VALUE_TYPE><OFF><VBAT BOR is disabled><0>
<SETTING_VALUE_TYPE><ON><VBAT BOR is enabled><4>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR Enable><8><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled in Deep Sleep (does not affect operation in non-Deep Sleep modes)><0>
<SETTING_VALUE_TYPE><ON><BOR enabled in Deep Sleep><8>
<SWITCH_INFO_TYPE><DSBITEN><DSEN Bit Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Deep Sleep operation is always disabled><0>
<SETTING_VALUE_TYPE><ON><Deep Sleep is controlled by the register bit DSEN><10>
<CONFIGREG_INFO_TYPE><fffd><0><f0><0>
<CONFIGREG_INFO_TYPE><fffe><0><f8><1>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Timer Postscale Select><f8><20>
<SETTING_VALUE_TYPE><DSWDTPS0><1:32 (1 mS)><0>
<SETTING_VALUE_TYPE><DSWDTPS1><1:64 (2.1 mS)><8>
<SETTING_VALUE_TYPE><DSWDTPS2><1:128 (4.1 mS)><10>
<SETTING_VALUE_TYPE><DSWDTPS3><1: 256 (8.3 mS)><18>
<SETTING_VALUE_TYPE><DSWDTPS4><1:512 (16.5 mS)><20>
<SETTING_VALUE_TYPE><DSWDTPS5><1:1024 (33 mS)><28>
<SETTING_VALUE_TYPE><DSWDTPS6><1:2048 (66.1 mS)><30>
<SETTING_VALUE_TYPE><DSWDTPS7><1:4096 (132.1 mS)><38>
<SETTING_VALUE_TYPE><DSWDTPS8><1:8192 (264.3 mS)><40>
<SETTING_VALUE_TYPE><DSWDTPS9><1:16384 (528.5 mS)><48>
<SETTING_VALUE_TYPE><DSWDTPSA><1:32768 (1.057 Secs)><50>
<SETTING_VALUE_TYPE><DSWDTPSB><1:65536 (2.114 Secs)><58>
<SETTING_VALUE_TYPE><DSWDTPSC><1:131072 (4.228 Secs)><60>
<SETTING_VALUE_TYPE><DSWDTPSD><1:262114 (8.456 Secs)><68>
<SETTING_VALUE_TYPE><DSWDTPSE><1:524288 (16.912 Secs)><70>
<SETTING_VALUE_TYPE><DSWDTPSF><1:1048576 (33.825 Secs)><78>
<SETTING_VALUE_TYPE><DSWDTPS10><1:2097152 (67.7 Secs)><80>
<SETTING_VALUE_TYPE><DSWDTPS11><1:4194304 (135.3 Secs)><88>
<SETTING_VALUE_TYPE><DSWDTPS12><1:8388608 (4.5 Minutes)><90>
<SETTING_VALUE_TYPE><DSWDTPS13><1:16777216 (9 Minutes)><98>
<SETTING_VALUE_TYPE><DSWDTPS14><1:33554432 (18 Minutes)><a0>
<SETTING_VALUE_TYPE><DSWDTPS15><1:67108864 (36.1 Minutes)><a8>
<SETTING_VALUE_TYPE><DSWDTPS16><1:134217728 (72.2 Minutes)><b0>
<SETTING_VALUE_TYPE><DSWDTPS17><1:268435456 (2.4 Hours)><b8>
<SETTING_VALUE_TYPE><DSWDTPS18><1:536870912 (4.8 Hours)><c0>
<SETTING_VALUE_TYPE><DSWDTPS19><1:1073741824 (9.6 Hours)><c8>
<SETTING_VALUE_TYPE><DSWDTPS1A><1:2147483648 (19.2 Hours)><d0>
<SETTING_VALUE_TYPE><DSWDTPS1B><1:4294967296 (38.5 Hours)><d8>
<SETTING_VALUE_TYPE><DSWDTPS1C><1:8589934592 (77 Hours)><e0>
<SETTING_VALUE_TYPE><DSWDTPS1D><1:17179869184 (6.4 Days)><e8>
<SETTING_VALUE_TYPE><DSWDTPS1E><1:34359738368 (12.8  Days)><f0>
<SETTING_VALUE_TYPE><DSWDTPS1F><1:68719476736 (25.7 Days)><f8>
<CONFIGREG_INFO_TYPE><ffff><0><f3><2>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer Enable><1><2>
<SETTING_VALUE_TYPE><OFF><DSWDT Disabled><0>
<SETTING_VALUE_TYPE><ON><DSWDT Enabled><1>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Reference Clock Select><2><2>
<SETTING_VALUE_TYPE><SOSC><DSWDT uses SOSC as reference clock><0>
<SETTING_VALUE_TYPE><LPRC><DSWDT uses LPRC as reference clock><2>
<PART_INFO_TYPE><9699><PIC18F96J99><18xxxx><6><1><17fef><10><ff><0><0-5f><f60-fff><0><10>
<CONFIGREG_INFO_TYPE><17ff0><0><e0><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><17ff1><0><f7><3>
<SWITCH_INFO_TYPE><BOREN><Brown-Out Reset Enable><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit, disabled in Deep Sleep><1>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><2><2>
<SETTING_VALUE_TYPE><0><2.0V><0>
<SETTING_VALUE_TYPE><1><1.8V><2>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><17ff2><0><af><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><FRC><Fast RC Oscillator (FRC)><0>
<SETTING_VALUE_TYPE><FRCPLL><Fast RC Oscillator with PLL module (FRCPLL)><1>
<SETTING_VALUE_TYPE><PRI><Primary Oscillator (XT, HS, EC)><2>
<SETTING_VALUE_TYPE><PRIPLL><Primary Oscillator with PLL module (XTPLL,HSPLL,ECPLL)><3>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator (SOSC)><4>
<SETTING_VALUE_TYPE><LPRC><Low-Power RC Oscillator (LPRC)><5>
<SETTING_VALUE_TYPE><FRC500KHZ><Fast RC Oscillator divided by 16 (500 kHz)><6>
<SETTING_VALUE_TYPE><FRCDIV><Fast RC Oscillator with Postscaler (FRCDIV)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><8><2>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SWITCH_INFO_TYPE><CLKOEN><Clock Out Enable Bit><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><17ff3><0><ff><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Frequency Multiplier Select bits><f><10>
<SETTING_VALUE_TYPE><NODIV><96 MHz PLL selected; No divide - Oscillator used directly (4 MHz input)><0>
<SETTING_VALUE_TYPE><DIV2><96 MHz PLL selected; Oscillator divided by 2 (8 MHz input)><1>
<SETTING_VALUE_TYPE><DIV3><96 MHz PLL selected; Oscillator divided by 3 (12 MHz input)><2>
<SETTING_VALUE_TYPE><DIV4><96 MHz PLL selected; Oscillator divided by 4 (16 MHz input)><3>
<SETTING_VALUE_TYPE><DIV5><96 MHz PLL selected; Oscillator divided by 5 (20 MHz input)><4>
<SETTING_VALUE_TYPE><DIV6><96 MHz PLL selected; Oscillator divided by 6 (24 MHz input)><5>
<SETTING_VALUE_TYPE><DIV10><96 MHz PLL selected; Oscillator divided by 10 (40 MHz input)><6>
<SETTING_VALUE_TYPE><DIV12><96 MHz PLL selected; Oscillator divided by 12 (48 MHz input)><7>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><8>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><9>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><a>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><b>
<SETTING_VALUE_TYPE><PLL4X><4x PLL selected><c>
<SETTING_VALUE_TYPE><PLL6X><6x PLL selected><d>
<SETTING_VALUE_TYPE><PLL8X><8x PLL selected><e>
<SETTING_VALUE_TYPE><NOPLL><No PLL used - PLLGO bit not available to user><f>
<CONFIGREG_INFO_TYPE><17ff4><0><33><2>
<SWITCH_INFO_TYPE><POSCMD><Primary Oscillator Select><3><4>
<SETTING_VALUE_TYPE><EC><External clock mode selected><0>
<SETTING_VALUE_TYPE><MS><MS oscillator mode selected(3.5 MHz -10 MHz)><1>
<SETTING_VALUE_TYPE><HS><HS oscillator mode selected(10 MHz - 40 MHz)><2>
<SETTING_VALUE_TYPE><NONE><Primary oscillator disabled><3>
<SWITCH_INFO_TYPE><FSCM><Clock Switching and Monitor Selection Configuration bits><30><3>
<SETTING_VALUE_TYPE><CSECME><Clock switching is enabled, fail safe clock monitor is enabled><0>
<SETTING_VALUE_TYPE><CSECMD><Clock switching is enabled, fail safe clock monitor is disabled><10>
<SETTING_VALUE_TYPE><CSDCMD><Clock switching is disabled, fail safe clock monitor is disabled><20>
<CONFIGREG_INFO_TYPE><17ff5><0><f0><0>
<CONFIGREG_INFO_TYPE><17ff6><0><ff><1>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Boundary><ff><100>
<SETTING_VALUE_TYPE><WPFP0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><WPFP1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><WPFP2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><WPFP3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><WPFP4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><WPFP5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><WPFP6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><WPFP7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><WPFP8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><WPFP9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><WPFP10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><WPFP11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><WPFP12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><WPFP13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><WPFP14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><WPFP15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><WPFP16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><WPFP17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><WPFP18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><WPFP19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><WPFP20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><WPFP21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><WPFP22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><WPFP23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><WPFP24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><WPFP25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><WPFP26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><WPFP27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><WPFP28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><WPFP29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><WPFP30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><WPFP31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><WPFP32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><WPFP33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><WPFP34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><WPFP35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><WPFP36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><WPFP37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><WPFP38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><WPFP39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><WPFP40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><WPFP41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><WPFP42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><WPFP43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><WPFP44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><WPFP45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><WPFP46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><WPFP47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><WPFP48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><WPFP49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><WPFP50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><WPFP51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><WPFP52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><WPFP53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><WPFP54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><WPFP55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><WPFP56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><WPFP57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><WPFP58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><WPFP59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><WPFP60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><WPFP61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><WPFP62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><WPFP63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><WPFP64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><WPFP65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><WPFP66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><WPFP67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><WPFP68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><WPFP69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><WPFP70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><WPFP71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><WPFP72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><WPFP73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><WPFP74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><WPFP75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><WPFP76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><WPFP77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><WPFP78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><WPFP79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><WPFP80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><WPFP81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><WPFP82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><WPFP83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><WPFP84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><WPFP85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><WPFP86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><WPFP87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><WPFP88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><WPFP89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><WPFP90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><WPFP91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><WPFP92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><WPFP93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><WPFP94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><WPFP95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><WPFP96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><WPFP97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><WPFP98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><WPFP99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><WPFP100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><WPFP101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><WPFP102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><WPFP103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><WPFP104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><WPFP105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><WPFP106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><WPFP107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><WPFP108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><WPFP109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><WPFP110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><WPFP111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><WPFP112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><WPFP113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><WPFP114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><WPFP115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><WPFP116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><WPFP117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><WPFP118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><WPFP119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><WPFP120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><WPFP121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><WPFP122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><WPFP123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><WPFP124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><WPFP125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><WPFP126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><WPFP127><Write Protect Program Flash Page 127><7f>
<SETTING_VALUE_TYPE><WPFP128><Write Protect Program Flash Page 128><80>
<SETTING_VALUE_TYPE><WPFP129><Write Protect Program Flash Page 129><81>
<SETTING_VALUE_TYPE><WPFP130><Write Protect Program Flash Page 130><82>
<SETTING_VALUE_TYPE><WPFP131><Write Protect Program Flash Page 131><83>
<SETTING_VALUE_TYPE><WPFP132><Write Protect Program Flash Page 132><84>
<SETTING_VALUE_TYPE><WPFP133><Write Protect Program Flash Page 133><85>
<SETTING_VALUE_TYPE><WPFP134><Write Protect Program Flash Page 134><86>
<SETTING_VALUE_TYPE><WPFP135><Write Protect Program Flash Page 135><87>
<SETTING_VALUE_TYPE><WPFP136><Write Protect Program Flash Page 136><88>
<SETTING_VALUE_TYPE><WPFP137><Write Protect Program Flash Page 137><89>
<SETTING_VALUE_TYPE><WPFP138><Write Protect Program Flash Page 138><8a>
<SETTING_VALUE_TYPE><WPFP139><Write Protect Program Flash Page 139><8b>
<SETTING_VALUE_TYPE><WPFP140><Write Protect Program Flash Page 140><8c>
<SETTING_VALUE_TYPE><WPFP141><Write Protect Program Flash Page 141><8d>
<SETTING_VALUE_TYPE><WPFP142><Write Protect Program Flash Page 142><8e>
<SETTING_VALUE_TYPE><WPFP143><Write Protect Program Flash Page 143><8f>
<SETTING_VALUE_TYPE><WPFP144><Write Protect Program Flash Page 144><90>
<SETTING_VALUE_TYPE><WPFP145><Write Protect Program Flash Page 145><91>
<SETTING_VALUE_TYPE><WPFP146><Write Protect Program Flash Page 146><92>
<SETTING_VALUE_TYPE><WPFP147><Write Protect Program Flash Page 147><93>
<SETTING_VALUE_TYPE><WPFP148><Write Protect Program Flash Page 148><94>
<SETTING_VALUE_TYPE><WPFP149><Write Protect Program Flash Page 149><95>
<SETTING_VALUE_TYPE><WPFP150><Write Protect Program Flash Page 150><96>
<SETTING_VALUE_TYPE><WPFP151><Write Protect Program Flash Page 151><97>
<SETTING_VALUE_TYPE><WPFP152><Write Protect Program Flash Page 152><98>
<SETTING_VALUE_TYPE><WPFP153><Write Protect Program Flash Page 153><99>
<SETTING_VALUE_TYPE><WPFP154><Write Protect Program Flash Page 154><9a>
<SETTING_VALUE_TYPE><WPFP155><Write Protect Program Flash Page 155><9b>
<SETTING_VALUE_TYPE><WPFP156><Write Protect Program Flash Page 156><9c>
<SETTING_VALUE_TYPE><WPFP157><Write Protect Program Flash Page 157><9d>
<SETTING_VALUE_TYPE><WPFP158><Write Protect Program Flash Page 158><9e>
<SETTING_VALUE_TYPE><WPFP159><Write Protect Program Flash Page 159><9f>
<SETTING_VALUE_TYPE><WPFP160><Write Protect Program Flash Page 160><a0>
<SETTING_VALUE_TYPE><WPFP161><Write Protect Program Flash Page 161><a1>
<SETTING_VALUE_TYPE><WPFP162><Write Protect Program Flash Page 162><a2>
<SETTING_VALUE_TYPE><WPFP163><Write Protect Program Flash Page 163><a3>
<SETTING_VALUE_TYPE><WPFP164><Write Protect Program Flash Page 164><a4>
<SETTING_VALUE_TYPE><WPFP165><Write Protect Program Flash Page 165><a5>
<SETTING_VALUE_TYPE><WPFP166><Write Protect Program Flash Page 166><a6>
<SETTING_VALUE_TYPE><WPFP167><Write Protect Program Flash Page 167><a7>
<SETTING_VALUE_TYPE><WPFP168><Write Protect Program Flash Page 168><a8>
<SETTING_VALUE_TYPE><WPFP169><Write Protect Program Flash Page 169><a9>
<SETTING_VALUE_TYPE><WPFP170><Write Protect Program Flash Page 170><aa>
<SETTING_VALUE_TYPE><WPFP171><Write Protect Program Flash Page 171><ab>
<SETTING_VALUE_TYPE><WPFP172><Write Protect Program Flash Page 172><ac>
<SETTING_VALUE_TYPE><WPFP173><Write Protect Program Flash Page 173><ad>
<SETTING_VALUE_TYPE><WPFP174><Write Protect Program Flash Page 174><ae>
<SETTING_VALUE_TYPE><WPFP175><Write Protect Program Flash Page 175><af>
<SETTING_VALUE_TYPE><WPFP176><Write Protect Program Flash Page 176><b0>
<SETTING_VALUE_TYPE><WPFP177><Write Protect Program Flash Page 177><b1>
<SETTING_VALUE_TYPE><WPFP178><Write Protect Program Flash Page 178><b2>
<SETTING_VALUE_TYPE><WPFP179><Write Protect Program Flash Page 179><b3>
<SETTING_VALUE_TYPE><WPFP180><Write Protect Program Flash Page 180><b4>
<SETTING_VALUE_TYPE><WPFP181><Write Protect Program Flash Page 181><b5>
<SETTING_VALUE_TYPE><WPFP182><Write Protect Program Flash Page 182><b6>
<SETTING_VALUE_TYPE><WPFP183><Write Protect Program Flash Page 183><b7>
<SETTING_VALUE_TYPE><WPFP184><Write Protect Program Flash Page 184><b8>
<SETTING_VALUE_TYPE><WPFP185><Write Protect Program Flash Page 185><b9>
<SETTING_VALUE_TYPE><WPFP186><Write Protect Program Flash Page 186><ba>
<SETTING_VALUE_TYPE><WPFP187><Write Protect Program Flash Page 187><bb>
<SETTING_VALUE_TYPE><WPFP188><Write Protect Program Flash Page 188><bc>
<SETTING_VALUE_TYPE><WPFP189><Write Protect Program Flash Page 189><bd>
<SETTING_VALUE_TYPE><WPFP190><Write Protect Program Flash Page 190><be>
<SETTING_VALUE_TYPE><WPFP191><Write Protect Program Flash Page 191><bf>
<SETTING_VALUE_TYPE><WPFP192><Write Protect Program Flash Page 192><c0>
<SETTING_VALUE_TYPE><WPFP193><Write Protect Program Flash Page 193><c1>
<SETTING_VALUE_TYPE><WPFP194><Write Protect Program Flash Page 194><c2>
<SETTING_VALUE_TYPE><WPFP195><Write Protect Program Flash Page 195><c3>
<SETTING_VALUE_TYPE><WPFP196><Write Protect Program Flash Page 196><c4>
<SETTING_VALUE_TYPE><WPFP197><Write Protect Program Flash Page 197><c5>
<SETTING_VALUE_TYPE><WPFP198><Write Protect Program Flash Page 198><c6>
<SETTING_VALUE_TYPE><WPFP199><Write Protect Program Flash Page 199><c7>
<SETTING_VALUE_TYPE><WPFP200><Write Protect Program Flash Page 200><c8>
<SETTING_VALUE_TYPE><WPFP201><Write Protect Program Flash Page 201><c9>
<SETTING_VALUE_TYPE><WPFP202><Write Protect Program Flash Page 202><ca>
<SETTING_VALUE_TYPE><WPFP203><Write Protect Program Flash Page 203><cb>
<SETTING_VALUE_TYPE><WPFP204><Write Protect Program Flash Page 204><cc>
<SETTING_VALUE_TYPE><WPFP205><Write Protect Program Flash Page 205><cd>
<SETTING_VALUE_TYPE><WPFP206><Write Protect Program Flash Page 206><ce>
<SETTING_VALUE_TYPE><WPFP207><Write Protect Program Flash Page 207><cf>
<SETTING_VALUE_TYPE><WPFP208><Write Protect Program Flash Page 208><d0>
<SETTING_VALUE_TYPE><WPFP209><Write Protect Program Flash Page 209><d1>
<SETTING_VALUE_TYPE><WPFP210><Write Protect Program Flash Page 210><d2>
<SETTING_VALUE_TYPE><WPFP211><Write Protect Program Flash Page 211><d3>
<SETTING_VALUE_TYPE><WPFP212><Write Protect Program Flash Page 212><d4>
<SETTING_VALUE_TYPE><WPFP213><Write Protect Program Flash Page 213><d5>
<SETTING_VALUE_TYPE><WPFP214><Write Protect Program Flash Page 214><d6>
<SETTING_VALUE_TYPE><WPFP215><Write Protect Program Flash Page 215><d7>
<SETTING_VALUE_TYPE><WPFP216><Write Protect Program Flash Page 216><d8>
<SETTING_VALUE_TYPE><WPFP217><Write Protect Program Flash Page 217><d9>
<SETTING_VALUE_TYPE><WPFP218><Write Protect Program Flash Page 218><da>
<SETTING_VALUE_TYPE><WPFP219><Write Protect Program Flash Page 219><db>
<SETTING_VALUE_TYPE><WPFP220><Write Protect Program Flash Page 220><dc>
<SETTING_VALUE_TYPE><WPFP221><Write Protect Program Flash Page 221><dd>
<SETTING_VALUE_TYPE><WPFP222><Write Protect Program Flash Page 222><de>
<SETTING_VALUE_TYPE><WPFP223><Write Protect Program Flash Page 223><df>
<SETTING_VALUE_TYPE><WPFP224><Write Protect Program Flash Page 224><e0>
<SETTING_VALUE_TYPE><WPFP225><Write Protect Program Flash Page 225><e1>
<SETTING_VALUE_TYPE><WPFP226><Write Protect Program Flash Page 226><e2>
<SETTING_VALUE_TYPE><WPFP227><Write Protect Program Flash Page 227><e3>
<SETTING_VALUE_TYPE><WPFP228><Write Protect Program Flash Page 228><e4>
<SETTING_VALUE_TYPE><WPFP229><Write Protect Program Flash Page 229><e5>
<SETTING_VALUE_TYPE><WPFP230><Write Protect Program Flash Page 230><e6>
<SETTING_VALUE_TYPE><WPFP231><Write Protect Program Flash Page 231><e7>
<SETTING_VALUE_TYPE><WPFP232><Write Protect Program Flash Page 232><e8>
<SETTING_VALUE_TYPE><WPFP233><Write Protect Program Flash Page 233><e9>
<SETTING_VALUE_TYPE><WPFP234><Write Protect Program Flash Page 234><ea>
<SETTING_VALUE_TYPE><WPFP235><Write Protect Program Flash Page 235><eb>
<SETTING_VALUE_TYPE><WPFP236><Write Protect Program Flash Page 236><ec>
<SETTING_VALUE_TYPE><WPFP237><Write Protect Program Flash Page 237><ed>
<SETTING_VALUE_TYPE><WPFP238><Write Protect Program Flash Page 238><ee>
<SETTING_VALUE_TYPE><WPFP239><Write Protect Program Flash Page 239><ef>
<SETTING_VALUE_TYPE><WPFP240><Write Protect Program Flash Page 240><f0>
<SETTING_VALUE_TYPE><WPFP241><Write Protect Program Flash Page 241><f1>
<SETTING_VALUE_TYPE><WPFP242><Write Protect Program Flash Page 242><f2>
<SETTING_VALUE_TYPE><WPFP243><Write Protect Program Flash Page 243><f3>
<SETTING_VALUE_TYPE><WPFP244><Write Protect Program Flash Page 244><f4>
<SETTING_VALUE_TYPE><WPFP245><Write Protect Program Flash Page 245><f5>
<SETTING_VALUE_TYPE><WPFP246><Write Protect Program Flash Page 246><f6>
<SETTING_VALUE_TYPE><WPFP247><Write Protect Program Flash Page 247><f7>
<SETTING_VALUE_TYPE><WPFP248><Write Protect Program Flash Page 248><f8>
<SETTING_VALUE_TYPE><WPFP249><Write Protect Program Flash Page 249><f9>
<SETTING_VALUE_TYPE><WPFP250><Write Protect Program Flash Page 250><fa>
<SETTING_VALUE_TYPE><WPFP251><Write Protect Program Flash Page 251><fb>
<SETTING_VALUE_TYPE><WPFP252><Write Protect Program Flash Page 252><fc>
<SETTING_VALUE_TYPE><WPFP253><Write Protect Program Flash Page 253><fd>
<SETTING_VALUE_TYPE><WPFP254><Write Protect Program Flash Page 254><fe>
<SETTING_VALUE_TYPE><WPFP255><Write Protect Program Flash Page 255><ff>
<CONFIGREG_INFO_TYPE><17ff7><0><f7><3>
<SWITCH_INFO_TYPE><WPDIS><Segment Write Protection Disable><1><2>
<SETTING_VALUE_TYPE><WPEN><Enabled><0>
<SETTING_VALUE_TYPE><WPDIS><Disabled><1>
<SWITCH_INFO_TYPE><WPEND><Segment Write Protection End Page Select><2><2>
<SETTING_VALUE_TYPE><WPSTARTMEM><write Protect from page 0 to WPFP><0>
<SETTING_VALUE_TYPE><WPENDMEM><Write Protect from WPFP to the last page of memory><2>
<SWITCH_INFO_TYPE><WPCFG><Write Protect Configuration Page Select><4><2>
<SETTING_VALUE_TYPE><WPCFGEN><Enabled><0>
<SETTING_VALUE_TYPE><WPCFGDIS><Disabled><4>
<CONFIGREG_INFO_TYPE><17ff8><0><fb><6>
<SWITCH_INFO_TYPE><T5GSEL><TMR5 Gate Select bit><1><2>
<SETTING_VALUE_TYPE><T3G><TMR5 Gate is driven by the T3G input><0>
<SETTING_VALUE_TYPE><T5G><TMR5 Gate is driven by the T5G input><1>
<SWITCH_INFO_TYPE><CINASEL><CxINA Gate Select bit><2><2>
<SETTING_VALUE_TYPE><RA5><C1INA and C3INA are all re-mapped to pin RA5><0>
<SETTING_VALUE_TYPE><DEFAULT><C1INA and C3INA are on their default pin locations><2>
<SWITCH_INFO_TYPE><EASHFT><External Address Shift bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address Shifting disabled><0>
<SETTING_VALUE_TYPE><ON><Address Shifting enabled><8>
<SWITCH_INFO_TYPE><ABW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><XM20><20-bit address bus><0>
<SETTING_VALUE_TYPE><XM16><16-bit address bus><10>
<SETTING_VALUE_TYPE><XM12><12-bit address bus><20>
<SETTING_VALUE_TYPE><MM><8-bit address bus><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><17ff9><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><the IOLOCK bit can be set and cleared using the unlock sequence><0>
<SETTING_VALUE_TYPE><ON><Once set, the IOLOCK bit cannot be cleared><1>
<SWITCH_INFO_TYPE><LS48MHZ><USB Low Speed Clock Select bit><2><2>
<SETTING_VALUE_TYPE><SYSX1><Divide-by-1 (System clock must be 6 MHz)><0>
<SETTING_VALUE_TYPE><SYSX2><Divide-by-2 (System clock must be 12 MHz)><2>
<SWITCH_INFO_TYPE><MSSPMSK2><MSSP2 7-Bit Address Masking Mode Enable bit><4><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><4>
<SWITCH_INFO_TYPE><MSSPMSK1><MSSP1 7-Bit Address Masking Mode Enable bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><17ffa><0><ff><3>
<SWITCH_INFO_TYPE><WDTWIN><Watch Dog Timer Window><3><4>
<SETTING_VALUE_TYPE><PS75_0><Watch Dog Timer Window Width is 75 percent><0>
<SETTING_VALUE_TYPE><PS50_0><Watch Dog Timer Window Width is 50 percent><1>
<SETTING_VALUE_TYPE><PS37_5><Watch Dog Timer Window Width is 37.5 percent><2>
<SETTING_VALUE_TYPE><PS25_0><Watch Dog Timer Window Width is 25 percent><3>
<SWITCH_INFO_TYPE><WDTCLK><Watch Dog Timer Clock Source><c><4>
<SETTING_VALUE_TYPE><SYS><Use FOSC/4 when system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><0>
<SETTING_VALUE_TYPE><SOSC><Always use SOSC><4>
<SETTING_VALUE_TYPE><LPRC><Always use INTOSC/LPRC><8>
<SETTING_VALUE_TYPE><FRC><Use FRC when WINDIS = 0, system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><c>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale><f0><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><10>
<SETTING_VALUE_TYPE><4><1:4><20>
<SETTING_VALUE_TYPE><8><1:8><30>
<SETTING_VALUE_TYPE><16><1:16><40>
<SETTING_VALUE_TYPE><32><1:32><50>
<SETTING_VALUE_TYPE><64><1:64><60>
<SETTING_VALUE_TYPE><128><1:128><70>
<SETTING_VALUE_TYPE><256><1:256><80>
<SETTING_VALUE_TYPE><512><1:512><90>
<SETTING_VALUE_TYPE><1024><1:1024><a0>
<SETTING_VALUE_TYPE><2048><1:2048><b0>
<SETTING_VALUE_TYPE><4096><1:4096><c0>
<SETTING_VALUE_TYPE><8192><1:8192><d0>
<SETTING_VALUE_TYPE><16384><1:16384><e0>
<SETTING_VALUE_TYPE><32768><1:32768><f0>
<CONFIGREG_INFO_TYPE><17ffb><0><ff><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WINDIS><Windowed Watchdog Timer Disable><4><2>
<SETTING_VALUE_TYPE><WDTWIN><Windowed WDT enabled><0>
<SETTING_VALUE_TYPE><WDTSTD><Standard WDT selected; windowed WDT disabled><4>
<SWITCH_INFO_TYPE><WPSA><WDT Prescaler><8><2>
<SETTING_VALUE_TYPE><32><WDT prescaler ratio of 1:32><0>
<SETTING_VALUE_TYPE><128><WDT prescaler ratio of 1:128><8>
<CONFIGREG_INFO_TYPE><17ffc><0><1d><4>
<SWITCH_INFO_TYPE><RETEN><Retention Voltage Regulator Control Enable><1><2>
<SETTING_VALUE_TYPE><ON><Retention controlled by SRETEN during Sleep><0>
<SETTING_VALUE_TYPE><OFF><Retention not available><1>
<SWITCH_INFO_TYPE><VBTBOR><VBAT BOR Enable><4><2>
<SETTING_VALUE_TYPE><OFF><VBAT BOR is disabled><0>
<SETTING_VALUE_TYPE><ON><VBAT BOR is enabled><4>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR Enable><8><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled in Deep Sleep (does not affect operation in non-Deep Sleep modes)><0>
<SETTING_VALUE_TYPE><ON><BOR enabled in Deep Sleep><8>
<SWITCH_INFO_TYPE><DSBITEN><DSEN Bit Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Deep Sleep operation is always disabled><0>
<SETTING_VALUE_TYPE><ON><Deep Sleep is controlled by the register bit DSEN><10>
<CONFIGREG_INFO_TYPE><17ffd><0><f0><0>
<CONFIGREG_INFO_TYPE><17ffe><0><f8><1>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Timer Postscale Select><f8><20>
<SETTING_VALUE_TYPE><DSWDTPS0><1:32 (1 mS)><0>
<SETTING_VALUE_TYPE><DSWDTPS1><1:64 (2.1 mS)><8>
<SETTING_VALUE_TYPE><DSWDTPS2><1:128 (4.1 mS)><10>
<SETTING_VALUE_TYPE><DSWDTPS3><1: 256 (8.3 mS)><18>
<SETTING_VALUE_TYPE><DSWDTPS4><1:512 (16.5 mS)><20>
<SETTING_VALUE_TYPE><DSWDTPS5><1:1024 (33 mS)><28>
<SETTING_VALUE_TYPE><DSWDTPS6><1:2048 (66.1 mS)><30>
<SETTING_VALUE_TYPE><DSWDTPS7><1:4096 (132.1 mS)><38>
<SETTING_VALUE_TYPE><DSWDTPS8><1:8192 (264.3 mS)><40>
<SETTING_VALUE_TYPE><DSWDTPS9><1:16384 (528.5 mS)><48>
<SETTING_VALUE_TYPE><DSWDTPSA><1:32768 (1.057 Secs)><50>
<SETTING_VALUE_TYPE><DSWDTPSB><1:65536 (2.114 Secs)><58>
<SETTING_VALUE_TYPE><DSWDTPSC><1:131072 (4.228 Secs)><60>
<SETTING_VALUE_TYPE><DSWDTPSD><1:262114 (8.456 Secs)><68>
<SETTING_VALUE_TYPE><DSWDTPSE><1:524288 (16.912 Secs)><70>
<SETTING_VALUE_TYPE><DSWDTPSF><1:1048576 (33.825 Secs)><78>
<SETTING_VALUE_TYPE><DSWDTPS10><1:2097152 (67.7 Secs)><80>
<SETTING_VALUE_TYPE><DSWDTPS11><1:4194304 (135.3 Secs)><88>
<SETTING_VALUE_TYPE><DSWDTPS12><1:8388608 (4.5 Minutes)><90>
<SETTING_VALUE_TYPE><DSWDTPS13><1:16777216 (9 Minutes)><98>
<SETTING_VALUE_TYPE><DSWDTPS14><1:33554432 (18 Minutes)><a0>
<SETTING_VALUE_TYPE><DSWDTPS15><1:67108864 (36.1 Minutes)><a8>
<SETTING_VALUE_TYPE><DSWDTPS16><1:134217728 (72.2 Minutes)><b0>
<SETTING_VALUE_TYPE><DSWDTPS17><1:268435456 (2.4 Hours)><b8>
<SETTING_VALUE_TYPE><DSWDTPS18><1:536870912 (4.8 Hours)><c0>
<SETTING_VALUE_TYPE><DSWDTPS19><1:1073741824 (9.6 Hours)><c8>
<SETTING_VALUE_TYPE><DSWDTPS1A><1:2147483648 (19.2 Hours)><d0>
<SETTING_VALUE_TYPE><DSWDTPS1B><1:4294967296 (38.5 Hours)><d8>
<SETTING_VALUE_TYPE><DSWDTPS1C><1:8589934592 (77 Hours)><e0>
<SETTING_VALUE_TYPE><DSWDTPS1D><1:17179869184 (6.4 Days)><e8>
<SETTING_VALUE_TYPE><DSWDTPS1E><1:34359738368 (12.8  Days)><f0>
<SETTING_VALUE_TYPE><DSWDTPS1F><1:68719476736 (25.7 Days)><f8>
<CONFIGREG_INFO_TYPE><17fff><0><f3><2>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer Enable><1><2>
<SETTING_VALUE_TYPE><OFF><DSWDT Disabled><0>
<SETTING_VALUE_TYPE><ON><DSWDT Enabled><1>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Reference Clock Select><2><2>
<SETTING_VALUE_TYPE><SOSC><DSWDT uses SOSC as reference clock><0>
<SETTING_VALUE_TYPE><LPRC><DSWDT uses LPRC as reference clock><2>
<PART_INFO_TYPE><d760><PIC18F97J60><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><1fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVR><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><1fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fffa><0><c7><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLKO function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC1:FOSC0 as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><f8><4>
<SWITCH_INFO_TYPE><EASHFT><External Address Bus Shift Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address shifting disabled; address on external bus reflects the PC value><0>
<SETTING_VALUE_TYPE><ON><Address shifting enabled; address on external bus is offset to start at 000000h><8>
<SWITCH_INFO_TYPE><MODE><External Memory Bus><30><4>
<SETTING_VALUE_TYPE><XM20><Extended Microcontroller mode, 20-Bit Address mode><0>
<SETTING_VALUE_TYPE><XM16><Extended Microcontroller mode,16-Bit Address mode><10>
<SETTING_VALUE_TYPE><XM12><Extended Microcontroller mode,12-Bit Address mode><20>
<SETTING_VALUE_TYPE><MM><Microcontroller mode, external bus disabled><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><8><8-Bit Data Width mode><0>
<SETTING_VALUE_TYPE><16><16-Bit Data Width mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait states for operations on external memory bus enabled and selected by MEMCON<5:4>><0>
<SETTING_VALUE_TYPE><OFF><Wait states for operations on external memory bus disabled><80>
<CONFIGREG_INFO_TYPE><1fffd><0><f7><3>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><ECCP2/P2A is multiplexed with RE7 in Microcontroller mode (80-pin and 100-pin devices) or with RB3 in Extended Microcontroller mode (100-pin devices only)><0>
<SETTING_VALUE_TYPE><ON><ECCP2/P2A is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><OFF><ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6; ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4><0>
<SETTING_VALUE_TYPE><ON><ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5; ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3><2>
<SWITCH_INFO_TYPE><ETHLED><Ethernet LED Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><RA0/RA1 function as I/O regardless of Ethernet module status><0>
<SETTING_VALUE_TYPE><ON><RA0/RA1 are multiplexed with LEDA/LEDB when Ethernet module is enabled and function as I/O when Ethernet is disabled><4>
<PART_INFO_TYPE><9794><PIC18F97J94><18xxxx><6><1><1ffef><10><ff><0><0-5f><f60-fff><0><10>
<CONFIGREG_INFO_TYPE><1fff0><0><e0><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><1fff1><0><f7><3>
<SWITCH_INFO_TYPE><BOREN><Brown-Out Reset Enable><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit, disabled in Deep Sleep><1>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><2><2>
<SETTING_VALUE_TYPE><0><2.0V><0>
<SETTING_VALUE_TYPE><1><1.8V><2>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fff2><0><af><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><FRC><Fast RC Oscillator (FRC)><0>
<SETTING_VALUE_TYPE><FRCPLL><Fast RC Oscillator with PLL module (FRCPLL)><1>
<SETTING_VALUE_TYPE><PRI><Primary Oscillator (XT, HS, EC)><2>
<SETTING_VALUE_TYPE><PRIPLL><Primary Oscillator with PLL module (XTPLL,HSPLL,ECPLL)><3>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator (SOSC)><4>
<SETTING_VALUE_TYPE><LPRC><Low-Power RC Oscillator (LPRC)><5>
<SETTING_VALUE_TYPE><FRC500KHZ><Fast RC Oscillator divided by 16 (500 kHz)><6>
<SETTING_VALUE_TYPE><FRCDIV><Fast RC Oscillator with Postscaler (FRCDIV)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><8><2>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SWITCH_INFO_TYPE><CLKOEN><Clock Out Enable Bit><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><1fff3><0><ff><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Frequency Multiplier Select bits><f><10>
<SETTING_VALUE_TYPE><NODIV><96 MHz PLL selected; No divide - Oscillator used directly (4 MHz input)><0>
<SETTING_VALUE_TYPE><DIV2><96 MHz PLL selected; Oscillator divided by 2 (8 MHz input)><1>
<SETTING_VALUE_TYPE><DIV3><96 MHz PLL selected; Oscillator divided by 3 (12 MHz input)><2>
<SETTING_VALUE_TYPE><DIV4><96 MHz PLL selected; Oscillator divided by 4 (16 MHz input)><3>
<SETTING_VALUE_TYPE><DIV5><96 MHz PLL selected; Oscillator divided by 5 (20 MHz input)><4>
<SETTING_VALUE_TYPE><DIV6><96 MHz PLL selected; Oscillator divided by 6 (24 MHz input)><5>
<SETTING_VALUE_TYPE><DIV10><96 MHz PLL selected; Oscillator divided by 10 (40 MHz input)><6>
<SETTING_VALUE_TYPE><DIV12><96 MHz PLL selected; Oscillator divided by 12 (48 MHz input)><7>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><8>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><9>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><a>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><b>
<SETTING_VALUE_TYPE><PLL4X><4x PLL selected><c>
<SETTING_VALUE_TYPE><PLL6X><6x PLL selected><d>
<SETTING_VALUE_TYPE><PLL8X><8x PLL selected><e>
<SETTING_VALUE_TYPE><NOPLL><No PLL used - PLLGO bit not available to user><f>
<CONFIGREG_INFO_TYPE><1fff4><0><33><2>
<SWITCH_INFO_TYPE><POSCMD><Primary Oscillator Select><3><4>
<SETTING_VALUE_TYPE><EC><External clock mode selected><0>
<SETTING_VALUE_TYPE><MS><MS oscillator mode selected(3.5 MHz -10 MHz)><1>
<SETTING_VALUE_TYPE><HS><HS oscillator mode selected(10 MHz - 40 MHz)><2>
<SETTING_VALUE_TYPE><NONE><Primary oscillator disabled><3>
<SWITCH_INFO_TYPE><FSCM><Clock Switching and Monitor Selection Configuration bits><30><3>
<SETTING_VALUE_TYPE><CSECME><Clock switching is enabled, fail safe clock monitor is enabled><0>
<SETTING_VALUE_TYPE><CSECMD><Clock switching is enabled, fail safe clock monitor is disabled><10>
<SETTING_VALUE_TYPE><CSDCMD><Clock switching is disabled, fail safe clock monitor is disabled><20>
<CONFIGREG_INFO_TYPE><1fff5><0><f0><0>
<CONFIGREG_INFO_TYPE><1fff6><0><ff><1>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Boundary><ff><100>
<SETTING_VALUE_TYPE><WPFP0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><WPFP1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><WPFP2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><WPFP3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><WPFP4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><WPFP5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><WPFP6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><WPFP7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><WPFP8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><WPFP9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><WPFP10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><WPFP11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><WPFP12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><WPFP13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><WPFP14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><WPFP15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><WPFP16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><WPFP17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><WPFP18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><WPFP19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><WPFP20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><WPFP21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><WPFP22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><WPFP23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><WPFP24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><WPFP25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><WPFP26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><WPFP27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><WPFP28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><WPFP29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><WPFP30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><WPFP31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><WPFP32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><WPFP33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><WPFP34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><WPFP35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><WPFP36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><WPFP37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><WPFP38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><WPFP39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><WPFP40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><WPFP41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><WPFP42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><WPFP43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><WPFP44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><WPFP45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><WPFP46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><WPFP47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><WPFP48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><WPFP49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><WPFP50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><WPFP51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><WPFP52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><WPFP53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><WPFP54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><WPFP55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><WPFP56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><WPFP57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><WPFP58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><WPFP59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><WPFP60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><WPFP61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><WPFP62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><WPFP63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><WPFP64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><WPFP65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><WPFP66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><WPFP67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><WPFP68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><WPFP69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><WPFP70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><WPFP71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><WPFP72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><WPFP73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><WPFP74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><WPFP75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><WPFP76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><WPFP77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><WPFP78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><WPFP79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><WPFP80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><WPFP81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><WPFP82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><WPFP83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><WPFP84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><WPFP85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><WPFP86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><WPFP87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><WPFP88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><WPFP89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><WPFP90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><WPFP91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><WPFP92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><WPFP93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><WPFP94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><WPFP95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><WPFP96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><WPFP97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><WPFP98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><WPFP99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><WPFP100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><WPFP101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><WPFP102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><WPFP103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><WPFP104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><WPFP105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><WPFP106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><WPFP107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><WPFP108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><WPFP109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><WPFP110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><WPFP111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><WPFP112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><WPFP113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><WPFP114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><WPFP115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><WPFP116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><WPFP117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><WPFP118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><WPFP119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><WPFP120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><WPFP121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><WPFP122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><WPFP123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><WPFP124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><WPFP125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><WPFP126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><WPFP127><Write Protect Program Flash Page 127><7f>
<SETTING_VALUE_TYPE><WPFP128><Write Protect Program Flash Page 128><80>
<SETTING_VALUE_TYPE><WPFP129><Write Protect Program Flash Page 129><81>
<SETTING_VALUE_TYPE><WPFP130><Write Protect Program Flash Page 130><82>
<SETTING_VALUE_TYPE><WPFP131><Write Protect Program Flash Page 131><83>
<SETTING_VALUE_TYPE><WPFP132><Write Protect Program Flash Page 132><84>
<SETTING_VALUE_TYPE><WPFP133><Write Protect Program Flash Page 133><85>
<SETTING_VALUE_TYPE><WPFP134><Write Protect Program Flash Page 134><86>
<SETTING_VALUE_TYPE><WPFP135><Write Protect Program Flash Page 135><87>
<SETTING_VALUE_TYPE><WPFP136><Write Protect Program Flash Page 136><88>
<SETTING_VALUE_TYPE><WPFP137><Write Protect Program Flash Page 137><89>
<SETTING_VALUE_TYPE><WPFP138><Write Protect Program Flash Page 138><8a>
<SETTING_VALUE_TYPE><WPFP139><Write Protect Program Flash Page 139><8b>
<SETTING_VALUE_TYPE><WPFP140><Write Protect Program Flash Page 140><8c>
<SETTING_VALUE_TYPE><WPFP141><Write Protect Program Flash Page 141><8d>
<SETTING_VALUE_TYPE><WPFP142><Write Protect Program Flash Page 142><8e>
<SETTING_VALUE_TYPE><WPFP143><Write Protect Program Flash Page 143><8f>
<SETTING_VALUE_TYPE><WPFP144><Write Protect Program Flash Page 144><90>
<SETTING_VALUE_TYPE><WPFP145><Write Protect Program Flash Page 145><91>
<SETTING_VALUE_TYPE><WPFP146><Write Protect Program Flash Page 146><92>
<SETTING_VALUE_TYPE><WPFP147><Write Protect Program Flash Page 147><93>
<SETTING_VALUE_TYPE><WPFP148><Write Protect Program Flash Page 148><94>
<SETTING_VALUE_TYPE><WPFP149><Write Protect Program Flash Page 149><95>
<SETTING_VALUE_TYPE><WPFP150><Write Protect Program Flash Page 150><96>
<SETTING_VALUE_TYPE><WPFP151><Write Protect Program Flash Page 151><97>
<SETTING_VALUE_TYPE><WPFP152><Write Protect Program Flash Page 152><98>
<SETTING_VALUE_TYPE><WPFP153><Write Protect Program Flash Page 153><99>
<SETTING_VALUE_TYPE><WPFP154><Write Protect Program Flash Page 154><9a>
<SETTING_VALUE_TYPE><WPFP155><Write Protect Program Flash Page 155><9b>
<SETTING_VALUE_TYPE><WPFP156><Write Protect Program Flash Page 156><9c>
<SETTING_VALUE_TYPE><WPFP157><Write Protect Program Flash Page 157><9d>
<SETTING_VALUE_TYPE><WPFP158><Write Protect Program Flash Page 158><9e>
<SETTING_VALUE_TYPE><WPFP159><Write Protect Program Flash Page 159><9f>
<SETTING_VALUE_TYPE><WPFP160><Write Protect Program Flash Page 160><a0>
<SETTING_VALUE_TYPE><WPFP161><Write Protect Program Flash Page 161><a1>
<SETTING_VALUE_TYPE><WPFP162><Write Protect Program Flash Page 162><a2>
<SETTING_VALUE_TYPE><WPFP163><Write Protect Program Flash Page 163><a3>
<SETTING_VALUE_TYPE><WPFP164><Write Protect Program Flash Page 164><a4>
<SETTING_VALUE_TYPE><WPFP165><Write Protect Program Flash Page 165><a5>
<SETTING_VALUE_TYPE><WPFP166><Write Protect Program Flash Page 166><a6>
<SETTING_VALUE_TYPE><WPFP167><Write Protect Program Flash Page 167><a7>
<SETTING_VALUE_TYPE><WPFP168><Write Protect Program Flash Page 168><a8>
<SETTING_VALUE_TYPE><WPFP169><Write Protect Program Flash Page 169><a9>
<SETTING_VALUE_TYPE><WPFP170><Write Protect Program Flash Page 170><aa>
<SETTING_VALUE_TYPE><WPFP171><Write Protect Program Flash Page 171><ab>
<SETTING_VALUE_TYPE><WPFP172><Write Protect Program Flash Page 172><ac>
<SETTING_VALUE_TYPE><WPFP173><Write Protect Program Flash Page 173><ad>
<SETTING_VALUE_TYPE><WPFP174><Write Protect Program Flash Page 174><ae>
<SETTING_VALUE_TYPE><WPFP175><Write Protect Program Flash Page 175><af>
<SETTING_VALUE_TYPE><WPFP176><Write Protect Program Flash Page 176><b0>
<SETTING_VALUE_TYPE><WPFP177><Write Protect Program Flash Page 177><b1>
<SETTING_VALUE_TYPE><WPFP178><Write Protect Program Flash Page 178><b2>
<SETTING_VALUE_TYPE><WPFP179><Write Protect Program Flash Page 179><b3>
<SETTING_VALUE_TYPE><WPFP180><Write Protect Program Flash Page 180><b4>
<SETTING_VALUE_TYPE><WPFP181><Write Protect Program Flash Page 181><b5>
<SETTING_VALUE_TYPE><WPFP182><Write Protect Program Flash Page 182><b6>
<SETTING_VALUE_TYPE><WPFP183><Write Protect Program Flash Page 183><b7>
<SETTING_VALUE_TYPE><WPFP184><Write Protect Program Flash Page 184><b8>
<SETTING_VALUE_TYPE><WPFP185><Write Protect Program Flash Page 185><b9>
<SETTING_VALUE_TYPE><WPFP186><Write Protect Program Flash Page 186><ba>
<SETTING_VALUE_TYPE><WPFP187><Write Protect Program Flash Page 187><bb>
<SETTING_VALUE_TYPE><WPFP188><Write Protect Program Flash Page 188><bc>
<SETTING_VALUE_TYPE><WPFP189><Write Protect Program Flash Page 189><bd>
<SETTING_VALUE_TYPE><WPFP190><Write Protect Program Flash Page 190><be>
<SETTING_VALUE_TYPE><WPFP191><Write Protect Program Flash Page 191><bf>
<SETTING_VALUE_TYPE><WPFP192><Write Protect Program Flash Page 192><c0>
<SETTING_VALUE_TYPE><WPFP193><Write Protect Program Flash Page 193><c1>
<SETTING_VALUE_TYPE><WPFP194><Write Protect Program Flash Page 194><c2>
<SETTING_VALUE_TYPE><WPFP195><Write Protect Program Flash Page 195><c3>
<SETTING_VALUE_TYPE><WPFP196><Write Protect Program Flash Page 196><c4>
<SETTING_VALUE_TYPE><WPFP197><Write Protect Program Flash Page 197><c5>
<SETTING_VALUE_TYPE><WPFP198><Write Protect Program Flash Page 198><c6>
<SETTING_VALUE_TYPE><WPFP199><Write Protect Program Flash Page 199><c7>
<SETTING_VALUE_TYPE><WPFP200><Write Protect Program Flash Page 200><c8>
<SETTING_VALUE_TYPE><WPFP201><Write Protect Program Flash Page 201><c9>
<SETTING_VALUE_TYPE><WPFP202><Write Protect Program Flash Page 202><ca>
<SETTING_VALUE_TYPE><WPFP203><Write Protect Program Flash Page 203><cb>
<SETTING_VALUE_TYPE><WPFP204><Write Protect Program Flash Page 204><cc>
<SETTING_VALUE_TYPE><WPFP205><Write Protect Program Flash Page 205><cd>
<SETTING_VALUE_TYPE><WPFP206><Write Protect Program Flash Page 206><ce>
<SETTING_VALUE_TYPE><WPFP207><Write Protect Program Flash Page 207><cf>
<SETTING_VALUE_TYPE><WPFP208><Write Protect Program Flash Page 208><d0>
<SETTING_VALUE_TYPE><WPFP209><Write Protect Program Flash Page 209><d1>
<SETTING_VALUE_TYPE><WPFP210><Write Protect Program Flash Page 210><d2>
<SETTING_VALUE_TYPE><WPFP211><Write Protect Program Flash Page 211><d3>
<SETTING_VALUE_TYPE><WPFP212><Write Protect Program Flash Page 212><d4>
<SETTING_VALUE_TYPE><WPFP213><Write Protect Program Flash Page 213><d5>
<SETTING_VALUE_TYPE><WPFP214><Write Protect Program Flash Page 214><d6>
<SETTING_VALUE_TYPE><WPFP215><Write Protect Program Flash Page 215><d7>
<SETTING_VALUE_TYPE><WPFP216><Write Protect Program Flash Page 216><d8>
<SETTING_VALUE_TYPE><WPFP217><Write Protect Program Flash Page 217><d9>
<SETTING_VALUE_TYPE><WPFP218><Write Protect Program Flash Page 218><da>
<SETTING_VALUE_TYPE><WPFP219><Write Protect Program Flash Page 219><db>
<SETTING_VALUE_TYPE><WPFP220><Write Protect Program Flash Page 220><dc>
<SETTING_VALUE_TYPE><WPFP221><Write Protect Program Flash Page 221><dd>
<SETTING_VALUE_TYPE><WPFP222><Write Protect Program Flash Page 222><de>
<SETTING_VALUE_TYPE><WPFP223><Write Protect Program Flash Page 223><df>
<SETTING_VALUE_TYPE><WPFP224><Write Protect Program Flash Page 224><e0>
<SETTING_VALUE_TYPE><WPFP225><Write Protect Program Flash Page 225><e1>
<SETTING_VALUE_TYPE><WPFP226><Write Protect Program Flash Page 226><e2>
<SETTING_VALUE_TYPE><WPFP227><Write Protect Program Flash Page 227><e3>
<SETTING_VALUE_TYPE><WPFP228><Write Protect Program Flash Page 228><e4>
<SETTING_VALUE_TYPE><WPFP229><Write Protect Program Flash Page 229><e5>
<SETTING_VALUE_TYPE><WPFP230><Write Protect Program Flash Page 230><e6>
<SETTING_VALUE_TYPE><WPFP231><Write Protect Program Flash Page 231><e7>
<SETTING_VALUE_TYPE><WPFP232><Write Protect Program Flash Page 232><e8>
<SETTING_VALUE_TYPE><WPFP233><Write Protect Program Flash Page 233><e9>
<SETTING_VALUE_TYPE><WPFP234><Write Protect Program Flash Page 234><ea>
<SETTING_VALUE_TYPE><WPFP235><Write Protect Program Flash Page 235><eb>
<SETTING_VALUE_TYPE><WPFP236><Write Protect Program Flash Page 236><ec>
<SETTING_VALUE_TYPE><WPFP237><Write Protect Program Flash Page 237><ed>
<SETTING_VALUE_TYPE><WPFP238><Write Protect Program Flash Page 238><ee>
<SETTING_VALUE_TYPE><WPFP239><Write Protect Program Flash Page 239><ef>
<SETTING_VALUE_TYPE><WPFP240><Write Protect Program Flash Page 240><f0>
<SETTING_VALUE_TYPE><WPFP241><Write Protect Program Flash Page 241><f1>
<SETTING_VALUE_TYPE><WPFP242><Write Protect Program Flash Page 242><f2>
<SETTING_VALUE_TYPE><WPFP243><Write Protect Program Flash Page 243><f3>
<SETTING_VALUE_TYPE><WPFP244><Write Protect Program Flash Page 244><f4>
<SETTING_VALUE_TYPE><WPFP245><Write Protect Program Flash Page 245><f5>
<SETTING_VALUE_TYPE><WPFP246><Write Protect Program Flash Page 246><f6>
<SETTING_VALUE_TYPE><WPFP247><Write Protect Program Flash Page 247><f7>
<SETTING_VALUE_TYPE><WPFP248><Write Protect Program Flash Page 248><f8>
<SETTING_VALUE_TYPE><WPFP249><Write Protect Program Flash Page 249><f9>
<SETTING_VALUE_TYPE><WPFP250><Write Protect Program Flash Page 250><fa>
<SETTING_VALUE_TYPE><WPFP251><Write Protect Program Flash Page 251><fb>
<SETTING_VALUE_TYPE><WPFP252><Write Protect Program Flash Page 252><fc>
<SETTING_VALUE_TYPE><WPFP253><Write Protect Program Flash Page 253><fd>
<SETTING_VALUE_TYPE><WPFP254><Write Protect Program Flash Page 254><fe>
<SETTING_VALUE_TYPE><WPFP255><Write Protect Program Flash Page 255><ff>
<CONFIGREG_INFO_TYPE><1fff7><0><f7><3>
<SWITCH_INFO_TYPE><WPDIS><Segment Write Protection Disable><1><2>
<SETTING_VALUE_TYPE><WPEN><Enabled><0>
<SETTING_VALUE_TYPE><WPDIS><Disabled><1>
<SWITCH_INFO_TYPE><WPEND><Segment Write Protection End Page Select><2><2>
<SETTING_VALUE_TYPE><WPSTARTMEM><write Protect from page 0 to WPFP><0>
<SETTING_VALUE_TYPE><WPENDMEM><Write Protect from WPFP to the last page of memory><2>
<SWITCH_INFO_TYPE><WPCFG><Write Protect Configuration Page Select><4><2>
<SETTING_VALUE_TYPE><WPCFGEN><Enabled><0>
<SETTING_VALUE_TYPE><WPCFGDIS><Disabled><4>
<CONFIGREG_INFO_TYPE><1fff8><0><fb><6>
<SWITCH_INFO_TYPE><T5GSEL><TMR5 Gate Select bit><1><2>
<SETTING_VALUE_TYPE><T3G><TMR5 Gate is driven by the T3G input><0>
<SETTING_VALUE_TYPE><T5G><TMR5 Gate is driven by the T5G input><1>
<SWITCH_INFO_TYPE><CINASEL><CxINA Gate Select bit><2><2>
<SETTING_VALUE_TYPE><RA5><C1INA and C3INA are all re-mapped to pin RA5><0>
<SETTING_VALUE_TYPE><DEFAULT><C1INA and C3INA are on their default pin locations><2>
<SWITCH_INFO_TYPE><EASHFT><External Address Shift bit><8><2>
<SETTING_VALUE_TYPE><OFF><Address Shifting disabled><0>
<SETTING_VALUE_TYPE><ON><Address Shifting enabled><8>
<SWITCH_INFO_TYPE><ABW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><XM20><20-bit address bus><0>
<SETTING_VALUE_TYPE><XM16><16-bit address bus><10>
<SETTING_VALUE_TYPE><XM12><12-bit address bus><20>
<SETTING_VALUE_TYPE><MM><8-bit address bus><30>
<SWITCH_INFO_TYPE><BW><Data Bus Width><40><2>
<SETTING_VALUE_TYPE><8><8-bit external bus mode><0>
<SETTING_VALUE_TYPE><16><16-bit external bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><1fff9><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><the IOLOCK bit can be set and cleared using the unlock sequence><0>
<SETTING_VALUE_TYPE><ON><Once set, the IOLOCK bit cannot be cleared><1>
<SWITCH_INFO_TYPE><LS48MHZ><USB Low Speed Clock Select bit><2><2>
<SETTING_VALUE_TYPE><SYSX1><Divide-by-1 (System clock must be 6 MHz)><0>
<SETTING_VALUE_TYPE><SYSX2><Divide-by-2 (System clock must be 12 MHz)><2>
<SWITCH_INFO_TYPE><MSSPMSK2><MSSP2 7-Bit Address Masking Mode Enable bit><4><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><4>
<SWITCH_INFO_TYPE><MSSPMSK1><MSSP1 7-Bit Address Masking Mode Enable bit><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><1fffa><0><ff><3>
<SWITCH_INFO_TYPE><WDTWIN><Watch Dog Timer Window><3><4>
<SETTING_VALUE_TYPE><PS75_0><Watch Dog Timer Window Width is 75 percent><0>
<SETTING_VALUE_TYPE><PS50_0><Watch Dog Timer Window Width is 50 percent><1>
<SETTING_VALUE_TYPE><PS37_5><Watch Dog Timer Window Width is 37.5 percent><2>
<SETTING_VALUE_TYPE><PS25_0><Watch Dog Timer Window Width is 25 percent><3>
<SWITCH_INFO_TYPE><WDTCLK><Watch Dog Timer Clock Source><c><4>
<SETTING_VALUE_TYPE><SYS><Use FOSC/4 when system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><0>
<SETTING_VALUE_TYPE><SOSC><Always use SOSC><4>
<SETTING_VALUE_TYPE><LPRC><Always use INTOSC/LPRC><8>
<SETTING_VALUE_TYPE><FRC><Use FRC when WINDIS = 0, system clock is not INTOSC/LPRC and device is not in Sleep; otherwise, use INTOSC/LPRC><c>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale><f0><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><10>
<SETTING_VALUE_TYPE><4><1:4><20>
<SETTING_VALUE_TYPE><8><1:8><30>
<SETTING_VALUE_TYPE><16><1:16><40>
<SETTING_VALUE_TYPE><32><1:32><50>
<SETTING_VALUE_TYPE><64><1:64><60>
<SETTING_VALUE_TYPE><128><1:128><70>
<SETTING_VALUE_TYPE><256><1:256><80>
<SETTING_VALUE_TYPE><512><1:512><90>
<SETTING_VALUE_TYPE><1024><1:1024><a0>
<SETTING_VALUE_TYPE><2048><1:2048><b0>
<SETTING_VALUE_TYPE><4096><1:4096><c0>
<SETTING_VALUE_TYPE><8192><1:8192><d0>
<SETTING_VALUE_TYPE><16384><1:16384><e0>
<SETTING_VALUE_TYPE><32768><1:32768><f0>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WINDIS><Windowed Watchdog Timer Disable><4><2>
<SETTING_VALUE_TYPE><WDTWIN><Windowed WDT enabled><0>
<SETTING_VALUE_TYPE><WDTSTD><Standard WDT selected; windowed WDT disabled><4>
<SWITCH_INFO_TYPE><WPSA><WDT Prescaler><8><2>
<SETTING_VALUE_TYPE><32><WDT prescaler ratio of 1:32><0>
<SETTING_VALUE_TYPE><128><WDT prescaler ratio of 1:128><8>
<CONFIGREG_INFO_TYPE><1fffc><0><1d><4>
<SWITCH_INFO_TYPE><RETEN><Retention Voltage Regulator Control Enable><1><2>
<SETTING_VALUE_TYPE><ON><Retention controlled by SRETEN during Sleep><0>
<SETTING_VALUE_TYPE><OFF><Retention not available><1>
<SWITCH_INFO_TYPE><VBTBOR><VBAT BOR Enable><4><2>
<SETTING_VALUE_TYPE><OFF><VBAT BOR is disabled><0>
<SETTING_VALUE_TYPE><ON><VBAT BOR is enabled><4>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR Enable><8><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled in Deep Sleep (does not affect operation in non-Deep Sleep modes)><0>
<SETTING_VALUE_TYPE><ON><BOR enabled in Deep Sleep><8>
<SWITCH_INFO_TYPE><DSBITEN><DSEN Bit Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Deep Sleep operation is always disabled><0>
<SETTING_VALUE_TYPE><ON><Deep Sleep is controlled by the register bit DSEN><10>
<CONFIGREG_INFO_TYPE><1fffd><0><f0><0>
<CONFIGREG_INFO_TYPE><1fffe><0><f8><1>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Timer Postscale Select><f8><20>
<SETTING_VALUE_TYPE><DSWDTPS0><1:32 (1 mS)><0>
<SETTING_VALUE_TYPE><DSWDTPS1><1:64 (2.1 mS)><8>
<SETTING_VALUE_TYPE><DSWDTPS2><1:128 (4.1 mS)><10>
<SETTING_VALUE_TYPE><DSWDTPS3><1: 256 (8.3 mS)><18>
<SETTING_VALUE_TYPE><DSWDTPS4><1:512 (16.5 mS)><20>
<SETTING_VALUE_TYPE><DSWDTPS5><1:1024 (33 mS)><28>
<SETTING_VALUE_TYPE><DSWDTPS6><1:2048 (66.1 mS)><30>
<SETTING_VALUE_TYPE><DSWDTPS7><1:4096 (132.1 mS)><38>
<SETTING_VALUE_TYPE><DSWDTPS8><1:8192 (264.3 mS)><40>
<SETTING_VALUE_TYPE><DSWDTPS9><1:16384 (528.5 mS)><48>
<SETTING_VALUE_TYPE><DSWDTPSA><1:32768 (1.057 Secs)><50>
<SETTING_VALUE_TYPE><DSWDTPSB><1:65536 (2.114 Secs)><58>
<SETTING_VALUE_TYPE><DSWDTPSC><1:131072 (4.228 Secs)><60>
<SETTING_VALUE_TYPE><DSWDTPSD><1:262114 (8.456 Secs)><68>
<SETTING_VALUE_TYPE><DSWDTPSE><1:524288 (16.912 Secs)><70>
<SETTING_VALUE_TYPE><DSWDTPSF><1:1048576 (33.825 Secs)><78>
<SETTING_VALUE_TYPE><DSWDTPS10><1:2097152 (67.7 Secs)><80>
<SETTING_VALUE_TYPE><DSWDTPS11><1:4194304 (135.3 Secs)><88>
<SETTING_VALUE_TYPE><DSWDTPS12><1:8388608 (4.5 Minutes)><90>
<SETTING_VALUE_TYPE><DSWDTPS13><1:16777216 (9 Minutes)><98>
<SETTING_VALUE_TYPE><DSWDTPS14><1:33554432 (18 Minutes)><a0>
<SETTING_VALUE_TYPE><DSWDTPS15><1:67108864 (36.1 Minutes)><a8>
<SETTING_VALUE_TYPE><DSWDTPS16><1:134217728 (72.2 Minutes)><b0>
<SETTING_VALUE_TYPE><DSWDTPS17><1:268435456 (2.4 Hours)><b8>
<SETTING_VALUE_TYPE><DSWDTPS18><1:536870912 (4.8 Hours)><c0>
<SETTING_VALUE_TYPE><DSWDTPS19><1:1073741824 (9.6 Hours)><c8>
<SETTING_VALUE_TYPE><DSWDTPS1A><1:2147483648 (19.2 Hours)><d0>
<SETTING_VALUE_TYPE><DSWDTPS1B><1:4294967296 (38.5 Hours)><d8>
<SETTING_VALUE_TYPE><DSWDTPS1C><1:8589934592 (77 Hours)><e0>
<SETTING_VALUE_TYPE><DSWDTPS1D><1:17179869184 (6.4 Days)><e8>
<SETTING_VALUE_TYPE><DSWDTPS1E><1:34359738368 (12.8  Days)><f0>
<SETTING_VALUE_TYPE><DSWDTPS1F><1:68719476736 (25.7 Days)><f8>
<CONFIGREG_INFO_TYPE><1ffff><0><f3><2>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer Enable><1><2>
<SETTING_VALUE_TYPE><OFF><DSWDT Disabled><0>
<SETTING_VALUE_TYPE><ON><DSWDT Enabled><1>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Reference Clock Select><2><2>
<SETTING_VALUE_TYPE><SOSC><DSWDT uses SOSC as reference clock><0>
<SETTING_VALUE_TYPE><LPRC><DSWDT uses LPRC as reference clock><2>
<PART_INFO_TYPE><a120><PIC18LF1220><18xxxx><2><1><fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FSCM><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><3>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><80><1>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA5 input pin enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RA5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (00200-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (00200-0007FFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (00200-000F7Fh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (00200-0007FFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (00200-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (00200-0007FFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a121><PIC18LF1230><18xxxx><6><1><fff><10><ff><7f><0-7f><f80-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal oscillator, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal oscillator, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><e><3>
<SWITCH_INFO_TYPE><PWMPIN><PWM Output Pins Reset State Control bit><2><2>
<SETTING_VALUE_TYPE><ON><PWM outputs drive active states upon Reset><0>
<SETTING_VALUE_TYPE><OFF><PWM outputs disabled upon Reset><2>
<SWITCH_INFO_TYPE><LPOL><Low-Side Transistors Polarity bit (Even PWM Output Polarity Control bit)><4><2>
<SETTING_VALUE_TYPE><LOW><PWM0, PWM2 and PWM4 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM0, PWM2 and PWM4 are active-high (default)><4>
<SWITCH_INFO_TYPE><HPOL><High Side Transistors Polarity bit (Odd PWM Output Polarity Control bit)><8><2>
<SETTING_VALUE_TYPE><LOW><PWM1, PWM3 and PWM5 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM1, PWM3 and PWM5 are active-high (default)><8>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><FLTAMX><FLTA Mux bit><1><2>
<SETTING_VALUE_TYPE><RA7><FLTA input is muxed onto RA7><0>
<SETTING_VALUE_TYPE><RA5><FLTA input is muxed onto RA5><1>
<SWITCH_INFO_TYPE><T1OSCMX><T1OSO/T1CKI MUX bit><8><2>
<SETTING_VALUE_TYPE><LOW><T1OSO/T1CKI pin resides on RB2><0>
<SETTING_VALUE_TYPE><HIGH><T1OSO/T1CKI pin resides on RA6><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA5 input pin enabled, MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RA5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><4>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><2>
<SETTING_VALUE_TYPE><BB256><256 Words (512 Bytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB512><512 Words (1024 Bytes) Boot Block size><30>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0 (000400-0007FF)><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1 (000800-000FFF)><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protection bit (Boot Block Memory Area)><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Code Protection bit (Data EEPROM)><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0 (000400-0007FF)><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1 (000800-000FFF)><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Write Protection bit (Configuration Registers)><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Write Protection bit (Boot Block Memory Area)><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Write Protection bit (Data EEPROM)><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0 (000400-0007FF)><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1 (000800-000FFF)><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protection bit (Boot Block Memory Area)><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a130><PIC18LF1320><18xxxx><2><1><1fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FSCM><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><3>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><80><1>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA5 input pin enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RA5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (00200-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (00200-000FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (00200-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (00200-000FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (00200-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (00200-000FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a131><PIC18LF1330><18xxxx><6><1><1fff><10><ff><7f><0-7f><f80-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal oscillator, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal oscillator, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><e><3>
<SWITCH_INFO_TYPE><PWMPIN><PWM Output Pins Reset State Control bit><2><2>
<SETTING_VALUE_TYPE><ON><PWM outputs drive active states upon Reset><0>
<SETTING_VALUE_TYPE><OFF><PWM outputs disabled upon Reset><2>
<SWITCH_INFO_TYPE><LPOL><Low-Side Transistors Polarity bit (Even PWM Output Polarity Control bit)><4><2>
<SETTING_VALUE_TYPE><LOW><PWM0, PWM2 and PWM4 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM0, PWM2 and PWM4 are active-high (default)><4>
<SWITCH_INFO_TYPE><HPOL><High Side Transistors Polarity bit (Odd PWM Output Polarity Control bit)><8><2>
<SETTING_VALUE_TYPE><LOW><PWM1, PWM3 and PWM5 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM1, PWM3 and PWM5 are active-high (default)><8>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><FLTAMX><FLTA Mux bit><1><2>
<SETTING_VALUE_TYPE><RA7><FLTA input is muxed onto RA7><0>
<SETTING_VALUE_TYPE><RA5><FLTA input is muxed onto RA5><1>
<SWITCH_INFO_TYPE><T1OSCMX><T1OSO/T1CKI MUX bit><8><2>
<SETTING_VALUE_TYPE><LOW><T1OSO/T1CKI pin resides on RB2><0>
<SETTING_VALUE_TYPE><HIGH><T1OSO/T1CKI pin resides on RA6><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA5 input pin enabled, MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RA5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><4>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB256><256 Words (512 Bytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB512><512 Words (1024 Bytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB1K><1K Words (2048 Bytes) Boot Block size><30>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0 (000800-000FFF)><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1 (001000-001FFF)><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protection bit (Boot Block Memory Area)><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Code Protection bit (Data EEPROM)><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0 (000800-000FFF)><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1 (001000-001FFF)><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Write Protection bit (Configuration Registers)><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Write Protection bit (Boot Block Memory Area)><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Write Protection bit (Data EEPROM)><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0 (000800-000FFF)><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1 (001000-001FFF)><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protection bit (Boot Block Memory Area)><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a133><PIC18LF13K22><18xxxx><6><1><1fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><27><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><d>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><ERCCLKOUT><External RC oscillator, CLKOUT function on OSC2><3>
<SETTING_VALUE_TYPE><ECCLKOUTH><EC, CLKOUT function on OSC2 (high)><4>
<SETTING_VALUE_TYPE><ECH><EC (high)><5>
<SETTING_VALUE_TYPE><ERC><External RC oscillator><7>
<SETTING_VALUE_TYPE><IRC><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><IRCCLKOUT><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECCLKOUTM><EC, CLKOUT function on OSC2 (medium)><a>
<SETTING_VALUE_TYPE><ECM><EC (medium)><b>
<SETTING_VALUE_TYPE><ECCLKOUTL><EC, CLKOUT function on OSC2 (low)><c>
<SETTING_VALUE_TYPE><ECL><EC (low)><d>
<SWITCH_INFO_TYPE><PLLEN><4 X PLL Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><PLL is under software control><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PCLKEN><Primary Clock Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock is under software control><0>
<SETTING_VALUE_TYPE><ON><Primary clock enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><19><VBOR set to 1.9 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect.><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><88><2>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up bit><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RA3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><8><2>
<SETTING_VALUE_TYPE><OFF><512W boot block size><0>
<SETTING_VALUE_TYPE><ON><1kW boot block size><8>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RA0 and RA1 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RA0 and RA1 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><d135><PIC18LF13K50><18xxxx><6><1><1fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Selection bits><18><4>
<SETTING_VALUE_TYPE><NOCLKDIV><No CPU System Clock divide><0>
<SETTING_VALUE_TYPE><CLKDIV2><CPU System Clock divided by 2><8>
<SETTING_VALUE_TYPE><CLKDIV3><CPU System Clock divided by 3><10>
<SETTING_VALUE_TYPE><CLKDIV4><CPU System Clock divided by 4><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB clock comes directly from the OSC1/OSC2 oscillator block; no divide><0>
<SETTING_VALUE_TYPE><ON><USB clock comes from the OSC1/OSC2 divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><27><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><d>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><ERCCLKOUT><External RC oscillator, CLKOUT function on OSC2><3>
<SETTING_VALUE_TYPE><ECCLKOUTH><EC, CLKOUT function on OSC2 (high)><4>
<SETTING_VALUE_TYPE><ECH><EC (high)><5>
<SETTING_VALUE_TYPE><ERC><External RC oscillator><7>
<SETTING_VALUE_TYPE><IRC><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><IRCCLKOUT><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECCLKOUTM><EC, CLKOUT function on OSC2 (medium)><a>
<SETTING_VALUE_TYPE><ECM><EC (medium)><b>
<SETTING_VALUE_TYPE><ECCLKOUTL><EC, CLKOUT function on OSC2 (low)><c>
<SETTING_VALUE_TYPE><ECL><EC (low)><d>
<SWITCH_INFO_TYPE><PLLEN><4 X PLL Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><PLL is under software control><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PCLKEN><Primary Clock Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock is under software control><0>
<SETTING_VALUE_TYPE><ON><Primary clock enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><19><VBOR set to 1.9 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect.><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><88><2>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up bit><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RA3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><8><2>
<SETTING_VALUE_TYPE><OFF><512W boot block size><0>
<SETTING_VALUE_TYPE><ON><1kW boot block size><8>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RA0 and RA1 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RA0 and RA1 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Table Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a142><PIC18LF14K22><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><27><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><d>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><ERCCLKOUT><External RC oscillator, CLKOUT function on OSC2><3>
<SETTING_VALUE_TYPE><ECCLKOUTH><EC, CLKOUT function on OSC2 (high)><4>
<SETTING_VALUE_TYPE><ECH><EC (high)><5>
<SETTING_VALUE_TYPE><ERC><External RC oscillator><7>
<SETTING_VALUE_TYPE><IRC><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><IRCCLKOUT><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECCLKOUTM><EC, CLKOUT function on OSC2 (medium)><a>
<SETTING_VALUE_TYPE><ECM><EC (medium)><b>
<SETTING_VALUE_TYPE><ECCLKOUTL><EC, CLKOUT function on OSC2 (low)><c>
<SETTING_VALUE_TYPE><ECL><EC (low)><d>
<SWITCH_INFO_TYPE><PLLEN><4 X PLL Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><PLL is under software control><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PCLKEN><Primary Clock Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock is under software control><0>
<SETTING_VALUE_TYPE><ON><Primary clock enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><19><VBOR set to 1.9 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect.><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><88><2>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up bit><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RA3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><8><2>
<SETTING_VALUE_TYPE><OFF><1kW boot block size><0>
<SETTING_VALUE_TYPE><ON><2kW boot block size><8>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RA0 and RA1 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RA0 and RA1 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><d145><PIC18LF14K50><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Selection bits><18><4>
<SETTING_VALUE_TYPE><NOCLKDIV><No CPU System Clock divide><0>
<SETTING_VALUE_TYPE><CLKDIV2><CPU System Clock divided by 2><8>
<SETTING_VALUE_TYPE><CLKDIV3><CPU System Clock divided by 3><10>
<SETTING_VALUE_TYPE><CLKDIV4><CPU System Clock divided by 4><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB clock comes directly from the OSC1/OSC2 oscillator block; no divide><0>
<SETTING_VALUE_TYPE><ON><USB clock comes from the OSC1/OSC2 divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><27><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><d>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><ERCCLKOUT><External RC oscillator, CLKOUT function on OSC2><3>
<SETTING_VALUE_TYPE><ECCLKOUTH><EC, CLKOUT function on OSC2 (high)><4>
<SETTING_VALUE_TYPE><ECH><EC (high)><5>
<SETTING_VALUE_TYPE><ERC><External RC oscillator><7>
<SETTING_VALUE_TYPE><IRC><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><IRCCLKOUT><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECCLKOUTM><EC, CLKOUT function on OSC2 (medium)><a>
<SETTING_VALUE_TYPE><ECM><EC (medium)><b>
<SETTING_VALUE_TYPE><ECCLKOUTL><EC, CLKOUT function on OSC2 (low)><c>
<SETTING_VALUE_TYPE><ECL><EC (low)><d>
<SWITCH_INFO_TYPE><PLLEN><4 X PLL Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><PLL is under software control><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PCLKEN><Primary Clock Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock is under software control><0>
<SETTING_VALUE_TYPE><ON><Primary clock enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><19><VBOR set to 1.9 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect.><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><88><2>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up bit><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RA3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><8><2>
<SETTING_VALUE_TYPE><OFF><1kW boot block size><0>
<SETTING_VALUE_TYPE><ON><2kW boot block size><8>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RA0 and RA1 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RA0 and RA1 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Table Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a200><PIC18LF2220><18xxxx><2><1><fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FSCM><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBAD><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><DIG><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ANA><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR disabled; RE3 input is enabled in 40-pin devices only (PIC18F4X20)><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a201><PIC18LF2221><18xxxx><6><1><fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum Setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum Setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><RB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><DIG><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ANA><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><2>
<SETTING_VALUE_TYPE><BB256>< 256 Word><0>
<SETTING_VALUE_TYPE><BB512>< 512 Word><30>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bitProtect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a202><PIC18LF2320><18xxxx><2><1><1fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FSCM><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBAD><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><DIG><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ANA><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR disabled; RE3 input is enabled in 40-pin devices only (PIC18F4X20)><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (001000-0017FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (001000-0017FFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (001800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (001800-001FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (001000-0017FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (001000-0017FFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (001800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (001800-001FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (001000-0017FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (001000-0017FFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (001800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (001800-001FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a203><PIC18LF2321><18xxxx><6><1><1fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum Setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum Setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><RB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><DIG><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ANA><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB256>< 256 Word><0>
<SETTING_VALUE_TYPE><BB512>< 512 Word><10>
<SETTING_VALUE_TYPE><BB1K><1024 Word><30>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bitProtect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a204><PIC18LF2331><18xxxx><2><1><1fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC2><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO><Internal oscillator block, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><IRC><Internal oscillator block, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC1><101X External RC oscillator, CLKO function on RA6><a>
<SETTING_VALUE_TYPE><RC><11XX External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><Reserved><c>
<CONFIGREG_INFO_TYPE><300003><0><3f><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<SWITCH_INFO_TYPE><WINEN><Watchdog Timer Window Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><WDT window enabledbled><0>
<SETTING_VALUE_TYPE><OFF><WDT window disabled><20>
<CONFIGREG_INFO_TYPE><300004><0><3c><4>
<SWITCH_INFO_TYPE><PWMPIN><PWM output pins Reset state control><4><2>
<SETTING_VALUE_TYPE><ON><PWM outputs drive active states upon Reset><0>
<SETTING_VALUE_TYPE><OFF><PWM outputs disabled upon Reset (default)><4>
<SWITCH_INFO_TYPE><LPOL><Low-Side Transistors Polarity><8><2>
<SETTING_VALUE_TYPE><LOW><PWM0, 2, 4 and 6 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM0, 2, 4 and 6 are active-high><8>
<SWITCH_INFO_TYPE><HPOL><High-Side Transistors Polarity><10><2>
<SETTING_VALUE_TYPE><LOW><PWM1, 3, 5 and 7 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM1, 3, 5 and 7 are active-high><10>
<SWITCH_INFO_TYPE><T1OSCMX><Timer1 Oscillator MUX><20><2>
<SETTING_VALUE_TYPE><OFF><Standard (legacy) Timer1 oscillator operation><0>
<SETTING_VALUE_TYPE><ON><Low-power Timer1 operation when microcontroller is in Sleep mode><20>
<CONFIGREG_INFO_TYPE><300005><0><9d><1>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><b322><PIC18LF23K22><18xxxx><6><1><1fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><25><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSHP><HS oscillator (high power > 16 MHz)><2>
<SETTING_VALUE_TYPE><HSMP><HS oscillator (medium power 4-16 MHz)><3>
<SETTING_VALUE_TYPE><ECHP><EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)><4>
<SETTING_VALUE_TYPE><ECHPIO6><EC oscillator (high power, >16 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECMP><EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)><a>
<SETTING_VALUE_TYPE><ECMPIO6><EC oscillator (medium power, 500 kHz-16 MHz)><b>
<SETTING_VALUE_TYPE><ECLP><EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)><c>
<SETTING_VALUE_TYPE><ECLPIO6><EC oscillator (low power, <500 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><4X PLL Enable><10><2>
<SETTING_VALUE_TYPE><OFF><Oscillator used directly><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PRICLKEN><Primary clock enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock can be disabled by software><0>
<SETTING_VALUE_TYPE><ON><Primary clock enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><285><VBOR set to 2.85 V nominal><0>
<SETTING_VALUE_TYPE><250><VBOR set to 2.50 V nominal><8>
<SETTING_VALUE_TYPE><220><VBOR set to 2.20 V nominal><10>
<SETTING_VALUE_TYPE><190><VBOR set to 1.90 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><Watch dog timer is always disabled. SWDTEN has no effect.><0>
<SETTING_VALUE_TYPE><NOSLP><WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect><1>
<SETTING_VALUE_TYPE><SWON><WDT is controlled by SWDTEN bit of the WDTCON register><2>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><bf><7>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><CCP3MX><P3A/CCP3 Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTC6><P3A/CCP3 input/output is mulitplexed with RC6><0>
<SETTING_VALUE_TYPE><PORTB5><P3A/CCP3 input/output is multiplexed with RB5><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><HFINTOSC output and ready status are delayed by the oscillator stable status><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC output and ready status are not delayed by the oscillator stable status><8>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock input mux bit><10><2>
<SETTING_VALUE_TYPE><PORTB5><T3CKI is on RB5><0>
<SETTING_VALUE_TYPE><PORTC0><T3CKI is on RC0><10>
<SWITCH_INFO_TYPE><P2BMX><ECCP2 B output mux bit><20><2>
<SETTING_VALUE_TYPE><PORTC0><P2B is on RC0><0>
<SETTING_VALUE_TYPE><PORTB5><P2B is on RB5><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><INTMCLR><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin enabled, RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a205><PIC18LF2410><18xxxx><6><1><3fff><10><ff><0><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a208><PIC18LF242><18xxxx><2><1><3fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300005><0><1><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><a206><PIC18LF2420><18xxxx><6><1><3fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a207><PIC18LF2423><18xxxx><6><1><3fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a209><PIC18LF2431><18xxxx><2><1><3fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC2><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO><Internal oscillator block, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><IRC><Internal oscillator block, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC1><101X External RC oscillator, CLKO function on RA6><a>
<SETTING_VALUE_TYPE><RC><11XX External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><Reserved><c>
<CONFIGREG_INFO_TYPE><300003><0><3f><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<SWITCH_INFO_TYPE><WINEN><Watchdog Timer Window Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><WDT window enabledbled><0>
<SETTING_VALUE_TYPE><OFF><WDT window disabled><20>
<CONFIGREG_INFO_TYPE><300004><0><3c><4>
<SWITCH_INFO_TYPE><PWMPIN><PWM output pins Reset state control><4><2>
<SETTING_VALUE_TYPE><ON><PWM outputs drive active states upon Reset><0>
<SETTING_VALUE_TYPE><OFF><PWM outputs disabled upon Reset (default)><4>
<SWITCH_INFO_TYPE><LPOL><Low-Side Transistors Polarity><8><2>
<SETTING_VALUE_TYPE><LOW><PWM0, 2, 4 and 6 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM0, 2, 4 and 6 are active-high><8>
<SWITCH_INFO_TYPE><HPOL><High-Side Transistors Polarity><10><2>
<SETTING_VALUE_TYPE><LOW><PWM1, 3, 5 and 7 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM1, 3, 5 and 7 are active-high><10>
<SWITCH_INFO_TYPE><T1OSCMX><Timer1 Oscillator MUX><20><2>
<SETTING_VALUE_TYPE><OFF><Standard (legacy) Timer1 oscillator operation><0>
<SETTING_VALUE_TYPE><ON><Low-power Timer1 operation when microcontroller is in Sleep mode><20>
<CONFIGREG_INFO_TYPE><300005><0><9d><1>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (002000-002FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (002000-002FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (003000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (003000-003FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (002000-002FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (002000-002FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (003000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (003000-003FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (002000-002FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (002000-002FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (003000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (003000-003FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a210><PIC18LF2439><18xxxx><2><1><2fff><10><ff><ff><0-7f><f80-fff><0><a>
<CONFIGREG_INFO_TYPE><300001><0><22><1>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200h-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200h-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200h-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200h-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><a20a><PIC18LF2450><18xxxx><6><1><3fff><10><ff><0><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><46><4.6V><0>
<SETTING_VALUE_TYPE><43><4.3V><8>
<SETTING_VALUE_TYPE><28><2.8V><10>
<SETTING_VALUE_TYPE><21><2.1V><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><8><2>
<SETTING_VALUE_TYPE><BB1K><1KW Boot block size><0>
<SETTING_VALUE_TYPE><BB2K><2KW Boot block size><8>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) or (001000-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) or (001000-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) or (000000-000FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) or (000000-000FFFh) is not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) or (001000-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) or (001000-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) or (000000-000FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) or (000000-000FFFh) is not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) or (001000-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) or (001000-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) or (000000-000FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) or (000000-000FFFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a20b><PIC18LF2455><18xxxx><6><1><5fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a20c><PIC18LF2458><18xxxx><6><1><5fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a20e><PIC18LF248><18xxxx><2><1><3fff><10><ff><ff><0-5f><f60-fff><0><a>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><a20d><PIC18LF2480><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><10><2>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) boot block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) boot block><10>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a241><PIC18LF24J10><18xxxx><6><1><3ff7><10><ff><0><0-7f><f80-fff><0><5>
<CONFIGREG_INFO_TYPE><3ff8><0><ff><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><3ff9><0><f7><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><3ffa><0><ff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLKO function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><3ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><3ffd><0><ff><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><b411><PIC18LF24J11><18xxxx><6><1><3ff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><3ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><3ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><3ffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><3ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><3ffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><3ffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><3ffe><0><cf><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><f><10>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><3fff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><b450><PIC18LF24J50><18xxxx><6><1><3ff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><3ff8><0><ef><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset ><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><3ff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><3ffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><3ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><3ffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><3ffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><3ffe><0><cf><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><f><10>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><3fff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><b422><PIC18LF24K22><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><25><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSHP><HS oscillator (high power > 16 MHz)><2>
<SETTING_VALUE_TYPE><HSMP><HS oscillator (medium power 4-16 MHz)><3>
<SETTING_VALUE_TYPE><ECHP><EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)><4>
<SETTING_VALUE_TYPE><ECHPIO6><EC oscillator (high power, >16 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECMP><EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)><a>
<SETTING_VALUE_TYPE><ECMPIO6><EC oscillator (medium power, 500 kHz-16 MHz)><b>
<SETTING_VALUE_TYPE><ECLP><EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)><c>
<SETTING_VALUE_TYPE><ECLPIO6><EC oscillator (low power, <500 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><4X PLL Enable><10><2>
<SETTING_VALUE_TYPE><OFF><Oscillator used directly><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PRICLKEN><Primary clock enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock can be disabled by software><0>
<SETTING_VALUE_TYPE><ON><Primary clock enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><285><VBOR set to 2.85 V nominal><0>
<SETTING_VALUE_TYPE><250><VBOR set to 2.50 V nominal><8>
<SETTING_VALUE_TYPE><220><VBOR set to 2.20 V nominal><10>
<SETTING_VALUE_TYPE><190><VBOR set to 1.90 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><Watch dog timer is always disabled. SWDTEN has no effect.><0>
<SETTING_VALUE_TYPE><NOSLP><WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect><1>
<SETTING_VALUE_TYPE><SWON><WDT is controlled by SWDTEN bit of the WDTCON register><2>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><bf><7>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><CCP3MX><P3A/CCP3 Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTC6><P3A/CCP3 input/output is mulitplexed with RC6><0>
<SETTING_VALUE_TYPE><PORTB5><P3A/CCP3 input/output is multiplexed with RB5><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><HFINTOSC output and ready status are delayed by the oscillator stable status><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC output and ready status are not delayed by the oscillator stable status><8>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock input mux bit><10><2>
<SETTING_VALUE_TYPE><PORTB5><T3CKI is on RB5><0>
<SETTING_VALUE_TYPE><PORTC0><T3CKI is on RC0><10>
<SWITCH_INFO_TYPE><P2BMX><ECCP2 B output mux bit><20><2>
<SETTING_VALUE_TYPE><PORTC0><P2B is on RC0><0>
<SETTING_VALUE_TYPE><PORTB5><P2B is on RB5><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><INTMCLR><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin enabled, RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><c244><PIC18LF24K40><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><a29c><PIC18LF24K42><18XVxx><6><1><3fff><40><ff><ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><4>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><d452><PIC18LF24K50><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><4>
<SWITCH_INFO_TYPE><PLLSEL><PLL Selection><1><2>
<SETTING_VALUE_TYPE><PLL4X><4x clock multiplier><0>
<SETTING_VALUE_TYPE><PLL3X><3x clock multiplier><1>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration bit><2><2>
<SETTING_VALUE_TYPE><OFF><PLL Disabled (firmware controlled)><0>
<SETTING_VALUE_TYPE><ON><PLL Enabled><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><18><4>
<SETTING_VALUE_TYPE><NOCLKDIV><CPU uses system clock (no divide)><0>
<SETTING_VALUE_TYPE><CLKDIV2><CPU uses system clock divided by 2><8>
<SETTING_VALUE_TYPE><CLKDIV3><CPU uses system clock divided by 3><10>
<SETTING_VALUE_TYPE><CLKDIV6><CPU uses system clock divided by 6><18>
<SWITCH_INFO_TYPE><LS48MHZ><Low Speed USB mode with 48 MHz system clock><20><2>
<SETTING_VALUE_TYPE><SYS24X4><System clock at 24 MHz, USB clock divider is set to 4><0>
<SETTING_VALUE_TYPE><SYS48X8><System clock at 48 MHz, USB clock divider is set to 8><20>
<CONFIGREG_INFO_TYPE><300001><0><25><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSH><HS oscillator, high power 16MHz to 25MHz><2>
<SETTING_VALUE_TYPE><HSM><HS oscillator, medium power 4MHz to 16MHz><3>
<SETTING_VALUE_TYPE><ECHCLKO><EC oscillator, high power 16MHz to 48MHz, clock output on OSC2><4>
<SETTING_VALUE_TYPE><ECHIO><EC oscillator, high power 16MHz to 48MHz><5>
<SETTING_VALUE_TYPE><RCCLKO><External RC oscillator, clock output on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTOSCIO><Internal oscillator><8>
<SETTING_VALUE_TYPE><INTOSCCLKO><Internal oscillator, clock output on OSC2><9>
<SETTING_VALUE_TYPE><ECMCLKO><EC oscillator, medium power 4MHz to 16MHz, clock output on OSC2><a>
<SETTING_VALUE_TYPE><ECMIO><EC oscillator, medium power 4MHz to 16MHz><b>
<SETTING_VALUE_TYPE><ECLCLKO><EC oscillator, low power <4MHz, clock output on OSC2><c>
<SETTING_VALUE_TYPE><ECLIO><EC oscillator, low power <4MHz><d>
<SWITCH_INFO_TYPE><PCLKEN><Primary Oscillator Shutdown><20><2>
<SETTING_VALUE_TYPE><OFF><Primary oscillator shutdown firmware controlled><0>
<SETTING_VALUE_TYPE><ON><Primary oscillator enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><5f><4>
<SWITCH_INFO_TYPE><nPWRTEN><Power-up Timer Enable><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><6><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled in hardware (SBOREN is ignored)><0>
<SETTING_VALUE_TYPE><ON><BOR controlled by firmware (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><BOR enabled in hardware, disabled in Sleep mode (SBOREN is ignored)><4>
<SETTING_VALUE_TYPE><SBORDIS><BOR enabled in hardware (SBOREN is ignored)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><18><4>
<SETTING_VALUE_TYPE><285><BOR set to 2.85V nominal><0>
<SETTING_VALUE_TYPE><250><BOR set to 2.5V nominal><8>
<SETTING_VALUE_TYPE><220><BOR set to 2.2V nominal><10>
<SETTING_VALUE_TYPE><190><BOR set to 1.9V nominal><18>
<SWITCH_INFO_TYPE><nLPBOR><Low-Power Brown-out Reset><40><2>
<SETTING_VALUE_TYPE><ON><Low-Power Brown-out Reset enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power Brown-out Reset disabled><40>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware (SWDTEN ignored)><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled in hardware, disabled in Sleep mode (SWDTEN ignored)><1>
<SETTING_VALUE_TYPE><SWON><WDT controlled by firmware (SWDTEN enabled)><2>
<SETTING_VALUE_TYPE><ON><WDT enabled in hardware (SWDTEN ignored)><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><d3><5>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><RB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock Input MUX bit><10><2>
<SETTING_VALUE_TYPE><RB5><T3CKI function is on RB5><0>
<SETTING_VALUE_TYPE><RC0><T3CKI function is on RC0><10>
<SWITCH_INFO_TYPE><SDOMX><SDO Output MUX bit><40><2>
<SETTING_VALUE_TYPE><RC7><SDO function is on RC7><0>
<SETTING_VALUE_TYPE><RB3><SDO function is on RB3><40>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Reset Pin Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; external MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><ICPRT><Dedicated In-Circuit Debug/Programming Port Enable><20><1>
<SETTING_VALUE_TYPE><OFF><ICPORT disabled><0>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Block 0 Code Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Block 1 Code Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Block 0 Write Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (0800-1FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (0800-1FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Block 1 Write Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (2000-3FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (2000-3FFFh) is not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Registers Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (0000-7FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (0000-7FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Block 0 Table Read Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Block 1 Table Read Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a20f><PIC18LF2510><18xxxx><6><1><7fff><10><ff><0><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a211><PIC18LF2515><18xxxx><6><1><bfff><10><ff><0><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a215><PIC18LF252><18xxxx><2><1><7fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300005><0><1><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from Table Reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><a212><PIC18LF2520><18xxxx><6><1><7fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a213><PIC18LF2523><18xxxx><6><1><7fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a214><PIC18LF2525><18xxxx><6><1><bfff><10><ff><3ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKOUT function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a216><PIC18LF2539><18xxxx><2><1><5fff><10><ff><ff><0-7f><f80-fff><0><a>
<CONFIGREG_INFO_TYPE><300001><0><22><1>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200h-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200h-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200h-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200h-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><a217><PIC18LF2550><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a218><PIC18LF2553><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a21b><PIC18LF258><18xxxx><2><1><7fff><10><ff><ff><0-5f><f60-fff><0><a>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from Table Reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><a219><PIC18LF2580><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><10><2>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) boot block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) boot block><10>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a21a><PIC18LF2585><18xxxx><6><1><bfff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) Boot Block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) Boot Block><10>
<SETTING_VALUE_TYPE><4096><4K words (8K bytes) Boot Block><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a251><PIC18LF25J10><18xxxx><6><1><7ff7><10><ff><0><0-7f><f80-fff><0><5>
<CONFIGREG_INFO_TYPE><7ff8><0><ff><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f7><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><ff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLKO function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffd><0><ff><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><b511><PIC18LF25J11><18xxxx><6><1><7ff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><7ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><7ffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><7ffe><0><df><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><1f><20>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><7fff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><b551><PIC18LF25J50><18xxxx><6><1><7ff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><7ff8><0><ef><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><7ff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><7ffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><7ffe><0><df><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><1f><20>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><7fff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><b522><PIC18LF25K22><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><25><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSHP><HS oscillator (high power > 16 MHz)><2>
<SETTING_VALUE_TYPE><HSMP><HS oscillator (medium power 4-16 MHz)><3>
<SETTING_VALUE_TYPE><ECHP><EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)><4>
<SETTING_VALUE_TYPE><ECHPIO6><EC oscillator (high power, >16 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECMP><EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)><a>
<SETTING_VALUE_TYPE><ECMPIO6><EC oscillator (medium power, 500 kHz-16 MHz)><b>
<SETTING_VALUE_TYPE><ECLP><EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)><c>
<SETTING_VALUE_TYPE><ECLPIO6><EC oscillator (low power, <500 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><4X PLL Enable><10><2>
<SETTING_VALUE_TYPE><OFF><Oscillator used directly><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PRICLKEN><Primary clock enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock disabled><0>
<SETTING_VALUE_TYPE><ON><Primary clock is always enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><285><VBOR set to 2.85 V nominal><0>
<SETTING_VALUE_TYPE><250><VBOR set to 2.50 V nominal><8>
<SETTING_VALUE_TYPE><220><VBOR set to 2.20 V nominal><10>
<SETTING_VALUE_TYPE><190><VBOR set to 1.90 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><Watch dog timer is always disabled. SWDTEN has no effect.><0>
<SETTING_VALUE_TYPE><NOSLP><WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect><1>
<SETTING_VALUE_TYPE><SWON><WDT is controlled by SWDTEN bit of the WDTCON register><2>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><bf><7>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><CCP3MX><P3A/CCP3 Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTC6><P3A/CCP3 input/output is mulitplexed with RC6><0>
<SETTING_VALUE_TYPE><PORTB5><P3A/CCP3 input/output is multiplexed with RB5><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><HFINTOSC output and ready status are delayed by the oscillator stable status><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC output and ready status are not delayed by the oscillator stable status><8>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock input mux bit><10><2>
<SETTING_VALUE_TYPE><PORTB5><T3CKI is on RB5><0>
<SETTING_VALUE_TYPE><PORTC0><T3CKI is on RC0><10>
<SWITCH_INFO_TYPE><P2BMX><ECCP2 B output mux bit><20><2>
<SETTING_VALUE_TYPE><PORTC0><P2B is on RC0><0>
<SETTING_VALUE_TYPE><PORTB5><P2B is on RB5><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><INTMCLR><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin enabled, RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><c254><PIC18LF25K40><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><a29d><PIC18LF25K42><18XVxx><6><1><7fff><40><ff><ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><5>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><d552><PIC18LF25K50><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><4>
<SWITCH_INFO_TYPE><PLLSEL><PLL Selection><1><2>
<SETTING_VALUE_TYPE><PLL4X><4x clock multiplier><0>
<SETTING_VALUE_TYPE><PLL3X><3x clock multiplier><1>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration bit><2><2>
<SETTING_VALUE_TYPE><OFF><PLL Disabled (firmware controlled)><0>
<SETTING_VALUE_TYPE><ON><PLL Enabled><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><18><4>
<SETTING_VALUE_TYPE><NOCLKDIV><CPU uses system clock (no divide)><0>
<SETTING_VALUE_TYPE><CLKDIV2><CPU uses system clock divided by 2><8>
<SETTING_VALUE_TYPE><CLKDIV3><CPU uses system clock divided by 3><10>
<SETTING_VALUE_TYPE><CLKDIV6><CPU uses system clock divided by 6><18>
<SWITCH_INFO_TYPE><LS48MHZ><Low Speed USB mode with 48 MHz system clock><20><2>
<SETTING_VALUE_TYPE><SYS24X4><System clock at 24 MHz, USB clock divider is set to 4><0>
<SETTING_VALUE_TYPE><SYS48X8><System clock at 48 MHz, USB clock divider is set to 8><20>
<CONFIGREG_INFO_TYPE><300001><0><25><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSH><HS oscillator, high power 16MHz to 25MHz><2>
<SETTING_VALUE_TYPE><HSM><HS oscillator, medium power 4MHz to 16MHz><3>
<SETTING_VALUE_TYPE><ECHCLKO><EC oscillator, high power 16MHz to 48MHz, clock output on OSC2><4>
<SETTING_VALUE_TYPE><ECHIO><EC oscillator, high power 16MHz to 48MHz><5>
<SETTING_VALUE_TYPE><RCCLKO><External RC oscillator, clock output on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTOSCIO><Internal oscillator><8>
<SETTING_VALUE_TYPE><INTOSCCLKO><Internal oscillator, clock output on OSC2><9>
<SETTING_VALUE_TYPE><ECMCLKO><EC oscillator, medium power 4MHz to 16MHz, clock output on OSC2><a>
<SETTING_VALUE_TYPE><ECMIO><EC oscillator, medium power 4MHz to 16MHz><b>
<SETTING_VALUE_TYPE><ECLCLKO><EC oscillator, low power <4MHz, clock output on OSC2><c>
<SETTING_VALUE_TYPE><ECLIO><EC oscillator, low power <4MHz><d>
<SWITCH_INFO_TYPE><PCLKEN><Primary Oscillator Shutdown><20><2>
<SETTING_VALUE_TYPE><OFF><Primary oscillator shutdown firmware controlled><0>
<SETTING_VALUE_TYPE><ON><Primary oscillator enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><5f><4>
<SWITCH_INFO_TYPE><nPWRTEN><Power-up Timer Enable><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><6><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled in hardware (SBOREN is ignored)><0>
<SETTING_VALUE_TYPE><ON><BOR controlled by firmware (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><BOR enabled in hardware, disabled in Sleep mode (SBOREN is ignored)><4>
<SETTING_VALUE_TYPE><SBORDIS><BOR enabled in hardware (SBOREN is ignored)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><18><4>
<SETTING_VALUE_TYPE><285><BOR set to 2.85V nominal><0>
<SETTING_VALUE_TYPE><250><BOR set to 2.5V nominal><8>
<SETTING_VALUE_TYPE><220><BOR set to 2.2V nominal><10>
<SETTING_VALUE_TYPE><190><BOR set to 1.9V nominal><18>
<SWITCH_INFO_TYPE><nLPBOR><Low-Power Brown-out Reset><40><2>
<SETTING_VALUE_TYPE><ON><Low-Power Brown-out Reset enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power Brown-out Reset disabled><40>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware (SWDTEN ignored)><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled in hardware, disabled in Sleep mode (SWDTEN ignored)><1>
<SETTING_VALUE_TYPE><SWON><WDT controlled by firmware (SWDTEN enabled)><2>
<SETTING_VALUE_TYPE><ON><WDT enabled in hardware (SWDTEN ignored)><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><d3><5>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><RB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock Input MUX bit><10><2>
<SETTING_VALUE_TYPE><RB5><T3CKI function is on RB5><0>
<SETTING_VALUE_TYPE><RC0><T3CKI function is on RC0><10>
<SWITCH_INFO_TYPE><SDOMX><SDO Output MUX bit><40><2>
<SETTING_VALUE_TYPE><RC7><SDO function is on RC7><0>
<SETTING_VALUE_TYPE><RB3><SDO function is on RB3><40>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Reset Pin Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; external MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><ICPRT><Dedicated In-Circuit Debug/Programming Port Enable><20><1>
<SETTING_VALUE_TYPE><OFF><ICPORT disabled><0>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Block 0 Code Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Block 1 Code Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Block 2 Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 is not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Block 3 Code Protect><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 is not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Block 0 Write Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (0800-1FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (0800-1FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Block 1 Write Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (2000-3FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (2000-3FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Block 2 Write Protect><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (04000-5FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (04000-5FFFh) is not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Block 3 Write Protect><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (06000-7FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (06000-7FFFh) is not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Registers Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (0000-7FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (0000-7FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Block 0 Table Read Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Block 1 Table Read Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Block 2 Table Read Protect><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 is not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Block 3 Table Read Protect><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 is not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><d580><PIC18LF25K80><18xxxx><6><1><7fff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Ultra low-power regulator is Enabled (Controlled by SRETEN bit)><0>
<SETTING_VALUE_TYPE><OFF><Ultra low-power regulator is Disabled (Controlled by REGSLP bit)><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300005><0><89><3>
<SWITCH_INFO_TYPE><CANMX><ECAN Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTC><ECAN TX and RX pins are located on RC6 and RC7, respectively><0>
<SETTING_VALUE_TYPE><PORTB><ECAN TX and RX pins are located on RB2 and RB3, respectively><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RE3 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RE3 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><a2d1><PIC18LF25K83><18XVxx><6><1><7fff><40><ff><3ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><5>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><a21c><PIC18LF2610><18xxxx><6><1><ffff><10><ff><0><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a21d><PIC18LF2620><18xxxx><6><1><ffff><10><ff><3ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKOUT function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a21e><PIC18LF2680><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) Boot Block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) Boot Block><10>
<SETTING_VALUE_TYPE><4096><4K words (8K bytes) Boot Block><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a21f><PIC18LF2682><18xxxx><6><1><13fff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) Boot Block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) Boot Block><10>
<SETTING_VALUE_TYPE><4096><4K words (8K bytes) Boot Block><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3f><5>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3f><5>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3f><5>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a220><PIC18LF2685><18xxxx><6><1><17fff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) Boot Block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) Boot Block><10>
<SETTING_VALUE_TYPE><4096><4K words (8K bytes) Boot Block><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3f><6>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3f><6>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3f><6>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><b612><PIC18LF26J11><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><fffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffe><0><ff><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><3f><40>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><ffff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><b617><PIC18LF26J13><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><fff8><0><ff><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><96MHz PLL Prescaler Selection (PLLSEL=0)><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration Bit><10><2>
<SETTING_VALUE_TYPE><ON><PLL Enabled><0>
<SETTING_VALUE_TYPE><OFF><PLL Disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><ff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><18><4>
<SETTING_VALUE_TYPE><RESERVED><Reserved><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode selected><10>
<SETTING_VALUE_TYPE><HIGH><High Power T1OSC/SOSC circuit selected><18>
<SWITCH_INFO_TYPE><CLKOEC><EC Clock Out Enable Bit ><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><fffd><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><ADCSEL><ADC 10 or 12 Bit Select><2><2>
<SETTING_VALUE_TYPE><BIT12><12 - Bit ADC Enabled><0>
<SETTING_VALUE_TYPE><BIT10><10 - Bit ADC Enabled><2>
<SWITCH_INFO_TYPE><PLLSEL><PLL Selection Bit><4><2>
<SETTING_VALUE_TYPE><PLL96><Selects 96MHz PLL><0>
<SETTING_VALUE_TYPE><PLL4X><Selects 4x PLL><4>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffe><0><bf><2>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><3f><40>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region ><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><ffff><0><f3><2>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<6:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<6:0>/WPEND region ignored><1>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select bit (valid when WPDIS = 0)><2><2>
<SETTING_VALUE_TYPE><PAGE_0><Pages 0 through WPFP<6:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Pages WPFP<6:0> through Configuration Words erase/write protected><2>
<PART_INFO_TYPE><b651><PIC18LF26J50><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><fff8><0><ef><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset ><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><fff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><fffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffe><0><ff><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><3f><40>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><ffff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><b656><PIC18LF26J53><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><fff8><0><ff><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration Bit><10><2>
<SETTING_VALUE_TYPE><ON><PLL Enabled><0>
<SETTING_VALUE_TYPE><OFF><PLL Disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><fff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><ff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><18><4>
<SETTING_VALUE_TYPE><RESERVED><Reserved><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode selected><10>
<SETTING_VALUE_TYPE><HIGH><High Power T1OSC/SOSC circuit selected><18>
<SWITCH_INFO_TYPE><CLKOEC><EC Clock Out Enable Bit ><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><fffd><0><fb><3>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><ADCSEL><ADC 10 or 12 Bit Select><2><2>
<SETTING_VALUE_TYPE><BIT12><12 - Bit ADC Enabled><0>
<SETTING_VALUE_TYPE><BIT10><10 - Bit ADC Enabled><2>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffe><0><bf><2>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><3f><40>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region ><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><ffff><0><fb><3>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<6:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<6:0>/WPEND region ignored><1>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select bit (valid when WPDIS = 0)><2><2>
<SETTING_VALUE_TYPE><PAGE_0><Pages 0 through WPFP<6:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Pages WPFP<6:0> through Configuration Words erase/write protected><2>
<SWITCH_INFO_TYPE><LS48MHZ><Low Speed USB mode with 48 MHz system clock bit><8><2>
<SETTING_VALUE_TYPE><SYS24X4><System clock at 24 MHz USB CLKEN divide-by is set to 4><0>
<SETTING_VALUE_TYPE><SYS48X8><System clock at 48 MHz USB CLKEN divide-by is set to 8><8>
<PART_INFO_TYPE><b623><PIC18LF26K22><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><25><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSHP><HS oscillator (high power > 16 MHz)><2>
<SETTING_VALUE_TYPE><HSMP><HS oscillator (medium power 4-16 MHz)><3>
<SETTING_VALUE_TYPE><ECHP><EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)><4>
<SETTING_VALUE_TYPE><ECHPIO6><EC oscillator (high power, >16 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECMP><EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)><a>
<SETTING_VALUE_TYPE><ECMPIO6><EC oscillator (medium power, 500 kHz-16 MHz)><b>
<SETTING_VALUE_TYPE><ECLP><EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)><c>
<SETTING_VALUE_TYPE><ECLPIO6><EC oscillator (low power, <500 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><4X PLL Enable><10><2>
<SETTING_VALUE_TYPE><OFF><Oscillator used directly><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PRICLKEN><Primary clock enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock can be disabled by software><0>
<SETTING_VALUE_TYPE><ON><Primary clock enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><285><VBOR set to 2.85 V nominal><0>
<SETTING_VALUE_TYPE><250><VBOR set to 2.50 V nominal><8>
<SETTING_VALUE_TYPE><220><VBOR set to 2.20 V nominal><10>
<SETTING_VALUE_TYPE><190><VBOR set to 1.90 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><Watch dog timer is always disabled. SWDTEN has no effect.><0>
<SETTING_VALUE_TYPE><NOSLP><WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect><1>
<SETTING_VALUE_TYPE><SWON><WDT is controlled by SWDTEN bit of the WDTCON register><2>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><bf><7>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><CCP3MX><P3A/CCP3 Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTC6><P3A/CCP3 input/output is mulitplexed with RC6><0>
<SETTING_VALUE_TYPE><PORTB5><P3A/CCP3 input/output is multiplexed with RB5><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><HFINTOSC output and ready status are delayed by the oscillator stable status><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC output and ready status are not delayed by the oscillator stable status><8>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock input mux bit><10><2>
<SETTING_VALUE_TYPE><PORTB5><T3CKI is on RB5><0>
<SETTING_VALUE_TYPE><PORTC0><T3CKI is on RC0><10>
<SWITCH_INFO_TYPE><P2BMX><ECCP2 B output mux bit><20><2>
<SETTING_VALUE_TYPE><PORTC0><P2B is on RC0><0>
<SETTING_VALUE_TYPE><PORTB5><P2B is on RB5><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><INTMCLR><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin enabled, RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a640><PIC18LF26K40><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><a2bf><PIC18LF26K42><18XVxx><6><1><ffff><40><ff><3ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><6>
<SETTING_VALUE_TYPE><BBSIZE_16384><Boot Block size is 16384 words><2>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><d680><PIC18LF26K80><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Ultra low-power regulator is Enabled (Controlled by SRETEN bit)><0>
<SETTING_VALUE_TYPE><OFF><Ultra low-power regulator is Disabled (Controlled by REGSLP bit)><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300005><0><89><3>
<SWITCH_INFO_TYPE><CANMX><ECAN Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTC><ECAN TX and RX pins are located on RC6 and RC7, respectively><0>
<SETTING_VALUE_TYPE><PORTB><ECAN TX and RX pins are located on RB2 and RB3, respectively><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RE3 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RE3 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><a2ca><PIC18LF26K83><18XVxx><6><1><ffff><40><ff><3ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_2P45><Brown-out Reset Voltage (VBOR) set to 2.45V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><6>
<SETTING_VALUE_TYPE><BBSIZE_16384><Boot Block size is 16384 words><2>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><b712><PIC18LF27J13><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><1fff8><0><ff><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><96MHz PLL Prescaler Selection (PLLSEL=0)><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration Bit><10><2>
<SETTING_VALUE_TYPE><ON><PLL Enabled><0>
<SETTING_VALUE_TYPE><OFF><PLL Disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><1fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fffa><0><ff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><18><4>
<SETTING_VALUE_TYPE><RESERVED><Reserved><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode selected><10>
<SETTING_VALUE_TYPE><HIGH><High Power T1OSC/SOSC circuit selected><18>
<SWITCH_INFO_TYPE><CLKOEC><EC Clock Out Enable Bit ><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><1fffd><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><ADCSEL><ADC 10 or 12 Bit Select><2><2>
<SETTING_VALUE_TYPE><BIT12><12 - Bit ADC Enabled><0>
<SETTING_VALUE_TYPE><BIT10><10 - Bit ADC Enabled><2>
<SWITCH_INFO_TYPE><PLLSEL><PLL Selection Bit><4><2>
<SETTING_VALUE_TYPE><PLL96><Selects 96MHz PLL><0>
<SETTING_VALUE_TYPE><PLL4X><Selects 4x PLL><4>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><1fffe><0><ff><2>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><7f><80>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><PAGE_64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><PAGE_65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><PAGE_66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><PAGE_67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><PAGE_68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><PAGE_69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><PAGE_70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><PAGE_71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><PAGE_72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><PAGE_73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><PAGE_74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><PAGE_75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><PAGE_76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><PAGE_77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><PAGE_78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><PAGE_79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><PAGE_80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><PAGE_81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><PAGE_82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><PAGE_83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><PAGE_84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><PAGE_85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><PAGE_86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><PAGE_87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><PAGE_88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><PAGE_89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><PAGE_90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><PAGE_91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><PAGE_92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><PAGE_93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><PAGE_94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><PAGE_95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><PAGE_96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><PAGE_97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><PAGE_98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><PAGE_99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><PAGE_100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><PAGE_101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><PAGE_102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><PAGE_103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><PAGE_104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><PAGE_105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><PAGE_106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><PAGE_107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><PAGE_108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><PAGE_109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><PAGE_110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><PAGE_111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><PAGE_112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><PAGE_113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><PAGE_114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><PAGE_115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><PAGE_116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><PAGE_117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><PAGE_118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><PAGE_119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><PAGE_120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><PAGE_121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><PAGE_122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><PAGE_123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><PAGE_124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><PAGE_125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><PAGE_126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><PAGE_127><Write Protect Program Flash Page 127><7f>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region ><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><1ffff><0><f3><2>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<6:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<6:0>/WPEND region ignored><1>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select bit (valid when WPDIS = 0)><2><2>
<SETTING_VALUE_TYPE><PAGE_0><Pages 0 through WPFP<6:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Pages WPFP<6:0> through Configuration Words erase/write protected><2>
<PART_INFO_TYPE><c753><PIC18LF27J53><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><1fff8><0><ff><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration Bit><10><2>
<SETTING_VALUE_TYPE><ON><PLL Enabled><0>
<SETTING_VALUE_TYPE><OFF><PLL Disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><1fff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fffa><0><ff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><18><4>
<SETTING_VALUE_TYPE><RESERVED><Reserved><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode selected><10>
<SETTING_VALUE_TYPE><HIGH><High Power T1OSC/SOSC circuit selected><18>
<SWITCH_INFO_TYPE><CLKOEC><EC Clock Out Enable Bit ><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><1fffd><0><fb><3>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><ADCSEL><ADC 10 or 12 Bit Select><2><2>
<SETTING_VALUE_TYPE><BIT12><12 - Bit ADC Enabled><0>
<SETTING_VALUE_TYPE><BIT10><10 - Bit ADC Enabled><2>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><1fffe><0><ff><2>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><7f><80>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><PAGE_64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><PAGE_65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><PAGE_66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><PAGE_67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><PAGE_68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><PAGE_69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><PAGE_70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><PAGE_71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><PAGE_72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><PAGE_73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><PAGE_74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><PAGE_75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><PAGE_76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><PAGE_77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><PAGE_78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><PAGE_79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><PAGE_80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><PAGE_81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><PAGE_82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><PAGE_83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><PAGE_84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><PAGE_85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><PAGE_86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><PAGE_87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><PAGE_88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><PAGE_89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><PAGE_90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><PAGE_91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><PAGE_92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><PAGE_93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><PAGE_94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><PAGE_95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><PAGE_96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><PAGE_97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><PAGE_98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><PAGE_99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><PAGE_100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><PAGE_101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><PAGE_102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><PAGE_103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><PAGE_104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><PAGE_105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><PAGE_106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><PAGE_107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><PAGE_108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><PAGE_109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><PAGE_110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><PAGE_111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><PAGE_112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><PAGE_113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><PAGE_114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><PAGE_115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><PAGE_116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><PAGE_117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><PAGE_118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><PAGE_119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><PAGE_120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><PAGE_121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><PAGE_122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><PAGE_123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><PAGE_124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><PAGE_125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><PAGE_126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><PAGE_127><Write Protect Program Flash Page 127><7f>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region ><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><1ffff><0><fb><3>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<6:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<6:0>/WPEND region ignored><1>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select bit (valid when WPDIS = 0)><2><2>
<SETTING_VALUE_TYPE><PAGE_0><Pages 0 through WPFP<6:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Pages WPFP<6:0> through Configuration Words erase/write protected><2>
<SWITCH_INFO_TYPE><LS48MHZ><Low Speed USB mode with 48 MHz system clock bit><8><2>
<SETTING_VALUE_TYPE><SYS24X4><System clock at 24 MHz USB CLKEN divide-by is set to 4><0>
<SETTING_VALUE_TYPE><SYS48X8><System clock at 48 MHz USB CLKEN divide-by is set to 8><8>
<PART_INFO_TYPE><a277><PIC18LF27K40><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><a2cc><PIC18LF27K42><18XVxx><6><1><1ffff><40><ff><3ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><7>
<SETTING_VALUE_TYPE><BBSIZE_32768><Boot Block size is 32768 words><1>
<SETTING_VALUE_TYPE><BBSIZE_16384><Boot Block size is 16384 words><2>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><a223><PIC18LF4220><18xxxx><2><1><fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FSCM><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBAD><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><DIG><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ANA><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR disabled; RE3 input is enabled in 40-pin devices only (PIC18F4X20)><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a224><PIC18LF4221><18xxxx><6><1><fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum Setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum Setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><RB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><DIG><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ANA><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><2>
<SETTING_VALUE_TYPE><BB256>< 256 Word><0>
<SETTING_VALUE_TYPE><BB512>< 512 Word><30>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bitProtect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a225><PIC18LF4320><18xxxx><2><1><1fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FSCM><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal/External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal/External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBAD><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><DIG><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ANA><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR disabled; RE3 input is enabled in 40-pin devices only (PIC18F4X20)><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (001000-0017FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (001000-0017FFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (001800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (001800-001FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (001000-0017FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (001000-0017FFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (001800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (001800-001FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-0007FFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (000800-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (000800-000FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (001000-0017FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (001000-0017FFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (001800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (001800-001FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a226><PIC18LF4321><18xxxx><6><1><1fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP Oscillator><0>
<SETTING_VALUE_TYPE><XT><XT Oscillator><1>
<SETTING_VALUE_TYPE><HS><HS Oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO2><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO1><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum Setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum Setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><RB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><DIG><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ANA><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB256>< 256 Word><0>
<SETTING_VALUE_TYPE><BB512>< 512 Word><10>
<SETTING_VALUE_TYPE><BB1K><1024 Word><30>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bitProtect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a227><PIC18LF4331><18xxxx><2><1><1fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC2><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO><Internal oscillator block, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><IRC><Internal oscillator block, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC1><101X External RC oscillator, CLKO function on RA6><a>
<SETTING_VALUE_TYPE><RC><11XX External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><Reserved><c>
<CONFIGREG_INFO_TYPE><300003><0><3f><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<SWITCH_INFO_TYPE><WINEN><Watchdog Timer Window Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><WDT window enabledbled><0>
<SETTING_VALUE_TYPE><OFF><WDT window disabled><20>
<CONFIGREG_INFO_TYPE><300004><0><3c><4>
<SWITCH_INFO_TYPE><PWMPIN><PWM output pins Reset state control><4><2>
<SETTING_VALUE_TYPE><ON><PWM outputs drive active states upon Reset><0>
<SETTING_VALUE_TYPE><OFF><PWM outputs disabled upon Reset (default)><4>
<SWITCH_INFO_TYPE><LPOL><Low-Side Transistors Polarity><8><2>
<SETTING_VALUE_TYPE><LOW><PWM0, 2, 4 and 6 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM0, 2, 4 and 6 are active-high><8>
<SWITCH_INFO_TYPE><HPOL><High-Side Transistors Polarity><10><2>
<SETTING_VALUE_TYPE><LOW><PWM1, 3, 5 and 7 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM1, 3, 5 and 7 are active-high><10>
<SWITCH_INFO_TYPE><T1OSCMX><Timer1 Oscillator MUX><20><2>
<SETTING_VALUE_TYPE><OFF><Standard (legacy) Timer1 oscillator operation><0>
<SETTING_VALUE_TYPE><ON><Low-power Timer1 operation when microcontroller is in Sleep mode><20>
<CONFIGREG_INFO_TYPE><300005><0><9d><5>
<SWITCH_INFO_TYPE><FLTAMX><FLTA MUX bit><1><2>
<SETTING_VALUE_TYPE><RD4><FLTA input is multiplexed with RD4><0>
<SETTING_VALUE_TYPE><RC1><FLTA input is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><SSPMX><SSP I/O MUX bit><4><2>
<SETTING_VALUE_TYPE><RD1><SCK/SCL clocks and SDA/SDI data are multiplexed with RD3 and RD2, respectively. SDO output is multiplexed with RD1.><0>
<SETTING_VALUE_TYPE><RC7><SCK/SCL clocks and SDA/SDI data are multiplexed with RC5 and RC4, respectively. SDO output is multiplexed with RC7.><4>
<SWITCH_INFO_TYPE><PWM4MX><PWM4 MUX bit><8><2>
<SETTING_VALUE_TYPE><RD5><PWM4 output is multiplexed with RD5><0>
<SETTING_VALUE_TYPE><RB5><PWM4 output is multiplexed with RB5><8>
<SWITCH_INFO_TYPE><EXCLKMX><TMR0/T5CKI External clock MUX bit><10><2>
<SETTING_VALUE_TYPE><RD0><TMR0/T5CKI external clock input is multiplexed with RD0><0>
<SETTING_VALUE_TYPE><RC3><TMR0/T5CKI external clock input is multiplexed with RC3><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><c322><PIC18LF43K22><18xxxx><6><1><1fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><25><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSHP><HS oscillator (high power > 16 MHz)><2>
<SETTING_VALUE_TYPE><HSMP><HS oscillator (medium power 4-16 MHz)><3>
<SETTING_VALUE_TYPE><ECHP><EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)><4>
<SETTING_VALUE_TYPE><ECHPIO6><EC oscillator (high power, >16 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECMP><EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)><a>
<SETTING_VALUE_TYPE><ECMPIO6><EC oscillator (medium power, 500 kHz-16 MHz)><b>
<SETTING_VALUE_TYPE><ECLP><EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)><c>
<SETTING_VALUE_TYPE><ECLPIO6><EC oscillator (low power, <500 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><4X PLL Enable><10><2>
<SETTING_VALUE_TYPE><OFF><Oscillator used directly><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PRICLKEN><Primary clock enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock can be disabled by software><0>
<SETTING_VALUE_TYPE><ON><Primary clock is always enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><285><VBOR set to 2.85 V nominal><0>
<SETTING_VALUE_TYPE><250><VBOR set to 2.50 V nominal><8>
<SETTING_VALUE_TYPE><220><VBOR set to 2.20 V nominal><10>
<SETTING_VALUE_TYPE><190><VBOR set to 1.90 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><Watch dog timer is always disabled. SWDTEN has no effect.><0>
<SETTING_VALUE_TYPE><NOSLP><WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect><1>
<SETTING_VALUE_TYPE><SWON><WDT is controlled by SWDTEN bit of the WDTCON register><2>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><bf><7>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><CCP3MX><P3A/CCP3 Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTE0><P3A/CCP3 input/output is mulitplexed with RE0><0>
<SETTING_VALUE_TYPE><PORTB5><P3A/CCP3 input/output is multiplexed with RB5><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><HFINTOSC output and ready status are delayed by the oscillator stable status><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC output and ready status are not delayed by the oscillator stable status><8>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock input mux bit><10><2>
<SETTING_VALUE_TYPE><PORTB5><T3CKI is on RB5><0>
<SETTING_VALUE_TYPE><PORTC0><T3CKI is on RC0><10>
<SWITCH_INFO_TYPE><P2BMX><ECCP2 B output mux bit><20><2>
<SETTING_VALUE_TYPE><PORTC0><P2B is on RC0><0>
<SETTING_VALUE_TYPE><PORTD2><P2B is on RD2><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><INTMCLR><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin enabled, RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a228><PIC18LF4410><18xxxx><6><1><3fff><10><ff><0><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a22a><PIC18LF442><18xxxx><2><1><3fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300005><0><1><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><a229><PIC18LF4420><18xxxx><6><1><3fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a22b><PIC18LF4423><18xxxx><6><1><3fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a22c><PIC18LF4431><18xxxx><2><1><3fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><cf><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC2><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO><Internal oscillator block, port function on RA6 and port function on RA7><8>
<SETTING_VALUE_TYPE><IRC><Internal oscillator block, CLKO function on RA6 and port function on RA7><9>
<SETTING_VALUE_TYPE><RC1><101X External RC oscillator, CLKO function on RA6><a>
<SETTING_VALUE_TYPE><RC><11XX External RC oscillator, CLKO function on RA6><c>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Internal External Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Internal External Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><Reserved><c>
<CONFIGREG_INFO_TYPE><300003><0><3f><3>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<SWITCH_INFO_TYPE><WINEN><Watchdog Timer Window Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><WDT window enabledbled><0>
<SETTING_VALUE_TYPE><OFF><WDT window disabled><20>
<CONFIGREG_INFO_TYPE><300004><0><3c><4>
<SWITCH_INFO_TYPE><PWMPIN><PWM output pins Reset state control><4><2>
<SETTING_VALUE_TYPE><ON><PWM outputs drive active states upon Reset><0>
<SETTING_VALUE_TYPE><OFF><PWM outputs disabled upon Reset (default)><4>
<SWITCH_INFO_TYPE><LPOL><Low-Side Transistors Polarity><8><2>
<SETTING_VALUE_TYPE><LOW><PWM0, 2, 4 and 6 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM0, 2, 4 and 6 are active-high><8>
<SWITCH_INFO_TYPE><HPOL><High-Side Transistors Polarity><10><2>
<SETTING_VALUE_TYPE><LOW><PWM1, 3, 5 and 7 are active-low><0>
<SETTING_VALUE_TYPE><HIGH><PWM1, 3, 5 and 7 are active-high><10>
<SWITCH_INFO_TYPE><T1OSCMX><Timer1 Oscillator MUX><20><2>
<SETTING_VALUE_TYPE><OFF><Standard (legacy) Timer1 oscillator operation><0>
<SETTING_VALUE_TYPE><ON><Low-power Timer1 operation when microcontroller is in Sleep mode><20>
<CONFIGREG_INFO_TYPE><300005><0><9d><5>
<SWITCH_INFO_TYPE><FLTAMX><FLTA MUX bit><1><2>
<SETTING_VALUE_TYPE><RD4><FLTA input is multiplexed with RD4><0>
<SETTING_VALUE_TYPE><RC1><FLTA input is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><SSPMX><SSP I/O MUX bit><4><2>
<SETTING_VALUE_TYPE><RD1><SCK/SCL clocks and SDA/SDI data are multiplexed with RD3 and RD2, respectively. SDO output is multiplexed with RD1.><0>
<SETTING_VALUE_TYPE><RC7><SCK/SCL clocks and SDA/SDI data are multiplexed with RC5 and RC4, respectively. SDO output is multiplexed with RC7.><4>
<SWITCH_INFO_TYPE><PWM4MX><PWM4 MUX bit><8><2>
<SETTING_VALUE_TYPE><RD5><PWM4 output is multiplexed with RD5><0>
<SETTING_VALUE_TYPE><RB5><PWM4 output is multiplexed with RB5><8>
<SWITCH_INFO_TYPE><EXCLKMX><TMR0/T5CKI External clock MUX bit><10><2>
<SETTING_VALUE_TYPE><RD0><TMR0/T5CKI external clock input is multiplexed with RD0><0>
<SETTING_VALUE_TYPE><RC3><TMR0/T5CKI external clock input is multiplexed with RC3><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (002000-002FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (002000-002FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (003000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (003000-003FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (002000-002FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (002000-002FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (003000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (003000-003FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-000FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-000FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (001000-001FFF) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (001000-001FFF) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (002000-002FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (002000-002FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (003000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (003000-003FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a22d><PIC18LF4439><18xxxx><2><1><2fff><10><ff><ff><0-7f><f80-fff><0><a>
<CONFIGREG_INFO_TYPE><300001><0><22><1>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200h-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200h-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200h-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200h-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><a22e><PIC18LF4450><18xxxx><6><1><3fff><10><ff><0><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><46><4.6V><0>
<SETTING_VALUE_TYPE><43><4.3V><8>
<SETTING_VALUE_TYPE><28><2.8V><10>
<SETTING_VALUE_TYPE><21><2.1V><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><6>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><8><2>
<SETTING_VALUE_TYPE><BB1K><1KW Boot block size><0>
<SETTING_VALUE_TYPE><BB2K><2KW Boot block size><8>
<SWITCH_INFO_TYPE><ICPRT><Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><ICPORT disabled><0>
<SETTING_VALUE_TYPE><ON><ICPORT enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) or (001000-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) or (001000-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) or (000000-000FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) or (000000-000FFFh) is not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) or (001000-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) or (001000-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) or (000000-000FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) or (000000-000FFFh) is not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) or (001000-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) or (001000-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) or (000000-000FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) or (000000-000FFFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a22f><PIC18LF4455><18xxxx><6><1><5fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><ICPRT><Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><ICPORT disabled><0>
<SETTING_VALUE_TYPE><ON><ICPORT enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a230><PIC18LF4458><18xxxx><6><1><5fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><ICPRT><Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><ICPORT disabled><0>
<SETTING_VALUE_TYPE><ON><ICPORT enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a233><PIC18LF448><18xxxx><2><1><3fff><10><ff><ff><0-5f><f60-fff><0><a>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><a231><PIC18LF4480><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><10><2>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) boot block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) boot block><10>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a441><PIC18LF44J10><18xxxx><6><1><3ff7><10><ff><0><0-7f><f80-fff><0><5>
<CONFIGREG_INFO_TYPE><3ff8><0><ff><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><3ff9><0><f7><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><3ffa><0><ff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLKO function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><3ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><3ffd><0><ff><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><c411><PIC18LF44J11><18xxxx><6><1><3ff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><3ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><3ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><3ffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><3ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><3ffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><3ffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><3ffe><0><cf><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><f><10>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><3fff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><c450><PIC18LF44J50><18xxxx><6><1><3ff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><3ff8><0><ef><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><3ff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><3ffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><3ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><3ffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><3ffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><3ffe><0><cf><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><f><10>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><3fff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><c422><PIC18LF44K22><18xxxx><6><1><3fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><25><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSHP><HS oscillator (high power > 16 MHz)><2>
<SETTING_VALUE_TYPE><HSMP><HS oscillator (medium power 4-16 MHz)><3>
<SETTING_VALUE_TYPE><ECHP><EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)><4>
<SETTING_VALUE_TYPE><ECHPIO6><EC oscillator (high power, >16 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECMP><EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)><a>
<SETTING_VALUE_TYPE><ECMPIO6><EC oscillator (medium power, 500 kHz-16 MHz)><b>
<SETTING_VALUE_TYPE><ECLP><EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)><c>
<SETTING_VALUE_TYPE><ECLPIO6><EC oscillator (low power, <500 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><4X PLL Enable><10><2>
<SETTING_VALUE_TYPE><OFF><Oscillator used directly><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PRICLKEN><Primary clock enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock can be disabled by software><0>
<SETTING_VALUE_TYPE><ON><Primary clock is always enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><285><VBOR set to 2.85 V nominal><0>
<SETTING_VALUE_TYPE><250><VBOR set to 2.50 V nominal><8>
<SETTING_VALUE_TYPE><220><VBOR set to 2.20 V nominal><10>
<SETTING_VALUE_TYPE><190><VBOR set to 1.90 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><Watch dog timer is always disabled. SWDTEN has no effect.><0>
<SETTING_VALUE_TYPE><NOSLP><WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect><1>
<SETTING_VALUE_TYPE><SWON><WDT is controlled by SWDTEN bit of the WDTCON register><2>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><bf><7>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><CCP3MX><P3A/CCP3 Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTE0><P3A/CCP3 input/output is mulitplexed with RE0><0>
<SETTING_VALUE_TYPE><PORTB5><P3A/CCP3 input/output is multiplexed with RB5><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><HFINTOSC output and ready status are delayed by the oscillator stable status><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC output and ready status are not delayed by the oscillator stable status><8>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock input mux bit><10><2>
<SETTING_VALUE_TYPE><PORTB5><T3CKI is on RB5><0>
<SETTING_VALUE_TYPE><PORTC0><T3CKI is on RC0><10>
<SWITCH_INFO_TYPE><P2BMX><ECCP2 B output mux bit><20><2>
<SETTING_VALUE_TYPE><PORTC0><P2B is on RC0><0>
<SETTING_VALUE_TYPE><PORTD2><P2B is on RD2><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><INTMCLR><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin enabled, RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a234><PIC18LF4510><18xxxx><6><1><7fff><10><ff><0><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a235><PIC18LF4515><18xxxx><6><1><bfff><10><ff><0><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a236><PIC18LF452><18xxxx><2><1><7fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300005><0><1><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from Table Reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><a237><PIC18LF4520><18xxxx><6><1><7fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a238><PIC18LF4523><18xxxx><6><1><7fff><10><ff><ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a239><PIC18LF4525><18xxxx><6><1><bfff><10><ff><3ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKOUT function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a23a><PIC18LF4539><18xxxx><2><1><5fff><10><ff><ff><0-7f><f80-fff><0><a>
<CONFIGREG_INFO_TYPE><300001><0><22><1>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause RESET><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause RESET><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200h-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200h-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200h-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200h-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><a23b><PIC18LF4550><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><ICPRT><Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><ICPORT disabled><0>
<SETTING_VALUE_TYPE><ON><ICPORT enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a23c><PIC18LF4553><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><3>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><7><8>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><0>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><1>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><3>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><5>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><7>
<SWITCH_INFO_TYPE><CPUDIV><System Clock Postscaler Selection bits><18><4>
<SETTING_VALUE_TYPE><OSC1_PLL2><[Primary Oscillator Src: /1][96 MHz PLL Src: /2]><0>
<SETTING_VALUE_TYPE><OSC2_PLL3><[Primary Oscillator Src: /2][96 MHz PLL Src: /3]><8>
<SETTING_VALUE_TYPE><OSC3_PLL4><[Primary Oscillator Src: /3][96 MHz PLL Src: /4]><10>
<SETTING_VALUE_TYPE><OSC4_PLL6><[Primary Oscillator Src: /4][96 MHz PLL Src: /6]><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1)><20><2>
<SETTING_VALUE_TYPE><1><USB clock source comes directly from the primary oscillator block with no postscale><0>
<SETTING_VALUE_TYPE><2><USB clock source comes from the 96 MHz PLL divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><5><3>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><c>
<SETTING_VALUE_TYPE><XT_XT><XT oscillator (XT)><0>
<SETTING_VALUE_TYPE><XTPLL_XT><XT oscillator, PLL enabled (XTPLL)><2>
<SETTING_VALUE_TYPE><ECIO_EC><EC oscillator, port function on RA6 (ECIO)><4>
<SETTING_VALUE_TYPE><EC_EC><EC oscillator, CLKO function on RA6 (EC)><5>
<SETTING_VALUE_TYPE><ECPLLIO_EC><EC oscillator, PLL enabled, port function on RA6 (ECPIO)><6>
<SETTING_VALUE_TYPE><ECPLL_EC><EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)><7>
<SETTING_VALUE_TYPE><INTOSCIO_EC><Internal oscillator, port function on RA6, EC used by USB (INTIO)><8>
<SETTING_VALUE_TYPE><INTOSC_EC><Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)><9>
<SETTING_VALUE_TYPE><INTOSC_XT><Internal oscillator, XT used by USB (INTXT)><a>
<SETTING_VALUE_TYPE><INTOSC_HS><Internal oscillator, HS oscillator used by USB (INTHS)><b>
<SETTING_VALUE_TYPE><HS><HS oscillator (HS)><c>
<SETTING_VALUE_TYPE><HSPLL_HS><HS oscillator, PLL enabled (HSPLL)><e>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><4>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SOFT><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><ON_ACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<SWITCH_INFO_TYPE><VREGEN><USB Voltage Regulator Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB voltage regulator disabled><0>
<SETTING_VALUE_TYPE><ON><USB voltage regulator enabled><20>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR pin disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><ICPRT><Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><ICPORT disabled><0>
<SETTING_VALUE_TYPE><ON><ICPORT enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a23f><PIC18LF458><18xxxx><2><1><7fff><10><ff><ff><0-5f><f60-fff><0><a>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack Full/Underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack Full/Underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not code protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not write protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-001FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from Table Reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from Table Reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks><40>
<PART_INFO_TYPE><a23d><PIC18LF4580><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><10><2>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) boot block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) boot block><10>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a23e><PIC18LF4585><18xxxx><6><1><bfff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) Boot Block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) Boot Block><10>
<SETTING_VALUE_TYPE><4096><4K words (8K bytes) Boot Block><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a451><PIC18LF45J10><18xxxx><6><1><7ff7><10><ff><0><0-7f><f80-fff><0><5>
<CONFIGREG_INFO_TYPE><7ff8><0><ff><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Reset on stack overflow/underflow disabled><0>
<SETTING_VALUE_TYPE><ON><Reset on stack overflow/underflow enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f7><1>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><ff><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><HS><HS oscillator><0>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled and under software control><1>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on OSC2><2>
<SETTING_VALUE_TYPE><ECPLL><EC oscillator, PLL enabled and under software control, CLKO function on OSC2><3>
<SWITCH_INFO_TYPE><FOSC2><Default/Reset System Clock Select bit><4><2>
<SETTING_VALUE_TYPE><OFF><INTRC enabled as system clock when OSCCON<1:0> = 00><0>
<SETTING_VALUE_TYPE><ON><Clock selected by FOSC as system clock is enabled when OSCCON<1:0> = 00><4>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Two-Speed Start-up (Internal/External Oscillator Switchover) Control bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffd><0><ff><1>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><ALTERNATE><CCP2 is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><DEFAULT><CCP2 is multiplexed with RC1><1>
<PART_INFO_TYPE><c511><PIC18LF45J11><18xxxx><6><1><7ff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><7ff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><7ff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><7ffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><7ffe><0><df><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><1f><20>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><7fff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><c551><PIC18LF45J50><18xxxx><6><1><7ff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><7ff8><0><ef><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><7ff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><7ffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><7ffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><7ffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><7ffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><7ffe><0><df><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><1f><20>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><7fff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><c522><PIC18LF45K22><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><25><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSHP><HS oscillator (high power > 16 MHz)><2>
<SETTING_VALUE_TYPE><HSMP><HS oscillator (medium power 4-16 MHz)><3>
<SETTING_VALUE_TYPE><ECHP><EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)><4>
<SETTING_VALUE_TYPE><ECHPIO6><EC oscillator (high power, >16 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECMP><EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)><a>
<SETTING_VALUE_TYPE><ECMPIO6><EC oscillator (medium power, 500 kHz-16 MHz)><b>
<SETTING_VALUE_TYPE><ECLP><EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)><c>
<SETTING_VALUE_TYPE><ECLPIO6><EC oscillator (low power, <500 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><4X PLL Enable><10><2>
<SETTING_VALUE_TYPE><OFF><Oscillator used directly><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PRICLKEN><Primary clock enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock can be disabled by software><0>
<SETTING_VALUE_TYPE><ON><Primary clock is always enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><285><VBOR set to 2.85 V nominal><0>
<SETTING_VALUE_TYPE><250><VBOR set to 2.50 V nominal><8>
<SETTING_VALUE_TYPE><220><VBOR set to 2.20 V nominal><10>
<SETTING_VALUE_TYPE><190><VBOR set to 1.90 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><Watch dog timer is always disabled. SWDTEN has no effect.><0>
<SETTING_VALUE_TYPE><NOSLP><WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect><1>
<SETTING_VALUE_TYPE><SWON><WDT is controlled by SWDTEN bit of the WDTCON register><2>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><bf><7>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><CCP3MX><P3A/CCP3 Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTE0><P3A/CCP3 input/output is mulitplexed with RE0><0>
<SETTING_VALUE_TYPE><PORTB5><P3A/CCP3 input/output is multiplexed with RB5><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><HFINTOSC output and ready status are delayed by the oscillator stable status><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC output and ready status are not delayed by the oscillator stable status><8>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock input mux bit><10><2>
<SETTING_VALUE_TYPE><PORTB5><T3CKI is on RB5><0>
<SETTING_VALUE_TYPE><PORTC0><T3CKI is on RC0><10>
<SWITCH_INFO_TYPE><P2BMX><ECCP2 B output mux bit><20><2>
<SETTING_VALUE_TYPE><PORTC0><P2B is on RC0><0>
<SETTING_VALUE_TYPE><PORTD2><P2B is on RD2><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><INTMCLR><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin enabled, RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><c454><PIC18LF45K40><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><a2c1><PIC18LF45K42><18XVxx><6><1><7fff><40><ff><ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><5>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><e552><PIC18LF45K50><18xxxx><6><1><7fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><4>
<SWITCH_INFO_TYPE><PLLSEL><PLL Selection><1><2>
<SETTING_VALUE_TYPE><PLL4X><4x clock multiplier><0>
<SETTING_VALUE_TYPE><PLL3X><3x clock multiplier><1>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration bit><2><2>
<SETTING_VALUE_TYPE><OFF><PLL Disabled (firmware controlled)><0>
<SETTING_VALUE_TYPE><ON><PLL Enabled><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><18><4>
<SETTING_VALUE_TYPE><NOCLKDIV><CPU uses system clock (no divide)><0>
<SETTING_VALUE_TYPE><CLKDIV2><CPU uses system clock divided by 2><8>
<SETTING_VALUE_TYPE><CLKDIV3><CPU uses system clock divided by 3><10>
<SETTING_VALUE_TYPE><CLKDIV6><CPU uses system clock divided by 6><18>
<SWITCH_INFO_TYPE><LS48MHZ><Low Speed USB mode with 48 MHz system clock><20><2>
<SETTING_VALUE_TYPE><SYS24X4><System clock at 24 MHz, USB clock divider is set to 4><0>
<SETTING_VALUE_TYPE><SYS48X8><System clock at 48 MHz, USB clock divider is set to 8><20>
<CONFIGREG_INFO_TYPE><300001><0><25><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSH><HS oscillator, high power 16MHz to 25MHz><2>
<SETTING_VALUE_TYPE><HSM><HS oscillator, medium power 4MHz to 16MHz><3>
<SETTING_VALUE_TYPE><ECHCLKO><EC oscillator, high power 16MHz to 48MHz, clock output on OSC2><4>
<SETTING_VALUE_TYPE><ECHIO><EC oscillator, high power 16MHz to 48MHz><5>
<SETTING_VALUE_TYPE><RCCLKO><External RC oscillator, clock output on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTOSCIO><Internal oscillator><8>
<SETTING_VALUE_TYPE><INTOSCCLKO><Internal oscillator, clock output on OSC2><9>
<SETTING_VALUE_TYPE><ECMCLKO><EC oscillator, medium power 4MHz to 16MHz, clock output on OSC2><a>
<SETTING_VALUE_TYPE><ECMIO><EC oscillator, medium power 4MHz to 16MHz><b>
<SETTING_VALUE_TYPE><ECLCLKO><EC oscillator, low power <4MHz, clock output on OSC2><c>
<SETTING_VALUE_TYPE><ECLIO><EC oscillator, low power <4MHz><d>
<SWITCH_INFO_TYPE><PCLKEN><Primary Oscillator Shutdown><20><2>
<SETTING_VALUE_TYPE><OFF><Primary oscillator shutdown firmware controlled><0>
<SETTING_VALUE_TYPE><ON><Primary oscillator enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><5f><4>
<SWITCH_INFO_TYPE><nPWRTEN><Power-up Timer Enable><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable><6><4>
<SETTING_VALUE_TYPE><OFF><BOR disabled in hardware (SBOREN is ignored)><0>
<SETTING_VALUE_TYPE><ON><BOR controlled by firmware (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><BOR enabled in hardware, disabled in Sleep mode (SBOREN is ignored)><4>
<SETTING_VALUE_TYPE><SBORDIS><BOR enabled in hardware (SBOREN is ignored)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage><18><4>
<SETTING_VALUE_TYPE><285><BOR set to 2.85V nominal><0>
<SETTING_VALUE_TYPE><250><BOR set to 2.5V nominal><8>
<SETTING_VALUE_TYPE><220><BOR set to 2.2V nominal><10>
<SETTING_VALUE_TYPE><190><BOR set to 1.9V nominal><18>
<SWITCH_INFO_TYPE><nLPBOR><Low-Power Brown-out Reset><40><2>
<SETTING_VALUE_TYPE><ON><Low-Power Brown-out Reset enabled><0>
<SETTING_VALUE_TYPE><OFF><Low-Power Brown-out Reset disabled><40>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware (SWDTEN ignored)><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled in hardware, disabled in Sleep mode (SWDTEN ignored)><1>
<SETTING_VALUE_TYPE><SWON><WDT controlled by firmware (SWDTEN enabled)><2>
<SETTING_VALUE_TYPE><ON><WDT enabled in hardware (SWDTEN ignored)><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><d3><5>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><RB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><RC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock Input MUX bit><10><2>
<SETTING_VALUE_TYPE><RB5><T3CKI function is on RB5><0>
<SETTING_VALUE_TYPE><RC0><T3CKI function is on RC0><10>
<SWITCH_INFO_TYPE><SDOMX><SDO Output MUX bit><40><2>
<SETTING_VALUE_TYPE><RC7><SDO function is on RC7><0>
<SETTING_VALUE_TYPE><RB3><SDO function is on RB3><40>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Reset Pin Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; external MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><ICPRT><Dedicated In-Circuit Debug/Programming Port Enable><20><2>
<SETTING_VALUE_TYPE><OFF><ICPORT disabled><0>
<SETTING_VALUE_TYPE><ON><ICPORT enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Block 0 Code Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Block 1 Code Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Block 2 Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 is not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Block 3 Code Protect><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 is not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block is not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Block 0 Write Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (0800-1FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (0800-1FFFh) is not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Block 1 Write Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (2000-3FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (2000-3FFFh) is not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Block 2 Write Protect><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (04000-5FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (04000-5FFFh) is not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Block 3 Write Protect><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (06000-7FFFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (06000-7FFFh) is not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Registers Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) are write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) are not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (0000-7FFh) is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (0000-7FFh) is not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM is write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM is not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Block 0 Table Read Protect><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 is not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Block 1 Table Read Protect><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 is not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Block 2 Table Read Protect><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 is not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Block 3 Table Read Protect><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 is not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protect><40><2>
<SETTING_VALUE_TYPE><ON><Boot block is protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block is not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><e580><PIC18LF45K80><18xxxx><6><1><7fff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Ultra low-power regulator is Enabled (Controlled by SRETEN bit)><0>
<SETTING_VALUE_TYPE><OFF><Ultra low-power regulator is Disabled (Controlled by REGSLP bit)><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300005><0><89><3>
<SWITCH_INFO_TYPE><CANMX><ECAN Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTC><ECAN TX and RX pins are located on RC6 and RC7, respectively><0>
<SETTING_VALUE_TYPE><PORTB><ECAN TX and RX pins are located on RB2 and RB3, respectively><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RE3 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RE3 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><a240><PIC18LF4610><18xxxx><6><1><ffff><10><ff><0><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><40><1>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><60><2>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a242><PIC18LF4620><18xxxx><6><1><ffff><10><ff><3ff><0-7f><f80-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKOUT function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a243><PIC18LF4680><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) Boot Block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) Boot Block><10>
<SETTING_VALUE_TYPE><4096><4K words (8K bytes) Boot Block><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a244><PIC18LF4682><18xxxx><6><1><13fff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) Boot Block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) Boot Block><10>
<SETTING_VALUE_TYPE><4096><4K words (8K bytes) Boot Block><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3f><5>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3f><5>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3f><5>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a245><PIC18LF4685><18xxxx><6><1><17fff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><IRCIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><IRCIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><SBORENCTRL><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><BOACTIVE><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><BOHW><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><82><3>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<4:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<4:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer 1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><1024><1K words (2K bytes) Boot Block><0>
<SETTING_VALUE_TYPE><2048><2K words (4K bytes) Boot Block><10>
<SETTING_VALUE_TYPE><4096><4K words (8K bytes) Boot Block><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3f><6>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3f><6>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3f><6>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><c612><PIC18LF46J11><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><fff8><0><e1><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><fffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffe><0><ff><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><3f><40>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><ffff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><c617><PIC18LF46J13><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><fff8><0><ff><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><96MHz PLL Prescaler Selection (PLLSEL=0)><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration Bit><10><2>
<SETTING_VALUE_TYPE><ON><PLL Enabled><0>
<SETTING_VALUE_TYPE><OFF><PLL Disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><ff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><18><4>
<SETTING_VALUE_TYPE><RESERVED><Reserved><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode selected><10>
<SETTING_VALUE_TYPE><HIGH><High Power T1OSC/SOSC circuit selected><18>
<SWITCH_INFO_TYPE><CLKOEC><EC Clock Out Enable Bit ><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><fffd><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><ADCSEL><ADC 10 or 12 Bit Select><2><2>
<SETTING_VALUE_TYPE><BIT12><12 - Bit ADC Enabled><0>
<SETTING_VALUE_TYPE><BIT10><10 - Bit ADC Enabled><2>
<SWITCH_INFO_TYPE><PLLSEL><PLL Selection Bit><4><2>
<SETTING_VALUE_TYPE><PLL96><Selects 96MHz PLL><0>
<SETTING_VALUE_TYPE><PLL4X><Selects 4x PLL><4>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffe><0><bf><2>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><3f><40>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region ><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><ffff><0><f3><2>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<6:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<6:0>/WPEND region ignored><1>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select bit (valid when WPDIS = 0)><2><2>
<SETTING_VALUE_TYPE><PAGE_0><Pages 0 through WPFP<6:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Pages WPFP<6:0> through Configuration Words erase/write protected><2>
<PART_INFO_TYPE><c651><PIC18LF46J50><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><fff8><0><ef><4>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection bits><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><fff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><df><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><T1DIG><T1OSCEN Enforcement><8><2>
<SETTING_VALUE_TYPE><OFF><Secondary Oscillator clock source may not be selected><0>
<SETTING_VALUE_TYPE><ON><Secondary Oscillator clock source may be selected><8>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator><10><2>
<SETTING_VALUE_TYPE><ON><Low-power operation><0>
<SETTING_VALUE_TYPE><OFF><High-power operation><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><fffd><0><f9><2>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffe><0><ff><3>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><3f><40>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select (valid when WPDIS = 0)><40><2>
<SETTING_VALUE_TYPE><PAGE_0><Page 0 through WPFP<5:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Page WPFP<5:0> through Configuration Words erase/write protected><40>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><ffff><0><f1><1>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<5:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<5:0>/WPEND region ignored><1>
<PART_INFO_TYPE><c656><PIC18LF46J53><18xxxx><6><1><fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><fff8><0><ff><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration Bit><10><2>
<SETTING_VALUE_TYPE><ON><PLL Enabled><0>
<SETTING_VALUE_TYPE><OFF><PLL Disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><fff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><fffa><0><ff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><18><4>
<SETTING_VALUE_TYPE><RESERVED><Reserved><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode selected><10>
<SETTING_VALUE_TYPE><HIGH><High Power T1OSC/SOSC circuit selected><18>
<SWITCH_INFO_TYPE><CLKOEC><EC Clock Out Enable Bit ><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><fffd><0><fb><3>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><ADCSEL><ADC 10 or 12 Bit Select><2><2>
<SETTING_VALUE_TYPE><BIT12><12 - Bit ADC Enabled><0>
<SETTING_VALUE_TYPE><BIT10><10 - Bit ADC Enabled><2>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><fffe><0><bf><2>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><3f><40>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region ><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><ffff><0><fb><3>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<6:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<6:0>/WPEND region ignored><1>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select bit (valid when WPDIS = 0)><2><2>
<SETTING_VALUE_TYPE><PAGE_0><Pages 0 through WPFP<6:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Pages WPFP<6:0> through Configuration Words erase/write protected><2>
<SWITCH_INFO_TYPE><LS48MHZ><Low Speed USB mode with 48 MHz system clock bit><8><2>
<SETTING_VALUE_TYPE><SYS24X4><System clock at 24 MHz USB CLKEN divide-by is set to 4><0>
<SETTING_VALUE_TYPE><SYS48X8><System clock at 48 MHz USB CLKEN divide-by is set to 8><8>
<PART_INFO_TYPE><c623><PIC18LF46K22><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><25><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HSHP><HS oscillator (high power > 16 MHz)><2>
<SETTING_VALUE_TYPE><HSMP><HS oscillator (medium power 4-16 MHz)><3>
<SETTING_VALUE_TYPE><ECHP><EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)><4>
<SETTING_VALUE_TYPE><ECHPIO6><EC oscillator (high power, >16 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECMP><EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)><a>
<SETTING_VALUE_TYPE><ECMPIO6><EC oscillator (medium power, 500 kHz-16 MHz)><b>
<SETTING_VALUE_TYPE><ECLP><EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)><c>
<SETTING_VALUE_TYPE><ECLPIO6><EC oscillator (low power, <500 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><4X PLL Enable><10><2>
<SETTING_VALUE_TYPE><OFF><Oscillator used directly><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PRICLKEN><Primary clock enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock can be disabled by software><0>
<SETTING_VALUE_TYPE><ON><Primary clock is always enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><285><VBOR set to 2.85 V nominal><0>
<SETTING_VALUE_TYPE><250><VBOR set to 2.50 V nominal><8>
<SETTING_VALUE_TYPE><220><VBOR set to 2.20 V nominal><10>
<SETTING_VALUE_TYPE><190><VBOR set to 1.90 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><3f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bits><3><4>
<SETTING_VALUE_TYPE><OFF><Watch dog timer is always disabled. SWDTEN has no effect.><0>
<SETTING_VALUE_TYPE><NOSLP><WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect><1>
<SETTING_VALUE_TYPE><SWON><WDT is controlled by SWDTEN bit of the WDTCON register><2>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><3c><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<CONFIGREG_INFO_TYPE><300005><0><bf><7>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTB3><CCP2 input/output is multiplexed with RB3><0>
<SETTING_VALUE_TYPE><PORTC1><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><PBADEN><PORTB A/D Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PORTB<5:0> pins are configured as digital I/O on Reset><0>
<SETTING_VALUE_TYPE><ON><PORTB<5:0> pins are configured as analog input channels on Reset><2>
<SWITCH_INFO_TYPE><CCP3MX><P3A/CCP3 Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTE0><P3A/CCP3 input/output is mulitplexed with RE0><0>
<SETTING_VALUE_TYPE><PORTB5><P3A/CCP3 input/output is multiplexed with RB5><4>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up><8><2>
<SETTING_VALUE_TYPE><OFF><HFINTOSC output and ready status are delayed by the oscillator stable status><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC output and ready status are not delayed by the oscillator stable status><8>
<SWITCH_INFO_TYPE><T3CMX><Timer3 Clock input mux bit><10><2>
<SETTING_VALUE_TYPE><PORTB5><T3CKI is on RB5><0>
<SETTING_VALUE_TYPE><PORTC0><T3CKI is on RC0><10>
<SWITCH_INFO_TYPE><P2BMX><ECCP2 B output mux bit><20><2>
<SETTING_VALUE_TYPE><PORTC0><P2B is on RC0><0>
<SETTING_VALUE_TYPE><PORTD2><P2B is on RD2><20>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><INTMCLR><RE3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><EXTMCLR><MCLR pin enabled, RE3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><4>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled if MCLRE is also 1><4>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debug><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a26e><PIC18LF46K40><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><a2c5><PIC18LF46K42><18XVxx><6><1><ffff><40><ff><3ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><6>
<SETTING_VALUE_TYPE><BBSIZE_16384><Boot Block size is 16384 words><2>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><e680><PIC18LF46K80><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Ultra low-power regulator is Enabled (Controlled by SRETEN bit)><0>
<SETTING_VALUE_TYPE><OFF><Ultra low-power regulator is Disabled (Controlled by REGSLP bit)><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300005><0><89><3>
<SWITCH_INFO_TYPE><CANMX><ECAN Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTC><ECAN TX and RX pins are located on RC6 and RC7, respectively><0>
<SETTING_VALUE_TYPE><PORTB><ECAN TX and RX pins are located on RB2 and RB3, respectively><1>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RE3 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RE3 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><c712><PIC18LF47J13><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><1fff8><0><ff><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><96MHz PLL Prescaler Selection (PLLSEL=0)><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration Bit><10><2>
<SETTING_VALUE_TYPE><ON><PLL Enabled><0>
<SETTING_VALUE_TYPE><OFF><PLL Disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><1fff9><0><f4><1>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fffa><0><ff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6)><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6)><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><18><4>
<SETTING_VALUE_TYPE><RESERVED><Reserved><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode selected><10>
<SETTING_VALUE_TYPE><HIGH><High Power T1OSC/SOSC circuit selected><18>
<SWITCH_INFO_TYPE><CLKOEC><EC Clock Out Enable Bit ><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><1fffd><0><ff><4>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><ADCSEL><ADC 10 or 12 Bit Select><2><2>
<SETTING_VALUE_TYPE><BIT12><12 - Bit ADC Enabled><0>
<SETTING_VALUE_TYPE><BIT10><10 - Bit ADC Enabled><2>
<SWITCH_INFO_TYPE><PLLSEL><PLL Selection Bit><4><2>
<SETTING_VALUE_TYPE><PLL96><Selects 96MHz PLL><0>
<SETTING_VALUE_TYPE><PLL4X><Selects 4x PLL><4>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><1fffe><0><ff><2>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><7f><80>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><PAGE_64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><PAGE_65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><PAGE_66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><PAGE_67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><PAGE_68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><PAGE_69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><PAGE_70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><PAGE_71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><PAGE_72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><PAGE_73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><PAGE_74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><PAGE_75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><PAGE_76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><PAGE_77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><PAGE_78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><PAGE_79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><PAGE_80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><PAGE_81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><PAGE_82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><PAGE_83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><PAGE_84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><PAGE_85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><PAGE_86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><PAGE_87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><PAGE_88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><PAGE_89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><PAGE_90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><PAGE_91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><PAGE_92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><PAGE_93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><PAGE_94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><PAGE_95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><PAGE_96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><PAGE_97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><PAGE_98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><PAGE_99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><PAGE_100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><PAGE_101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><PAGE_102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><PAGE_103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><PAGE_104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><PAGE_105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><PAGE_106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><PAGE_107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><PAGE_108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><PAGE_109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><PAGE_110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><PAGE_111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><PAGE_112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><PAGE_113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><PAGE_114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><PAGE_115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><PAGE_116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><PAGE_117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><PAGE_118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><PAGE_119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><PAGE_120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><PAGE_121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><PAGE_122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><PAGE_123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><PAGE_124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><PAGE_125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><PAGE_126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><PAGE_127><Write Protect Program Flash Page 127><7f>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region ><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><1ffff><0><f3><2>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<6:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<6:0>/WPEND region ignored><1>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select bit (valid when WPDIS = 0)><2><2>
<SETTING_VALUE_TYPE><PAGE_0><Pages 0 through WPFP<6:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Pages WPFP<6:0> through Configuration Words erase/write protected><2>
<PART_INFO_TYPE><c751><PIC18LF47J53><18xxxx><6><1><1fff7><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><1fff8><0><ff><5>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled - Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><PLLDIV><PLL Prescaler Selection><e><8>
<SETTING_VALUE_TYPE><12><Divide by 12 (48 MHz oscillator input)><0>
<SETTING_VALUE_TYPE><10><Divide by 10 (40 MHz oscillator input)><2>
<SETTING_VALUE_TYPE><6><Divide by 6 (24 MHz oscillator input)><4>
<SETTING_VALUE_TYPE><5><Divide by 5 (20 MHz oscillator input)><6>
<SETTING_VALUE_TYPE><4><Divide by 4 (16 MHz oscillator input)><8>
<SETTING_VALUE_TYPE><3><Divide by 3 (12 MHz oscillator input)><a>
<SETTING_VALUE_TYPE><2><Divide by 2 (8 MHz oscillator input)><c>
<SETTING_VALUE_TYPE><1><No prescale (4 MHz oscillator input drives PLL directly)><e>
<SWITCH_INFO_TYPE><CFGPLLEN><PLL Enable Configuration Bit><10><2>
<SETTING_VALUE_TYPE><ON><PLL Enabled><0>
<SETTING_VALUE_TYPE><OFF><PLL Disabled><10>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset><20><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><1fff9><0><f7><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Postscaler><3><4>
<SETTING_VALUE_TYPE><OSC4_PLL6><CPU system clock divide by 6><0>
<SETTING_VALUE_TYPE><OSC3_PLL3><CPU system clock divide by 3><1>
<SETTING_VALUE_TYPE><OSC2_PLL2><CPU system clock divide by 2><2>
<SETTING_VALUE_TYPE><OSC1><No CPU system clock divide><3>
<SWITCH_INFO_TYPE><CP0><Code Protect><4><2>
<SETTING_VALUE_TYPE><ON><Program memory is code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code-protected><4>
<CONFIGREG_INFO_TYPE><1fffa><0><ff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><INTOSC><INTOSC><0>
<SETTING_VALUE_TYPE><INTOSCO><INTOSCO (CLKO-RA6)><1>
<SETTING_VALUE_TYPE><INTOSCPLL><INTOSCPLL><2>
<SETTING_VALUE_TYPE><INTOSCPLLO><INTOSCPLLO (CLKO-RA6)><3>
<SETTING_VALUE_TYPE><HS><HS, USB-HS><4>
<SETTING_VALUE_TYPE><HSPLL><HS+PLL, USB-HS+PLL><5>
<SETTING_VALUE_TYPE><EC><EC (CLKO-RA6), USB-EC><6>
<SETTING_VALUE_TYPE><ECPLL><EC+PLL (CLKO-RA6), USB-EC+PLL><7>
<SWITCH_INFO_TYPE><SOSCSEL><T1OSC/SOSC Power Selection Bits><18><4>
<SETTING_VALUE_TYPE><RESERVED><Reserved><0>
<SETTING_VALUE_TYPE><LOW><Low Power T1OSC/SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode selected><10>
<SETTING_VALUE_TYPE><HIGH><High Power T1OSC/SOSC circuit selected><18>
<SWITCH_INFO_TYPE><CLKOEC><EC Clock Out Enable Bit ><20><2>
<SETTING_VALUE_TYPE><OFF><CLKO output disabled on the RA6 pin><0>
<SETTING_VALUE_TYPE><ON><CLKO output enabled on the RA6 pin><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><1fffb><0><ff><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><f><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><1>
<SETTING_VALUE_TYPE><4><1:4><2>
<SETTING_VALUE_TYPE><8><1:8><3>
<SETTING_VALUE_TYPE><16><1:16><4>
<SETTING_VALUE_TYPE><32><1:32><5>
<SETTING_VALUE_TYPE><64><1:64><6>
<SETTING_VALUE_TYPE><128><1:128><7>
<SETTING_VALUE_TYPE><256><1:256><8>
<SETTING_VALUE_TYPE><512><1:512><9>
<SETTING_VALUE_TYPE><1024><1:1024><a>
<SETTING_VALUE_TYPE><2048><1:2048><b>
<SETTING_VALUE_TYPE><4096><1:4096><c>
<SETTING_VALUE_TYPE><8192><1:8192><d>
<SETTING_VALUE_TYPE><16384><1:16384><e>
<SETTING_VALUE_TYPE><32768><1:32768><f>
<CONFIGREG_INFO_TYPE><1fffc><0><ff><5>
<SWITCH_INFO_TYPE><DSWDTOSC><DSWDT Clock Select><1><2>
<SETTING_VALUE_TYPE><T1OSCREF><DSWDT uses T1OSC/T1CKI><0>
<SETTING_VALUE_TYPE><INTOSCREF><DSWDT uses INTRC><1>
<SWITCH_INFO_TYPE><RTCOSC><RTCC Clock Select><2><2>
<SETTING_VALUE_TYPE><INTOSCREF><RTCC uses INTRC><0>
<SETTING_VALUE_TYPE><T1OSCREF><RTCC uses T1OSC/T1CKI><2>
<SWITCH_INFO_TYPE><DSBOREN><Deep Sleep BOR><4><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><4>
<SWITCH_INFO_TYPE><DSWDTEN><Deep Sleep Watchdog Timer><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><DSWDTPS><Deep Sleep Watchdog Postscaler><f0><10>
<SETTING_VALUE_TYPE><2><1:2 (2.1 ms)><0>
<SETTING_VALUE_TYPE><8><1:8 (8.3 ms)><10>
<SETTING_VALUE_TYPE><32><1:32 (33 ms)><20>
<SETTING_VALUE_TYPE><128><1:128 (132 ms)><30>
<SETTING_VALUE_TYPE><512><1:512 (528 ms)><40>
<SETTING_VALUE_TYPE><2048><1:2,048 (2.1 seconds)><50>
<SETTING_VALUE_TYPE><8192><1:8,192 (8.5 seconds)><60>
<SETTING_VALUE_TYPE><K32><1:32,768 (34 seconds)><70>
<SETTING_VALUE_TYPE><K131><1:131,072 (135 seconds)><80>
<SETTING_VALUE_TYPE><K524><1:524,288 (9 minutes)><90>
<SETTING_VALUE_TYPE><M2><1:2,097,152 (36 minutes)><a0>
<SETTING_VALUE_TYPE><M8><1:8,388,608 (2.4 hours)><b0>
<SETTING_VALUE_TYPE><M33><1:33,554,432 (9.6 hours)><c0>
<SETTING_VALUE_TYPE><M134><1:134,217,728 (38.5 hours)><d0>
<SETTING_VALUE_TYPE><M536><1:536,870,912 (6.4 days)><e0>
<SETTING_VALUE_TYPE><G2><1:2,147,483,648 (25.7 days)><f0>
<CONFIGREG_INFO_TYPE><1fffd><0><fb><3>
<SWITCH_INFO_TYPE><IOL1WAY><IOLOCK One-Way Set Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><The IOLOCK bit (PPSCON<0>) can be set and cleared as needed><0>
<SETTING_VALUE_TYPE><ON><The IOLOCK bit (PPSCON<0>) can be set once><1>
<SWITCH_INFO_TYPE><ADCSEL><ADC 10 or 12 Bit Select><2><2>
<SETTING_VALUE_TYPE><BIT12><12 - Bit ADC Enabled><0>
<SETTING_VALUE_TYPE><BIT10><10 - Bit ADC Enabled><2>
<SWITCH_INFO_TYPE><MSSP7B_EN><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 Bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<CONFIGREG_INFO_TYPE><1fffe><0><ff><2>
<SWITCH_INFO_TYPE><WPFP><Write/Erase Protect Page Start/End Location><7f><80>
<SETTING_VALUE_TYPE><PAGE_0><Write Protect Program Flash Page 0><0>
<SETTING_VALUE_TYPE><PAGE_1><Write Protect Program Flash Page 1><1>
<SETTING_VALUE_TYPE><PAGE_2><Write Protect Program Flash Page 2><2>
<SETTING_VALUE_TYPE><PAGE_3><Write Protect Program Flash Page 3><3>
<SETTING_VALUE_TYPE><PAGE_4><Write Protect Program Flash Page 4><4>
<SETTING_VALUE_TYPE><PAGE_5><Write Protect Program Flash Page 5><5>
<SETTING_VALUE_TYPE><PAGE_6><Write Protect Program Flash Page 6><6>
<SETTING_VALUE_TYPE><PAGE_7><Write Protect Program Flash Page 7><7>
<SETTING_VALUE_TYPE><PAGE_8><Write Protect Program Flash Page 8><8>
<SETTING_VALUE_TYPE><PAGE_9><Write Protect Program Flash Page 9><9>
<SETTING_VALUE_TYPE><PAGE_10><Write Protect Program Flash Page 10><a>
<SETTING_VALUE_TYPE><PAGE_11><Write Protect Program Flash Page 11><b>
<SETTING_VALUE_TYPE><PAGE_12><Write Protect Program Flash Page 12><c>
<SETTING_VALUE_TYPE><PAGE_13><Write Protect Program Flash Page 13><d>
<SETTING_VALUE_TYPE><PAGE_14><Write Protect Program Flash Page 14><e>
<SETTING_VALUE_TYPE><PAGE_15><Write Protect Program Flash Page 15><f>
<SETTING_VALUE_TYPE><PAGE_16><Write Protect Program Flash Page 16><10>
<SETTING_VALUE_TYPE><PAGE_17><Write Protect Program Flash Page 17><11>
<SETTING_VALUE_TYPE><PAGE_18><Write Protect Program Flash Page 18><12>
<SETTING_VALUE_TYPE><PAGE_19><Write Protect Program Flash Page 19><13>
<SETTING_VALUE_TYPE><PAGE_20><Write Protect Program Flash Page 20><14>
<SETTING_VALUE_TYPE><PAGE_21><Write Protect Program Flash Page 21><15>
<SETTING_VALUE_TYPE><PAGE_22><Write Protect Program Flash Page 22><16>
<SETTING_VALUE_TYPE><PAGE_23><Write Protect Program Flash Page 23><17>
<SETTING_VALUE_TYPE><PAGE_24><Write Protect Program Flash Page 24><18>
<SETTING_VALUE_TYPE><PAGE_25><Write Protect Program Flash Page 25><19>
<SETTING_VALUE_TYPE><PAGE_26><Write Protect Program Flash Page 26><1a>
<SETTING_VALUE_TYPE><PAGE_27><Write Protect Program Flash Page 27><1b>
<SETTING_VALUE_TYPE><PAGE_28><Write Protect Program Flash Page 28><1c>
<SETTING_VALUE_TYPE><PAGE_29><Write Protect Program Flash Page 29><1d>
<SETTING_VALUE_TYPE><PAGE_30><Write Protect Program Flash Page 30><1e>
<SETTING_VALUE_TYPE><PAGE_31><Write Protect Program Flash Page 31><1f>
<SETTING_VALUE_TYPE><PAGE_32><Write Protect Program Flash Page 32><20>
<SETTING_VALUE_TYPE><PAGE_33><Write Protect Program Flash Page 33><21>
<SETTING_VALUE_TYPE><PAGE_34><Write Protect Program Flash Page 34><22>
<SETTING_VALUE_TYPE><PAGE_35><Write Protect Program Flash Page 35><23>
<SETTING_VALUE_TYPE><PAGE_36><Write Protect Program Flash Page 36><24>
<SETTING_VALUE_TYPE><PAGE_37><Write Protect Program Flash Page 37><25>
<SETTING_VALUE_TYPE><PAGE_38><Write Protect Program Flash Page 38><26>
<SETTING_VALUE_TYPE><PAGE_39><Write Protect Program Flash Page 39><27>
<SETTING_VALUE_TYPE><PAGE_40><Write Protect Program Flash Page 40><28>
<SETTING_VALUE_TYPE><PAGE_41><Write Protect Program Flash Page 41><29>
<SETTING_VALUE_TYPE><PAGE_42><Write Protect Program Flash Page 42><2a>
<SETTING_VALUE_TYPE><PAGE_43><Write Protect Program Flash Page 43><2b>
<SETTING_VALUE_TYPE><PAGE_44><Write Protect Program Flash Page 44><2c>
<SETTING_VALUE_TYPE><PAGE_45><Write Protect Program Flash Page 45><2d>
<SETTING_VALUE_TYPE><PAGE_46><Write Protect Program Flash Page 46><2e>
<SETTING_VALUE_TYPE><PAGE_47><Write Protect Program Flash Page 47><2f>
<SETTING_VALUE_TYPE><PAGE_48><Write Protect Program Flash Page 48><30>
<SETTING_VALUE_TYPE><PAGE_49><Write Protect Program Flash Page 49><31>
<SETTING_VALUE_TYPE><PAGE_50><Write Protect Program Flash Page 50><32>
<SETTING_VALUE_TYPE><PAGE_51><Write Protect Program Flash Page 51><33>
<SETTING_VALUE_TYPE><PAGE_52><Write Protect Program Flash Page 52><34>
<SETTING_VALUE_TYPE><PAGE_53><Write Protect Program Flash Page 53><35>
<SETTING_VALUE_TYPE><PAGE_54><Write Protect Program Flash Page 54><36>
<SETTING_VALUE_TYPE><PAGE_55><Write Protect Program Flash Page 55><37>
<SETTING_VALUE_TYPE><PAGE_56><Write Protect Program Flash Page 56><38>
<SETTING_VALUE_TYPE><PAGE_57><Write Protect Program Flash Page 57><39>
<SETTING_VALUE_TYPE><PAGE_58><Write Protect Program Flash Page 58><3a>
<SETTING_VALUE_TYPE><PAGE_59><Write Protect Program Flash Page 59><3b>
<SETTING_VALUE_TYPE><PAGE_60><Write Protect Program Flash Page 60><3c>
<SETTING_VALUE_TYPE><PAGE_61><Write Protect Program Flash Page 61><3d>
<SETTING_VALUE_TYPE><PAGE_62><Write Protect Program Flash Page 62><3e>
<SETTING_VALUE_TYPE><PAGE_63><Write Protect Program Flash Page 63><3f>
<SETTING_VALUE_TYPE><PAGE_64><Write Protect Program Flash Page 64><40>
<SETTING_VALUE_TYPE><PAGE_65><Write Protect Program Flash Page 65><41>
<SETTING_VALUE_TYPE><PAGE_66><Write Protect Program Flash Page 66><42>
<SETTING_VALUE_TYPE><PAGE_67><Write Protect Program Flash Page 67><43>
<SETTING_VALUE_TYPE><PAGE_68><Write Protect Program Flash Page 68><44>
<SETTING_VALUE_TYPE><PAGE_69><Write Protect Program Flash Page 69><45>
<SETTING_VALUE_TYPE><PAGE_70><Write Protect Program Flash Page 70><46>
<SETTING_VALUE_TYPE><PAGE_71><Write Protect Program Flash Page 71><47>
<SETTING_VALUE_TYPE><PAGE_72><Write Protect Program Flash Page 72><48>
<SETTING_VALUE_TYPE><PAGE_73><Write Protect Program Flash Page 73><49>
<SETTING_VALUE_TYPE><PAGE_74><Write Protect Program Flash Page 74><4a>
<SETTING_VALUE_TYPE><PAGE_75><Write Protect Program Flash Page 75><4b>
<SETTING_VALUE_TYPE><PAGE_76><Write Protect Program Flash Page 76><4c>
<SETTING_VALUE_TYPE><PAGE_77><Write Protect Program Flash Page 77><4d>
<SETTING_VALUE_TYPE><PAGE_78><Write Protect Program Flash Page 78><4e>
<SETTING_VALUE_TYPE><PAGE_79><Write Protect Program Flash Page 79><4f>
<SETTING_VALUE_TYPE><PAGE_80><Write Protect Program Flash Page 80><50>
<SETTING_VALUE_TYPE><PAGE_81><Write Protect Program Flash Page 81><51>
<SETTING_VALUE_TYPE><PAGE_82><Write Protect Program Flash Page 82><52>
<SETTING_VALUE_TYPE><PAGE_83><Write Protect Program Flash Page 83><53>
<SETTING_VALUE_TYPE><PAGE_84><Write Protect Program Flash Page 84><54>
<SETTING_VALUE_TYPE><PAGE_85><Write Protect Program Flash Page 85><55>
<SETTING_VALUE_TYPE><PAGE_86><Write Protect Program Flash Page 86><56>
<SETTING_VALUE_TYPE><PAGE_87><Write Protect Program Flash Page 87><57>
<SETTING_VALUE_TYPE><PAGE_88><Write Protect Program Flash Page 88><58>
<SETTING_VALUE_TYPE><PAGE_89><Write Protect Program Flash Page 89><59>
<SETTING_VALUE_TYPE><PAGE_90><Write Protect Program Flash Page 90><5a>
<SETTING_VALUE_TYPE><PAGE_91><Write Protect Program Flash Page 91><5b>
<SETTING_VALUE_TYPE><PAGE_92><Write Protect Program Flash Page 92><5c>
<SETTING_VALUE_TYPE><PAGE_93><Write Protect Program Flash Page 93><5d>
<SETTING_VALUE_TYPE><PAGE_94><Write Protect Program Flash Page 94><5e>
<SETTING_VALUE_TYPE><PAGE_95><Write Protect Program Flash Page 95><5f>
<SETTING_VALUE_TYPE><PAGE_96><Write Protect Program Flash Page 96><60>
<SETTING_VALUE_TYPE><PAGE_97><Write Protect Program Flash Page 97><61>
<SETTING_VALUE_TYPE><PAGE_98><Write Protect Program Flash Page 98><62>
<SETTING_VALUE_TYPE><PAGE_99><Write Protect Program Flash Page 99><63>
<SETTING_VALUE_TYPE><PAGE_100><Write Protect Program Flash Page 100><64>
<SETTING_VALUE_TYPE><PAGE_101><Write Protect Program Flash Page 101><65>
<SETTING_VALUE_TYPE><PAGE_102><Write Protect Program Flash Page 102><66>
<SETTING_VALUE_TYPE><PAGE_103><Write Protect Program Flash Page 103><67>
<SETTING_VALUE_TYPE><PAGE_104><Write Protect Program Flash Page 104><68>
<SETTING_VALUE_TYPE><PAGE_105><Write Protect Program Flash Page 105><69>
<SETTING_VALUE_TYPE><PAGE_106><Write Protect Program Flash Page 106><6a>
<SETTING_VALUE_TYPE><PAGE_107><Write Protect Program Flash Page 107><6b>
<SETTING_VALUE_TYPE><PAGE_108><Write Protect Program Flash Page 108><6c>
<SETTING_VALUE_TYPE><PAGE_109><Write Protect Program Flash Page 109><6d>
<SETTING_VALUE_TYPE><PAGE_110><Write Protect Program Flash Page 110><6e>
<SETTING_VALUE_TYPE><PAGE_111><Write Protect Program Flash Page 111><6f>
<SETTING_VALUE_TYPE><PAGE_112><Write Protect Program Flash Page 112><70>
<SETTING_VALUE_TYPE><PAGE_113><Write Protect Program Flash Page 113><71>
<SETTING_VALUE_TYPE><PAGE_114><Write Protect Program Flash Page 114><72>
<SETTING_VALUE_TYPE><PAGE_115><Write Protect Program Flash Page 115><73>
<SETTING_VALUE_TYPE><PAGE_116><Write Protect Program Flash Page 116><74>
<SETTING_VALUE_TYPE><PAGE_117><Write Protect Program Flash Page 117><75>
<SETTING_VALUE_TYPE><PAGE_118><Write Protect Program Flash Page 118><76>
<SETTING_VALUE_TYPE><PAGE_119><Write Protect Program Flash Page 119><77>
<SETTING_VALUE_TYPE><PAGE_120><Write Protect Program Flash Page 120><78>
<SETTING_VALUE_TYPE><PAGE_121><Write Protect Program Flash Page 121><79>
<SETTING_VALUE_TYPE><PAGE_122><Write Protect Program Flash Page 122><7a>
<SETTING_VALUE_TYPE><PAGE_123><Write Protect Program Flash Page 123><7b>
<SETTING_VALUE_TYPE><PAGE_124><Write Protect Program Flash Page 124><7c>
<SETTING_VALUE_TYPE><PAGE_125><Write Protect Program Flash Page 125><7d>
<SETTING_VALUE_TYPE><PAGE_126><Write Protect Program Flash Page 126><7e>
<SETTING_VALUE_TYPE><PAGE_127><Write Protect Program Flash Page 127><7f>
<SWITCH_INFO_TYPE><WPCFG><Write/Erase Protect Configuration Region ><80><2>
<SETTING_VALUE_TYPE><ON><Configuration Words page erase/write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words page not erase/write-protected><80>
<CONFIGREG_INFO_TYPE><1ffff><0><fb><3>
<SWITCH_INFO_TYPE><WPDIS><Write Protect Disable bit><1><2>
<SETTING_VALUE_TYPE><ON><WPFP<6:0>/WPEND region erase/write protected><0>
<SETTING_VALUE_TYPE><OFF><WPFP<6:0>/WPEND region ignored><1>
<SWITCH_INFO_TYPE><WPEND><Write/Erase Protect Region Select bit (valid when WPDIS = 0)><2><2>
<SETTING_VALUE_TYPE><PAGE_0><Pages 0 through WPFP<6:0> erase/write protected><0>
<SETTING_VALUE_TYPE><PAGE_WPFP><Pages WPFP<6:0> through Configuration Words erase/write protected><2>
<SWITCH_INFO_TYPE><LS48MHZ><Low Speed USB mode with 48 MHz system clock bit><8><2>
<SETTING_VALUE_TYPE><SYS24X4><System clock at 24 MHz USB CLKEN divide-by is set to 4><0>
<SETTING_VALUE_TYPE><SYS48X8><System clock at 48 MHz USB CLKEN divide-by is set to 8><8>
<PART_INFO_TYPE><a276><PIC18LF47K40><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection Block 3><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection Block 3><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection Block 3><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection Block 3><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><a2ce><PIC18LF47K42><18XVxx><6><1><1ffff><40><ff><3ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><7>
<SETTING_VALUE_TYPE><BBSIZE_32768><Boot Block size is 32768 words><1>
<SETTING_VALUE_TYPE><BBSIZE_16384><Boot Block size is 16384 words><2>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><a2c3><PIC18LF55K42><18XVxx><6><1><7fff><40><ff><ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><5>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><a2c7><PIC18LF56K42><18XVxx><6><1><ffff><40><ff><3ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><6>
<SETTING_VALUE_TYPE><BBSIZE_16384><Boot Block size is 16384 words><2>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><a2d0><PIC18LF57K42><18XVxx><6><1><1ffff><40><ff><3ff><0-5f><3f60-3fff><0><a>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator Selection><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Reset Oscillator Selection><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED_2><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><4>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><PR1WAY><PRLOCKED One-Way Set Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><PRLOCK bit can be set and cleared repeatedly><0>
<SETTING_VALUE_TYPE><ON><PRLOCK bit can be cleared and set only once><2>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><6>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTS><Power-up timer selection bits><6><4>
<SETTING_VALUE_TYPE><PWRT_1><PWRT set at 1ms><0>
<SETTING_VALUE_TYPE><PWRT_16><PWRT set at 16ms><2>
<SETTING_VALUE_TYPE><PWRT_64><PWRT set at 64ms><4>
<SETTING_VALUE_TYPE><PWRT_OFF><PWRT is disabled><6>
<SWITCH_INFO_TYPE><MVECEN><Multi-vector enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Interrupt contoller does not use vector table to prioritze interrupts><0>
<SETTING_VALUE_TYPE><ON><Multi-vector enabled, Vector table used for interrupts><8>
<SWITCH_INFO_TYPE><IVT1WAY><IVTLOCK bit One-way set enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><IVTLOCK bit can be cleared and set repeatedly><0>
<SETTING_VALUE_TYPE><ON><IVTLOCK bit can be cleared and set only once><10>
<SWITCH_INFO_TYPE><LPBOREN><Low Power BOR Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage Selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_2P85><Brown-out Reset Voltage (VBOR) set to 2.8V><0>
<SETTING_VALUE_TYPE><VBOR_2P7><Brown-out Reset Voltage (VBOR) set to 2.7V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period selection bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled; SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><4>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><MFINTOSC><WDT reference clock is the 32kHz MFINTOSC output><8>
<SETTING_VALUE_TYPE><SOSC><WDT reference clock is SOSC><10>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><4>
<SWITCH_INFO_TYPE><BBSIZE><Boot Block Size selection bits><7><7>
<SETTING_VALUE_TYPE><BBSIZE_32768><Boot Block size is 32768 words><1>
<SETTING_VALUE_TYPE><BBSIZE_16384><Boot Block size is 16384 words><2>
<SETTING_VALUE_TYPE><BBSIZE_8192><Boot Block size is 8192 words><3>
<SETTING_VALUE_TYPE><BBSIZE_4096><Boot Block size is 4096 words><4>
<SETTING_VALUE_TYPE><BBSIZE_2048><Boot Block size is 2048 words><5>
<SETTING_VALUE_TYPE><BBSIZE_1024><Boot Block size is 1024 words><6>
<SETTING_VALUE_TYPE><BBSIZE_512><Boot Block size is 512 words><7>
<SWITCH_INFO_TYPE><BBEN><Boot Block enable bit><8><2>
<SETTING_VALUE_TYPE><ON><Boot block enabled><0>
<SETTING_VALUE_TYPE><OFF><Boot block disabled><8>
<SWITCH_INFO_TYPE><SAFEN><Storage Area Flash enable bit><10><2>
<SETTING_VALUE_TYPE><ON><SAF enabled><0>
<SETTING_VALUE_TYPE><OFF><SAF disabled><10>
<SWITCH_INFO_TYPE><WRTAPP><Application Block write protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Application Block write protected><0>
<SETTING_VALUE_TYPE><OFF><Application Block not write protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTB><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTC><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><WRTSAF><SAF Write protection bit><8><2>
<SETTING_VALUE_TYPE><ON><SAF Write Protected><0>
<SETTING_VALUE_TYPE><OFF><SAF not Write Protected><8>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP><PFM and Data EEPROM Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><PFM and Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><PFM and Data EEPROM code protection disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<PART_INFO_TYPE><a246><PIC18LF6310><18xxxx><6><1><1fff><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><c3><0>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block not code-protected><1>
<CONFIGREG_INFO_TYPE><30000c><0><1><0>
<PART_INFO_TYPE><a247><PIC18LF6390><18xxxx><6><1><1fff><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block (000000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block (000000-003FFFh) not code-protected><1>
<PART_INFO_TYPE><a248><PIC18LF6393><18xxxx><6><1><1fff><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block (000000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block (000000-003FFFh) not code-protected><1>
<PART_INFO_TYPE><a249><PIC18LF6410><18xxxx><6><1><3fff><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><c3><0>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block not code-protected><1>
<CONFIGREG_INFO_TYPE><30000c><0><1><0>
<PART_INFO_TYPE><a24a><PIC18LF6490><18xxxx><6><1><3fff><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block (000000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block (000000-003FFFh) not code-protected><1>
<PART_INFO_TYPE><a24b><PIC18LF6493><18xxxx><6><1><3fff><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block (000000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block (000000-003FFFh) not code-protected><1>
<PART_INFO_TYPE><a24c><PIC18LF6520><18xxxx><2><1><7fff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator w/ OSC2 configured as divide-by-4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300004><0><83><0>
<CONFIGREG_INFO_TYPE><300005><0><3><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a24d><PIC18LF6525><18xxxx><2><1><bfff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><2f><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><b>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator with OSC2 configured as divide by 4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator with OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator with OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with HW enabled 4x PLL><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator with OSC2 configured as RA6><7>
<SETTING_VALUE_TYPE><ECIOPLL><EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL><c>
<SETTING_VALUE_TYPE><ECIOSWPLL><EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL><d>
<SETTING_VALUE_TYPE><HSSWPLL><HS oscillator with SW enabled 4x PLL><e>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><83><0>
<CONFIGREG_INFO_TYPE><300005><0><83><2>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><Multiplexed with RB3 or RE7><0>
<SETTING_VALUE_TYPE><PORTC><Multiplexed with RC1><1>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a24e><PIC18LF6527><18xxxx><6><1><bfff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTE><ECCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a24f><PIC18LF6585><18xxxx><2><1><bfff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><2f><2>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><b>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator with OSC2 configured as divide by 4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator with OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator with OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with HW enabled 4x PLL><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator with OSC2 configured as RA6><7>
<SETTING_VALUE_TYPE><ECIOPLL><EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL><c>
<SETTING_VALUE_TYPE><ECIOSWPLL><EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL><d>
<SETTING_VALUE_TYPE><HSSWPLL><HS oscillator with SW enabled 4x PLL><e>
<SWITCH_INFO_TYPE><OSCS><Osc. Switch Enable><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown Out Detect><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><83><0>
<CONFIGREG_INFO_TYPE><300005><0><83><2>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><MCLRE><MCLR enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage Program><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protect 000800-0003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 0004000-007FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 008000-00BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 004000-007FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 004000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a270><PIC18LF65K40><18xxxx><6><1><7fff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RG5 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RG5 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><f580><PIC18LF65K80><18xxxx><6><1><7fff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Ultra low-power regulator is Enabled (Controlled by SRETEN bit)><0>
<SETTING_VALUE_TYPE><OFF><Ultra low-power regulator is Disabled (Controlled by REGSLP bit)><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300005><0><8f><5>
<SWITCH_INFO_TYPE><CANMX><ECAN Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTE><ECAN TX and RX pins are located on RE5 and RE4, respectively><0>
<SETTING_VALUE_TYPE><PORTB><ECAN TX and RX pins are located on RB2 and RB3, respectively><1>
<SWITCH_INFO_TYPE><T0CKMX><Timer0 Clock Input Mux bit><2><2>
<SETTING_VALUE_TYPE><PORTG><Timer0 gets its clock input from the RG4/T0CKI pin on 64-pin packages><0>
<SETTING_VALUE_TYPE><PORTB><Timer0 gets its clock input from the RB5/T0CKI pin on 64-pin packages><2>
<SWITCH_INFO_TYPE><T3CKMX><Timer3 Clock Input Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTB><Timer3 gets its clock input from the RB5/T3CKI pin on 64-pin packages><0>
<SETTING_VALUE_TYPE><PORTG><Timer3 gets its clock input from the RG2/T3CKI pin on 64-pin packages><4>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RG5 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RE3 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 04000-05FFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protect 06000-07FFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><a250><PIC18LF6620><18xxxx><2><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator w/ OSC2 configured as divide-by-4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300004><0><83><0>
<CONFIGREG_INFO_TYPE><300005><0><3><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a252><PIC18LF6621><18xxxx><2><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><2f><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><b>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator with OSC2 configured as divide by 4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator with OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator with OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with HW enabled 4x PLL><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator with OSC2 configured as RA6><7>
<SETTING_VALUE_TYPE><ECIOPLL><EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL><c>
<SETTING_VALUE_TYPE><ECIOSWPLL><EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL><d>
<SETTING_VALUE_TYPE><HSSWPLL><HS oscillator with SW enabled 4x PLL><e>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><83><0>
<CONFIGREG_INFO_TYPE><300005><0><83><2>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><Multiplexed with RB3 or RE7><0>
<SETTING_VALUE_TYPE><PORTC><Multiplexed with RC1><1>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh)  code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a253><PIC18LF6622><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTE><ECCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a254><PIC18LF6627><18xxxx><6><1><17fff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTE><ECCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><6>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><6>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><6>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a255><PIC18LF6628><18xxxx><6><1><17fff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTE><ECCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><6>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><6>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><6>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a256><PIC18LF6680><18xxxx><2><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><2f><2>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><b>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator with OSC2 configured as divide by 4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator with OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator with OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with HW enabled 4x PLL><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator with OSC2 configured as RA6><7>
<SETTING_VALUE_TYPE><ECIOPLL><EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL><c>
<SETTING_VALUE_TYPE><ECIOSWPLL><EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL><d>
<SETTING_VALUE_TYPE><HSSWPLL><HS oscillator with SW enabled 4x PLL><e>
<SWITCH_INFO_TYPE><OSCS><Osc. Switch Enable><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown Out Detect><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><83><0>
<CONFIGREG_INFO_TYPE><300005><0><83><2>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><MCLRE><MCLR enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage Program><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 000800-0003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 0004000-007FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 008000-00BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 00C000-00FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 004000-007FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 004000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a271><PIC18LF66K40><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RG5 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RG5 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><f680><PIC18LF66K80><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><5d><4>
<SWITCH_INFO_TYPE><RETEN><VREG Sleep Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><Ultra low-power regulator is Enabled (Controlled by SRETEN bit)><0>
<SETTING_VALUE_TYPE><OFF><Ultra low-power regulator is Disabled (Controlled by REGSLP bit)><1>
<SWITCH_INFO_TYPE><INTOSCSEL><LF-INTOSC Low-power Enable bit><4><2>
<SETTING_VALUE_TYPE><LOW><LF-INTOSC in Low-power mode during Sleep><0>
<SETTING_VALUE_TYPE><HIGH><LF-INTOSC in High-power mode during Sleep><4>
<SWITCH_INFO_TYPE><SOSCSEL><SOSC Power Selection and mode Configuration bits><18><3>
<SETTING_VALUE_TYPE><LOW><Low Power SOSC circuit selected><8>
<SETTING_VALUE_TYPE><DIG><Digital (SCLKI) mode><10>
<SETTING_VALUE_TYPE><HIGH><High Power SOSC circuit selected><18>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<CONFIGREG_INFO_TYPE><300001><0><8><4>
<SWITCH_INFO_TYPE><FOSC><Oscillator><f><e>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS2><HS oscillator (High power, 16 MHz - 25 MHz)><2>
<SETTING_VALUE_TYPE><HS1><HS oscillator (Medium power, 4 MHz - 16 MHz)><3>
<SETTING_VALUE_TYPE><EC3IO><EC oscillator, CLKOUT function on OSC2 (High power, 16 MHz - 64 MHz)><4>
<SETTING_VALUE_TYPE><EC3><EC oscillator (High power, 16 MHz - 64 MHz)><5>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKOUT function on OSC2><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator><7>
<SETTING_VALUE_TYPE><INTIO2><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><INTIO1><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><EC2IO><EC oscillator, CLKOUT function on OSC2 (Medium power, 160 kHz - 16 MHz)><a>
<SETTING_VALUE_TYPE><EC2><EC oscillator (Medium power, 160 kHz - 16 MHz)><b>
<SETTING_VALUE_TYPE><EC1IO><EC oscillator, CLKOUT function on OSC2 (Low power, DC - 160 kHz)><c>
<SETTING_VALUE_TYPE><EC1><EC oscillator (Low power, DC - 160 kHz)><d>
<SWITCH_INFO_TYPE><PLLCFG><PLL x4 Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><10>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor><40><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Oscillator Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><7f><4>
<SWITCH_INFO_TYPE><PWRTEN><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Disabled in hardware, SBOREN disabled><0>
<SETTING_VALUE_TYPE><ON><Controlled with SBOREN bit><2>
<SETTING_VALUE_TYPE><NOSLP><Enabled while active, disabled in SLEEP, SBOREN disabled><4>
<SETTING_VALUE_TYPE><SBORDIS><Enabled in hardware, SBOREN disabled><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><3.0V><0>
<SETTING_VALUE_TYPE><1><2.7V><8>
<SETTING_VALUE_TYPE><2><2.0V><10>
<SETTING_VALUE_TYPE><3><1.8V><18>
<SWITCH_INFO_TYPE><BORPWR><BORMV Power level><60><4>
<SETTING_VALUE_TYPE><LOW><BORMV set to low power level><0>
<SETTING_VALUE_TYPE><MEDIUM><BORMV set to medium power level><20>
<SETTING_VALUE_TYPE><HIGH><BORMV set to high power level><40>
<SETTING_VALUE_TYPE><ZPBORMV><ZPBORMV instead of BORMV is selected><60>
<CONFIGREG_INFO_TYPE><300003><0><7f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer><3><4>
<SETTING_VALUE_TYPE><OFF><WDT disabled in hardware; SWDTEN bit disabled><0>
<SETTING_VALUE_TYPE><NOSLP><WDT enabled only while device is active and disabled in Sleep mode; SWDTEN bit disabled><1>
<SETTING_VALUE_TYPE><ON><WDT controlled by SWDTEN bit setting><2>
<SETTING_VALUE_TYPE><SWDTDIS><WDT enabled in hardware; SWDTEN bit disabled><3>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><7c><15>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><4>
<SETTING_VALUE_TYPE><4><1:4><8>
<SETTING_VALUE_TYPE><8><1:8><c>
<SETTING_VALUE_TYPE><16><1:16><10>
<SETTING_VALUE_TYPE><32><1:32><14>
<SETTING_VALUE_TYPE><64><1:64><18>
<SETTING_VALUE_TYPE><128><1:128><1c>
<SETTING_VALUE_TYPE><256><1:256><20>
<SETTING_VALUE_TYPE><512><1:512><24>
<SETTING_VALUE_TYPE><1024><1:1024><28>
<SETTING_VALUE_TYPE><2048><1:2048><2c>
<SETTING_VALUE_TYPE><4096><1:4096><30>
<SETTING_VALUE_TYPE><8192><1:8192><34>
<SETTING_VALUE_TYPE><16384><1:16384><38>
<SETTING_VALUE_TYPE><32768><1:32768><3c>
<SETTING_VALUE_TYPE><65536><1:65536><40>
<SETTING_VALUE_TYPE><131072><1:131072><44>
<SETTING_VALUE_TYPE><262144><1:262144><48>
<SETTING_VALUE_TYPE><524288><1:524288><4c>
<SETTING_VALUE_TYPE><1048576><1:1048576><7c>
<CONFIGREG_INFO_TYPE><300005><0><8f><5>
<SWITCH_INFO_TYPE><CANMX><ECAN Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTE><ECAN TX and RX pins are located on RE5 and RE4, respectively><0>
<SETTING_VALUE_TYPE><PORTB><ECAN TX and RX pins are located on RB2 and RB3, respectively><1>
<SWITCH_INFO_TYPE><T0CKMX><Timer0 Clock Input Mux bit><2><2>
<SETTING_VALUE_TYPE><PORTG><Timer0 gets its clock input from the RG4/T0CKI pin on 64-pin packages><0>
<SETTING_VALUE_TYPE><PORTB><Timer0 gets its clock input from the RB5/T0CKI pin on 64-pin packages><2>
<SWITCH_INFO_TYPE><T3CKMX><Timer3 Clock Input Mux bit><4><2>
<SETTING_VALUE_TYPE><PORTB><Timer3 gets its clock input from the RB5/T3CKI pin on 64-pin packages><0>
<SETTING_VALUE_TYPE><PORTG><Timer3 gets its clock input from the RG2/T3CKI pin on 64-pin packages><4>
<SWITCH_INFO_TYPE><MSSPMSK><MSSP address masking><8><2>
<SETTING_VALUE_TYPE><MSK5><5 bit address masking mode><0>
<SETTING_VALUE_TYPE><MSK7><7 Bit address masking mode><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR Disabled, RG5 Enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR Enabled, RE3 Disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><91><2>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size><10><2>
<SETTING_VALUE_TYPE><BB1K><1K word Boot Block size><0>
<SETTING_VALUE_TYPE><BB2K><2K word Boot Block size><10>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 04000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><a257><PIC18LF6720><18xxxx><2><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator w/ OSC2 configured as divide-by-4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300004><0><83><0>
<CONFIGREG_INFO_TYPE><300005><0><3><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><8>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<SWITCH_INFO_TYPE><CP6><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not code-protected><40>
<SWITCH_INFO_TYPE><CP7><Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not code-protected><80>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a258><PIC18LF6722><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTE><ECCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><8>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<SWITCH_INFO_TYPE><CP6><Code Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (01BFFF-018000h) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (01BFFF-018000h) not code-protected><40>
<SWITCH_INFO_TYPE><CP7><Code Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not code-protected><80>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (01BFFF-018000h) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (01BFFF-018000h) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a259><PIC18LF6723><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><b>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTE><ECCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><8>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<SWITCH_INFO_TYPE><CP6><Code Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (01BFFF-018000h) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (01BFFF-018000h) not code-protected><40>
<SWITCH_INFO_TYPE><CP7><Code Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not code-protected><80>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (01BFFF-018000h) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (01BFFF-018000h) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a278><PIC18LF67K40><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><ff><2>
<SWITCH_INFO_TYPE><FEXTOSC><External Oscillator mode Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP (crystal oscillator) optimized for 32.768 kHz; PFM set to low power><0>
<SETTING_VALUE_TYPE><XT><XT (crystal oscillator) above 100 kHz, below 8 MHz; PFM set to medium power><1>
<SETTING_VALUE_TYPE><HS><HS (crystal oscillator) above 8 MHz; PFM set to high power><2>
<SETTING_VALUE_TYPE><RESERVED><Reserved (DO NOT USE)><3>
<SETTING_VALUE_TYPE><OFF><Oscillator not enabled><4>
<SETTING_VALUE_TYPE><ECL><EC (external clock) below 100 kHz; PFM set to low power><5>
<SETTING_VALUE_TYPE><ECM><EC (external clock) for 500 kHz to 8 MHz; PFM set to medium power><6>
<SETTING_VALUE_TYPE><ECH><EC (external clock) above 8 MHz; PFM set to high power><7>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><70><8>
<SETTING_VALUE_TYPE><HFINTOSC_64MHZ><HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1><0>
<SETTING_VALUE_TYPE><RESERVED_1><Reserved><10>
<SETTING_VALUE_TYPE><EXTOSC_4PLL><EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits><20>
<SETTING_VALUE_TYPE><RESERVED><Reserved><30>
<SETTING_VALUE_TYPE><SOSC><Secondary Oscillator><40>
<SETTING_VALUE_TYPE><LFINTOSC><Low-Frequency Oscillator><50>
<SETTING_VALUE_TYPE><HFINTOSC_1MHZ><HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1><60>
<SETTING_VALUE_TYPE><EXTOSC><EXTOSC operating per FEXTOSC bits (device manufacturing default)><70>
<CONFIGREG_INFO_TYPE><300001><0><ff><3>
<SWITCH_INFO_TYPE><CLKOUTEN><Clock Out Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><CLKOUT function is enabled><0>
<SETTING_VALUE_TYPE><OFF><CLKOUT function is disabled><1>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><8>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><20>
<CONFIGREG_INFO_TYPE><300002><0><ff><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><INTMCLR><If LVP = 0, MCLR pin function is port defined function; If LVP =1, RG5 pin fuction is MCLR><0>
<SETTING_VALUE_TYPE><EXTMCLR><If LVP = 0, MCLR pin is MCLR; If LVP = 1, RG5 pin function is MCLR ><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><Power up timer enabled><0>
<SETTING_VALUE_TYPE><OFF><Power up timer disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled according to SBOREN><40>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled , SBOREN bit is ignored><c0>
<CONFIGREG_INFO_TYPE><300003><0><ff><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Reset Voltage selection bits><3><4>
<SETTING_VALUE_TYPE><VBOR_285><Brown-out Reset Voltage (VBOR) set to 2.85V><0>
<SETTING_VALUE_TYPE><VBOR_270><Brown-out Reset Voltage (VBOR) set to 2.70V><1>
<SETTING_VALUE_TYPE><VBOR_245><Brown-out Reset Voltage (VBOR) set to 2.45V><2>
<SETTING_VALUE_TYPE><VBOR_190><Brown-out Reset Voltage (VBOR) set to 1.90V><3>
<SWITCH_INFO_TYPE><ZCD><ZCD Disable bit><4><2>
<SETTING_VALUE_TYPE><ON><ZCD always enabled><0>
<SETTING_VALUE_TYPE><OFF><ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON><4>
<SWITCH_INFO_TYPE><PPS1WAY><PPSLOCK bit One-Way Set Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><PPSLOCK bit can be set and cleared repeatedly (subject to the unlock sequence)><0>
<SETTING_VALUE_TYPE><ON><PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle><8>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><10>
<SWITCH_INFO_TYPE><DEBUG><Debugger Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Extended Instruction Set and Indexed Addressing Mode enabled><0>
<SETTING_VALUE_TYPE><OFF><Extended Instruction Set and Indexed Addressing Mode disabled><80>
<CONFIGREG_INFO_TYPE><300004><0><ff><2>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep><60>
<CONFIGREG_INFO_TYPE><300005><0><ff><2>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><7><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><1>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><2>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><3>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><4>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><5>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><6>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><7>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><38><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0 kHz LFINTOSC><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.2kHz HFINTOSC output><8>
<SETTING_VALUE_TYPE><SC><Software Control><38>
<CONFIGREG_INFO_TYPE><300006><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection Block 3><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection Block 3><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection Block 3><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection Block 3><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><300007><0><ff><5>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-30000Bh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-30000Bh) not write-protected><1>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><4>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><Scanner module is NOT available for use, SCANMD bit is ignored><0>
<SETTING_VALUE_TYPE><ON><Scanner module is available for use, SCANMD bit can control the module><10>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><HV on MCLR/VPP must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored><20>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program Memory Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><UserNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><UserNVM code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM Memory Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><DataNVM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><DataNVM code protection disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><0>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000b><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><2>
<PART_INFO_TYPE><a25a><PIC18LF8310><18xxxx><6><1><1fff><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><c3><3>
<SWITCH_INFO_TYPE><PM><Processor Mode><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><BW><Bus Width><40><2>
<SETTING_VALUE_TYPE><8><8-bit External Bus Data Width><0>
<SETTING_VALUE_TYPE><16><16-bit External Bus Data Width><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Wait programmed by WAIT1 and WAIT0 bits of MEMCOM register (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable, device will not wait><80>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block not code-protected><1>
<CONFIGREG_INFO_TYPE><30000c><0><1><1>
<SWITCH_INFO_TYPE><EBTR><Table Read Protect 00000-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Internal program memory block protected from table reads executed from external memory block><0>
<SETTING_VALUE_TYPE><OFF><Internal program memory block not protected from table reads executed from external memory block><1>
<PART_INFO_TYPE><a25b><PIC18LF8390><18xxxx><6><1><1fff><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block (000000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block (000000-003FFFh) not code-protected><1>
<PART_INFO_TYPE><a25c><PIC18LF8393><18xxxx><6><1><1fff><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block (000000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block (000000-003FFFh) not code-protected><1>
<PART_INFO_TYPE><a25d><PIC18LF8410><18xxxx><6><1><3fff><10><ff><0><0-5f><f60-fff><0><8>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><c3><3>
<SWITCH_INFO_TYPE><PM><Processor Mode><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><BW><Bus Width><40><2>
<SETTING_VALUE_TYPE><8><8-bit External Bus Data Width><0>
<SETTING_VALUE_TYPE><16><16-bit External Bus Data Width><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Wait programmed by WAIT1 and WAIT0 bits of MEMCOM register (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable, device will not wait><80>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block not code-protected><1>
<CONFIGREG_INFO_TYPE><30000c><0><1><1>
<SWITCH_INFO_TYPE><EBTR><Table Read Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Internal program memory block protected from table reads executed from external memory block><0>
<SETTING_VALUE_TYPE><OFF><Internal program memory block not protected from table reads executed from external memory block><1>
<PART_INFO_TYPE><a25e><PIC18LF8490><18xxxx><6><1><3fff><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block (000000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block (000000-003FFFh) not code-protected><1>
<PART_INFO_TYPE><a25f><PIC18LF8493><18xxxx><6><1><3fff><10><ff><0><0-5f><f60-fff><0><6>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (clock frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal External Switch Over Mode><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown Out Detect><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><18><4>
<SETTING_VALUE_TYPE><0><VBOR set to 4.6V><0>
<SETTING_VALUE_TYPE><1><VBOR set to 4.3V><8>
<SETTING_VALUE_TYPE><2><VBOR set to 2.8V><10>
<SETTING_VALUE_TYPE><3><VBOR set to 2.1V><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><81><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><PORTBE><CCP2 input/output is multiplexed with RE7><0>
<SETTING_VALUE_TYPE><PORTC><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><LPT1OSC><Low Power Timer1 Osc enable><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><81><3>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><1><1>
<SWITCH_INFO_TYPE><CP><Code Protect 00000-03FFF><1><2>
<SETTING_VALUE_TYPE><ON><Program memory block (000000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory block (000000-003FFFh) not code-protected><1>
<PART_INFO_TYPE><a260><PIC18LF8520><18xxxx><2><1><7fff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator w/ OSC2 configured as divide-by-4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300004><0><83><2>
<SWITCH_INFO_TYPE><MODE><Processor Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><3><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-001FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (002000-003FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (004000-005FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (004000-005FFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (006000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (006000-007FFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a261><PIC18LF8525><18xxxx><2><1><bfff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><2f><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><b>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator with OSC2 configured as divide by 4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator with OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator with OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with HW enabled 4x PLL><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator with OSC2 configured as RA6><7>
<SETTING_VALUE_TYPE><ECIOPLL><EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL><c>
<SETTING_VALUE_TYPE><ECIOSWPLL><EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL><d>
<SETTING_VALUE_TYPE><HSSWPLL><HS oscillator with SW enabled 4x PLL><e>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><83><2>
<SWITCH_INFO_TYPE><MODE><Processor Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by WAIT1:WAIT0 bits (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><Multiplexed with RB3 or RE7><0>
<SETTING_VALUE_TYPE><PORTC><Multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP Mux bit><2><2>
<SETTING_VALUE_TYPE><PORTH><ECCP1 (P1B/P1C) and ECCP3 (P3B/P3C) PWM outputs are multiplexed with RH7 through RH4><0>
<SETTING_VALUE_TYPE><PORTE><ECCP1 (P1B/P1C) and ECCP3 (P3B/P3C) PWM outputs are multiplexed with RE6 through RE3><2>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a262><PIC18LF8527><18xxxx><6><1><bfff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><f3><4>
<SWITCH_INFO_TYPE><MODE><Processor Data Memory Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><ADDRBW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><ADDR8BIT><8-bit Address Bus><0>
<SETTING_VALUE_TYPE><ADDR12BIT><12-bit Address Bus><10>
<SETTING_VALUE_TYPE><ADDR16BIT><16-bit Address Bus><20>
<SETTING_VALUE_TYPE><ADDR20BIT><20-bit Address Bus><30>
<SWITCH_INFO_TYPE><DATABW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><DATA8BIT><8-bit External Bus mode><0>
<SETTING_VALUE_TYPE><DATA16BIT><16-bit External Bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits><0>
<SETTING_VALUE_TYPE><OFF><Wait selections are unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><ECCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><PORTH><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RH7, RH6, RH5 and RH4 respectively><0>
<SETTING_VALUE_TYPE><PORTE><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RE6, RE5, RE4 and RE3 respectively><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><3>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><3>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a263><PIC18LF8585><18xxxx><2><1><bfff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><2f><2>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><b>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator with OSC2 configured as divide by 4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator with OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator with OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with HW enabled 4x PLL><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator with OSC2 configured as RA6><7>
<SETTING_VALUE_TYPE><ECIOPLL><EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL><c>
<SETTING_VALUE_TYPE><ECIOSWPLL><EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL><d>
<SETTING_VALUE_TYPE><HSSWPLL><HS oscillator with SW enabled 4x PLL><e>
<SWITCH_INFO_TYPE><OSCS><Osc. Switch Enable><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown Out Detect><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><83><2>
<SWITCH_INFO_TYPE><MODE><Processor Mode><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by WAIT1:WAIT0 bits (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP Mux><2><2>
<SETTING_VALUE_TYPE><PORTH><P1B, P1C are multiplexed with RH7, RH6><0>
<SETTING_VALUE_TYPE><PORTE><P1B, P1C are multiplexed with RE6, RE5><2>
<SWITCH_INFO_TYPE><MCLRE><MCLR enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage Program><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><3>
<SWITCH_INFO_TYPE><CP0><Code Protect 000800-0003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 0004000-007FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 008000-00BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><3>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 004000-007FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><3>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 004000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a264><PIC18LF8620><18xxxx><2><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator w/ OSC2 configured as divide-by-4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300004><0><83><2>
<SWITCH_INFO_TYPE><MODE><Processor Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><3><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a265><PIC18LF8621><18xxxx><2><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><2f><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><b>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator with OSC2 configured as divide by 4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator with OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator with OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with HW enabled 4x PLL><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator with OSC2 configured as RA6><7>
<SETTING_VALUE_TYPE><ECIOPLL><EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL><c>
<SETTING_VALUE_TYPE><ECIOSWPLL><EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL><d>
<SETTING_VALUE_TYPE><HSSWPLL><HS oscillator with SW enabled 4x PLL><e>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscaler Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><83><2>
<SWITCH_INFO_TYPE><MODE><Processor Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by WAIT1:WAIT0 bits (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><ECCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><Multiplexed with RB3 or RE7><0>
<SETTING_VALUE_TYPE><PORTC><Multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP Mux bit><2><2>
<SETTING_VALUE_TYPE><PORTH><ECCP1 (P1B/P1C) and ECCP3 (P3B/P3C) PWM outputs are multiplexed with RH7 through RH4><0>
<SETTING_VALUE_TYPE><PORTE><ECCP1 (P1B/P1C) and ECCP3 (P3B/P3C) PWM outputs are multiplexed with RE6 through RE3><2>
<SWITCH_INFO_TYPE><MCLRE><MCLR Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-Voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-Voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh)  code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a266><PIC18LF8622><18xxxx><6><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><f3><4>
<SWITCH_INFO_TYPE><MODE><Processor Data Memory Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><ADDRBW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><ADDR8BIT><8-bit Address Bus><0>
<SETTING_VALUE_TYPE><ADDR12BIT><12-bit Address Bus><10>
<SETTING_VALUE_TYPE><ADDR16BIT><16-bit Address Bus><20>
<SETTING_VALUE_TYPE><ADDR20BIT><20-bit Address Bus><30>
<SWITCH_INFO_TYPE><DATABW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><DATA8BIT><8-bit External Bus mode><0>
<SETTING_VALUE_TYPE><DATA16BIT><16-bit External Bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits><0>
<SETTING_VALUE_TYPE><OFF><Wait selections are unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><ECCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><PORTH><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RH7, RH6, RH5 and RH4 respectively><0>
<SETTING_VALUE_TYPE><PORTE><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RE6, RE5, RE4 and RE3 respectively><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><4>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><4>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a267><PIC18LF8627><18xxxx><6><1><17fff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><f3><4>
<SWITCH_INFO_TYPE><MODE><Processor Data Memory Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><ADDRBW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><ADDR8BIT><8-bit Address Bus><0>
<SETTING_VALUE_TYPE><ADDR12BIT><12-bit Address Bus><10>
<SETTING_VALUE_TYPE><ADDR16BIT><16-bit Address Bus><20>
<SETTING_VALUE_TYPE><ADDR20BIT><20-bit Address Bus><30>
<SWITCH_INFO_TYPE><DATABW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><DATA8BIT><8-bit External Bus mode><0>
<SETTING_VALUE_TYPE><DATA16BIT><16-bit External Bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits><0>
<SETTING_VALUE_TYPE><OFF><Wait selections are unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><ECCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><PORTH><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RH7, RH6, RH5 and RH4 respectively><0>
<SETTING_VALUE_TYPE><PORTE><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RE6, RE5, RE4 and RE3 respectively><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><6>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><6>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><6>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a268><PIC18LF8628><18xxxx><6><1><17fff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><f3><4>
<SWITCH_INFO_TYPE><MODE><Processor Data Memory Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><ADDRBW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><ADDR8BIT><8-bit Address Bus><0>
<SETTING_VALUE_TYPE><ADDR12BIT><12-bit Address Bus><10>
<SETTING_VALUE_TYPE><ADDR16BIT><16-bit Address Bus><20>
<SETTING_VALUE_TYPE><ADDR20BIT><20-bit Address Bus><30>
<SWITCH_INFO_TYPE><DATABW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><DATA8BIT><8-bit External Bus mode><0>
<SETTING_VALUE_TYPE><DATA16BIT><16-bit External Bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits><0>
<SETTING_VALUE_TYPE><OFF><Wait selections are unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><ECCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><PORTH><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RH7, RH6, RH5 and RH4 respectively><0>
<SETTING_VALUE_TYPE><PORTE><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RE6, RE5, RE4 and RE3 respectively><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><6>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><6>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><6>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a269><PIC18LF8680><18xxxx><2><1><ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><2f><2>
<SWITCH_INFO_TYPE><OSC><Oscillator><f><b>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator with OSC2 configured as divide by 4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator with OSC2 configured as divide by 4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator with OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with HW enabled 4x PLL><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator with OSC2 configured as RA6><7>
<SETTING_VALUE_TYPE><ECIOPLL><EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL><c>
<SETTING_VALUE_TYPE><ECIOSWPLL><EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL><d>
<SETTING_VALUE_TYPE><HSSWPLL><HS oscillator with SW enabled 4x PLL><e>
<SWITCH_INFO_TYPE><OSCS><Osc. Switch Enable><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power Up Timer><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown Out Detect><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown Out Voltage><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><20><VBOR set to 2.0V><c>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Postscaler><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><83><2>
<SWITCH_INFO_TYPE><MODE><Processor Mode><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><WAIT><External Bus Wait><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by WAIT1:WAIT0 bits (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><3>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 Mux><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP Mux><2><2>
<SETTING_VALUE_TYPE><PORTH><P1B, P1C are multiplexed with RH7, RH6><0>
<SETTING_VALUE_TYPE><PORTE><P1B, P1C are multiplexed with RE6, RE5><2>
<SWITCH_INFO_TYPE><MCLRE><MCLR enable><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input enabled, MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled, RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low Voltage Program><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><f><4>
<SWITCH_INFO_TYPE><CP0><Code Protect 000800-0003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protect 0004000-007FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protect 008000-00BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protect 00C000-00FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh)  code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><f><4>
<SWITCH_INFO_TYPE><WRT0><Table Write Protect 00800-003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protect 004000-007FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Table Write Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Table Write Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><f><4>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protect 00800-003FFF><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protect 004000-07FFF><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protect 08000-0BFFF><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protect 0C000-0FFFF><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Boot block (000000-0007FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block (000000-0007FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a26a><PIC18LF8720><18xxxx><2><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><27><2>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator w/ OSC2 configured as divide-by-4 clock output><3>
<SETTING_VALUE_TYPE><EC><EC oscillator w/ OSC2 configured as divide-by-4 clock output><4>
<SETTING_VALUE_TYPE><ECIO><EC oscillator w/ OSC2 configured as RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator with PLL enabled; clock frequency = (4 x FOSC)><6>
<SETTING_VALUE_TYPE><RCIO><RC oscillator w/ OSC2 configured as RA6><7>
<SWITCH_INFO_TYPE><OSCS><Oscillator System Clock Switch Enable bit><20><2>
<SETTING_VALUE_TYPE><ON><Timer1 Oscillator system clock switch option is enabled (oscillator switching is enabled)><0>
<SETTING_VALUE_TYPE><OFF><Oscillator system clock switch option is disabled (main oscillator is source)><20>
<CONFIGREG_INFO_TYPE><300002><0><f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOR><Brown-out Reset Enable bit><2><2>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled><2>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><c><4>
<SETTING_VALUE_TYPE><45><VBOR set to 4.5V><0>
<SETTING_VALUE_TYPE><42><VBOR set to 4.2V><4>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7V><8>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><c>
<CONFIGREG_INFO_TYPE><300003><0><f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><e><8>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<CONFIGREG_INFO_TYPE><300004><0><83><2>
<SWITCH_INFO_TYPE><MODE><Processor Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits (MEMCOM<5:4>)><0>
<SETTING_VALUE_TYPE><OFF><Wait selections unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><3><1>
<SWITCH_INFO_TYPE><CCP2MUX><CCP2 Mux bit><1><2>
<SETTING_VALUE_TYPE><OFF><CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><ON><CCP2 input/output is multiplexed with RC1><1>
<CONFIGREG_INFO_TYPE><300006><0><85><3>
<SWITCH_INFO_TYPE><STVR><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Low-Voltage ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Low-voltage ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Low-voltage ICSP enabled><4>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><8>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<SWITCH_INFO_TYPE><CP6><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not code-protected><40>
<SWITCH_INFO_TYPE><CP7><Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not code-protected><80>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000200-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000200-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0001FFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0001FFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a26b><PIC18LF8722><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><f3><4>
<SWITCH_INFO_TYPE><MODE><Processor Data Memory Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><ADDRBW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><ADDR8BIT><8-bit Address Bus><0>
<SETTING_VALUE_TYPE><ADDR12BIT><12-bit Address Bus><10>
<SETTING_VALUE_TYPE><ADDR16BIT><16-bit Address Bus><20>
<SETTING_VALUE_TYPE><ADDR20BIT><20-bit Address Bus><30>
<SWITCH_INFO_TYPE><DATABW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><DATA8BIT><8-bit External Bus mode><0>
<SETTING_VALUE_TYPE><DATA16BIT><16-bit External Bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits><0>
<SETTING_VALUE_TYPE><OFF><Wait selections are unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><ECCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><PORTH><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RH7, RH6, RH5 and RH4 respectively><0>
<SETTING_VALUE_TYPE><PORTE><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RE6, RE5, RE4 and RE3 respectively><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><8>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<SWITCH_INFO_TYPE><CP6><Code Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (01BFFF-018000h) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (01BFFF-018000h) not code-protected><40>
<SWITCH_INFO_TYPE><CP7><Code Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not code-protected><80>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (01BFFF-018000h) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (01BFFF-018000h) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a26c><PIC18LF8723><18xxxx><6><1><1ffff><10><ff><3ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300001><0><7><3>
<SWITCH_INFO_TYPE><OSC><Oscillator Selection bits><f><a>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><External RC oscillator, CLKO function on RA6><3>
<SETTING_VALUE_TYPE><EC><EC oscillator, CLKO function on RA6><4>
<SETTING_VALUE_TYPE><ECIO6><EC oscillator, port function on RA6><5>
<SETTING_VALUE_TYPE><HSPLL><HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1)><6>
<SETTING_VALUE_TYPE><RCIO6><External RC oscillator, port function on RA6><7>
<SETTING_VALUE_TYPE><INTIO67><Internal oscillator block, port function on RA6 and RA7><8>
<SETTING_VALUE_TYPE><INTIO7><Internal oscillator block, CLKO function on RA6, port function on RA7><9>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Two-Speed Start-up disabled><0>
<SETTING_VALUE_TYPE><ON><Two-Speed Start-up enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRT><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Voltage bits><18><4>
<SETTING_VALUE_TYPE><0><Maximum setting><0>
<SETTING_VALUE_TYPE><1><><8>
<SETTING_VALUE_TYPE><2><><10>
<SETTING_VALUE_TYPE><3><Minimum setting><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled (control is placed on the SWDTEN bit)><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300004><0><f3><4>
<SWITCH_INFO_TYPE><MODE><Processor Data Memory Mode Select bits><3><4>
<SETTING_VALUE_TYPE><EM><Extended Microcontroller mode><0>
<SETTING_VALUE_TYPE><MPB><Microprocessor with Boot Block mode><1>
<SETTING_VALUE_TYPE><MP><Microprocessor mode><2>
<SETTING_VALUE_TYPE><MC><Microcontroller mode><3>
<SWITCH_INFO_TYPE><ADDRBW><Address Bus Width Select bits><30><4>
<SETTING_VALUE_TYPE><ADDR8BIT><8-bit Address Bus><0>
<SETTING_VALUE_TYPE><ADDR12BIT><12-bit Address Bus><10>
<SETTING_VALUE_TYPE><ADDR16BIT><16-bit Address Bus><20>
<SETTING_VALUE_TYPE><ADDR20BIT><20-bit Address Bus><30>
<SWITCH_INFO_TYPE><DATABW><Data Bus Width Select bit><40><2>
<SETTING_VALUE_TYPE><DATA8BIT><8-bit External Bus mode><0>
<SETTING_VALUE_TYPE><DATA16BIT><16-bit External Bus mode><40>
<SWITCH_INFO_TYPE><WAIT><External Bus Data Wait Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits><0>
<SETTING_VALUE_TYPE><OFF><Wait selections are unavailable for table reads and table writes><80>
<CONFIGREG_INFO_TYPE><300005><0><83><4>
<SWITCH_INFO_TYPE><CCP2MX><CCP2 MUX bit><1><2>
<SETTING_VALUE_TYPE><PORTBE><ECCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.><0>
<SETTING_VALUE_TYPE><PORTC><ECCP2 input/output is multiplexed with RC1><1>
<SWITCH_INFO_TYPE><ECCPMX><ECCP MUX bit><2><2>
<SETTING_VALUE_TYPE><PORTH><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RH7, RH6, RH5 and RH4 respectively><0>
<SETTING_VALUE_TYPE><PORTE><ECCP1/3 (P1B/P1C/P3B/P3C) are multiplexed onto RE6, RE5, RE4 and RE3 respectively><2>
<SWITCH_INFO_TYPE><LPT1OSC><Low-Power Timer1 Oscillator Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Timer1 configured for higher power operation><0>
<SETTING_VALUE_TYPE><ON><Timer1 configured for low-power operation><4>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RG5 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RG5 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bits><30><3>
<SETTING_VALUE_TYPE><BB2K><1K word (2 Kbytes) Boot Block size><0>
<SETTING_VALUE_TYPE><BB4K><2K words (4 Kbytes) Boot Block size><10>
<SETTING_VALUE_TYPE><BB8K><4K words (8 Kbytes) Boot Block size><20>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><ff><8>
<SWITCH_INFO_TYPE><CP0><Code Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not code-protected><2>
<SWITCH_INFO_TYPE><CP2><Code Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not code-protected><4>
<SWITCH_INFO_TYPE><CP3><Code Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not code-protected><8>
<SWITCH_INFO_TYPE><CP4><Code Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not code-protected><10>
<SWITCH_INFO_TYPE><CP5><Code Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not code-protected><20>
<SWITCH_INFO_TYPE><CP6><Code Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (01BFFF-018000h) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (01BFFF-018000h) not code-protected><40>
<SWITCH_INFO_TYPE><CP7><Code Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not code-protected><80>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-0007FFh) code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-0007FFh) not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><8>
<SWITCH_INFO_TYPE><WRT0><Write Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Write Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not write-protected><2>
<SWITCH_INFO_TYPE><WRT2><Write Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not write-protected><4>
<SWITCH_INFO_TYPE><WRT3><Write Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not write-protected><8>
<SWITCH_INFO_TYPE><WRT4><Write Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not write-protected><10>
<SWITCH_INFO_TYPE><WRT5><Write Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRT6><Write Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (01BFFF-018000h) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (01BFFF-018000h) not write-protected><40>
<SWITCH_INFO_TYPE><WRT7><Write Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not write-protected><80>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers (300000-3000FFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers (300000-3000FFh) not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><8>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit Block 0><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 (000800, 001000 or 002000-003FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 (000800, 001000 or 002000-003FFFh) not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit Block 1><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 (004000-007FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 (004000-007FFFh) not protected from table reads executed in other blocks><2>
<SWITCH_INFO_TYPE><EBTR2><Table Read Protection bit Block 2><4><2>
<SETTING_VALUE_TYPE><ON><Block 2 (008000-00BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks><4>
<SWITCH_INFO_TYPE><EBTR3><Table Read Protection bit Block 3><8><2>
<SETTING_VALUE_TYPE><ON><Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks><8>
<SWITCH_INFO_TYPE><EBTR4><Table Read Protection bit Block 4><10><2>
<SETTING_VALUE_TYPE><ON><Block 4 (010000-013FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 4 (010000-013FFFh) not protected from table reads executed in other blocks><10>
<SWITCH_INFO_TYPE><EBTR5><Table Read Protection bit Block 5><20><2>
<SETTING_VALUE_TYPE><ON><Block 5 (014000-017FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 5 (014000-017FFFh) not protected from table reads executed in other blocks><20>
<SWITCH_INFO_TYPE><EBTR6><Table Read Protection bit Block 6><40><2>
<SETTING_VALUE_TYPE><ON><Block 6 (018000-01BFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 6 (018000-01BFFFh) not protected from table reads executed in other blocks><40>
<SWITCH_INFO_TYPE><EBTR7><Table Read Protection bit Block 7><80><2>
<SETTING_VALUE_TYPE><ON><Block 7 (01C000-01FFFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 7 (01C000-01FFFFh) not protected from table reads executed in other blocks><80>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot Block (000000-007FFF, 000FFF or 001FFFh) protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot Block (000000-007FFF, 000FFF or 001FFFh) not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><a004><MCP19110><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to 3FFh write protected, 400h to FFFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a005><MCP19111><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 3FFh write protected, 400h to 7FFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 7FFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a006><MCP19114><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><100><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR disabled during sleep and enabled during operation><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to 3FFh write protected, 400h to FFFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a007><MCP19115><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bitON><100><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR disabled during sleep and enabled during operation><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to 3FFh write protected, 400h to FFFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a023><MCP19116><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><100><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR disabled during sleep and enabled during operation><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to 3FFh write protected, 400h to FFFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a024><MCP19117><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><100><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR disabled during sleep and enabled during operation><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to 3FFh write protected, 400h to FFFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a008><MCP19118><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><3fff><5>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to 3FFh write protected, 400h to FFFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a009><MCP19119><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><3fff><5>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 3FFh write protected, 400h to 7FFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 7FFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a00a><MCP19120><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><100><2>
<SETTING_VALUE_TYPE><OFF><BOR Disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled during operation and disabled in Sleep><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFh write protected, 200h to 3FFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to FFh write protected, 100h to 3FFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a00b><MCP19121><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><100><2>
<SETTING_VALUE_TYPE><OFF><BOR Disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled during operation and disabled in Sleep><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFh write protected, 200h to 3FFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to FFh write protected, 100h to 3FFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a010><MCP19122><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><100><2>
<SETTING_VALUE_TYPE><OFF><BOR Disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled during operation and disabled in Sleep><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFh write protected, 200h to 3FFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to FFh write protected, 100h to 3FFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a011><MCP19123><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><100><2>
<SETTING_VALUE_TYPE><OFF><BOR Disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled during operation and disabled in Sleep><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 1FFh write protected, 200h to 3FFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to FFh write protected, 100h to 3FFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a00c><MCP19124><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><3fff><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><100><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR disabled during sleep and enabled during operation><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to 3FFh write protected, 400h to FFFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a00d><MCP19125><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><3fff><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bitON><100><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR disabled during sleep and enabled during operation><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to 3FFh write protected, 400h to FFFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a027><MCP19126><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><100><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR disabled during sleep and enabled during operation><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to FFFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to 3FFh write protected, 400h to FFFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a2d5><MCP19128><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><100><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR disabled during sleep and enabled during operation><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to 3FFh write protected, 400h to FFFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a02a><MCP19132><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><3>
<SWITCH_INFO_TYPE><ICM_CM><Input Current Monitor Common Mode Select bit><1><2>
<SETTING_VALUE_TYPE><HIGHCMR><Input Current Monitor High Voltage Range><0>
<SETTING_VALUE_TYPE><LOWCMR><Input Current Monitor High Voltage Range><1>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><30><4>
<SETTING_VALUE_TYPE><LFINTOSC><32KHz><0>
<SETTING_VALUE_TYPE><HFINTOSC0><4MHz><10>
<SETTING_VALUE_TYPE><HFINTOSC1><16MHz><20>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><30>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><DEMDIS><Zero-cross detect disable><400><2>
<SETTING_VALUE_TYPE><ON><Diode Emulation Mode Enabled><0>
<SETTING_VALUE_TYPE><OFF><Diode Emulation Mode Disabled><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger><2000><2>
<SETTING_VALUE_TYPE><ON><background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><4>
<SWITCH_INFO_TYPE><WRT><UserNVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ON><0x0000 to 0x1FFF write protected><0>
<SETTING_VALUE_TYPE><WRT_lower><0x0000 to x0FFF write protected><1>
<SETTING_VALUE_TYPE><WRT_upper><0x0000 to 0x01FF write protected><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Words write protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Configuration Words are Write Protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words Not Write Protected><100>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><1000><2>
<SETTING_VALUE_TYPE><not_available><Scanner module is not available for use><0>
<SETTING_VALUE_TYPE><available><Scanner module is available for use><1000>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM code protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection disabled><2>
<PART_INFO_TYPE><a02b><MCP19133><16Exxx><2><4><1fff><20><7f><ff><0-0><0-0><0><5>
<CONFIGREG_INFO_TYPE><8007><0><3fff><3>
<SWITCH_INFO_TYPE><ICM_CM><Input Current Monitor Common Mode Select bit><1><2>
<SETTING_VALUE_TYPE><HIGHCMR><Input Current Monitor High Voltage Range><0>
<SETTING_VALUE_TYPE><LOWCMR><Input Current Monitor Low Voltage Range><1>
<SWITCH_INFO_TYPE><RSTOSC><Power-up default value for COSC bits><30><4>
<SETTING_VALUE_TYPE><LFINTOSC><32KHz><0>
<SETTING_VALUE_TYPE><HFINTOSC0><4MHz><10>
<SETTING_VALUE_TYPE><HFINTOSC1><16MHz><20>
<SETTING_VALUE_TYPE><RESERVED><RESERVED><30>
<SWITCH_INFO_TYPE><CSWEN><Clock Switch Enable bit><800><2>
<SETTING_VALUE_TYPE><OFF><The NOSC and NDIV bits cannot be changed by user software><0>
<SETTING_VALUE_TYPE><ON><Writing to NOSC and NDIV is allowed><800>
<CONFIGREG_INFO_TYPE><8008><0><3fff><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin function is port defined function><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is Master Clear function><1>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><2><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><2>
<SWITCH_INFO_TYPE><LPBOREN><Low-Power BOR enable bit><20><2>
<SETTING_VALUE_TYPE><ON><ULPBOR enabled><0>
<SETTING_VALUE_TYPE><OFF><ULPBOR disabled><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out reset enable bits><c0><4>
<SETTING_VALUE_TYPE><OFF><Brown-out reset disabled><0>
<SETTING_VALUE_TYPE><SBOREN><Brown-out reset enabled according to SBOREN bit><40>
<SETTING_VALUE_TYPE><NSLEEP><Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored><80>
<SETTING_VALUE_TYPE><ON><Brown-out Reset Enabled, SBOREN bit is ignored><c0>
<SWITCH_INFO_TYPE><DEMDIS><Diode Emulation (DEM) disable bit><400><2>
<SETTING_VALUE_TYPE><ON><Diode Emulation Mode Enabled><0>
<SETTING_VALUE_TYPE><OFF><Diode Emulation Mode Disabled><400>
<SWITCH_INFO_TYPE><PPS1WAY><Peripheral Pin Select one-way control><800><2>
<SETTING_VALUE_TYPE><OFF><The PPSLOCK bit can be set and cleared repeatedly by software><0>
<SETTING_VALUE_TYPE><ON><The PPSLOCK bit can be cleared and set only once in software><800>
<SWITCH_INFO_TYPE><STVREN><Stack Overflow/Underflow Reset Enable bit><1000><2>
<SETTING_VALUE_TYPE><OFF><Stack Overflow or Underflow will not cause a reset><0>
<SETTING_VALUE_TYPE><ON><Stack Overflow or Underflow will cause a reset><1000>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><2000><2>
<SETTING_VALUE_TYPE><ON><background debugger enabled><0>
<SETTING_VALUE_TYPE><OFF><Background Debugger disabled><2000>
<CONFIGREG_INFO_TYPE><8009><0><3fff><4>
<SWITCH_INFO_TYPE><WDTCPS><WDT Period Select bits><1f><20>
<SETTING_VALUE_TYPE><WDTCPS_0><Divider ratio 1:32><0>
<SETTING_VALUE_TYPE><WDTCPS_1><Divider ratio 1:64><1>
<SETTING_VALUE_TYPE><WDTCPS_2><Divider ratio 1:128><2>
<SETTING_VALUE_TYPE><WDTCPS_3><Divider ratio 1:256><3>
<SETTING_VALUE_TYPE><WDTCPS_4><Divider ratio 1:512><4>
<SETTING_VALUE_TYPE><WDTCPS_5><Divider ratio 1:1024><5>
<SETTING_VALUE_TYPE><WDTCPS_6><Divider ratio 1:2048><6>
<SETTING_VALUE_TYPE><WDTCPS_7><Divider ratio 1:4096><7>
<SETTING_VALUE_TYPE><WDTCPS_8><Divider ratio 1:8192><8>
<SETTING_VALUE_TYPE><WDTCPS_9><Divider ratio 1:16384><9>
<SETTING_VALUE_TYPE><WDTCPS_10><Divider ratio 1:32768><a>
<SETTING_VALUE_TYPE><WDTCPS_11><Divider ratio 1:65536><b>
<SETTING_VALUE_TYPE><WDTCPS_12><Divider ratio 1:131072><c>
<SETTING_VALUE_TYPE><WDTCPS_13><Divider ratio 1:262144><d>
<SETTING_VALUE_TYPE><WDTCPS_14><Divider ratio 1:524299><e>
<SETTING_VALUE_TYPE><WDTCPS_15><Divider ratio 1:1048576><f>
<SETTING_VALUE_TYPE><WDTCPS_16><Divider ratio 1:2097152><10>
<SETTING_VALUE_TYPE><WDTCPS_17><Divider ratio 1:4194304><11>
<SETTING_VALUE_TYPE><WDTCPS_18><Divider ratio 1:8388608><12>
<SETTING_VALUE_TYPE><WDTCPS_19><Divider ratio 1:32><13>
<SETTING_VALUE_TYPE><WDTCPS_20><Divider ratio 1:32><14>
<SETTING_VALUE_TYPE><WDTCPS_21><Divider ratio 1:32><15>
<SETTING_VALUE_TYPE><WDTCPS_22><Divider ratio 1:32><16>
<SETTING_VALUE_TYPE><WDTCPS_23><Divider ratio 1:32><17>
<SETTING_VALUE_TYPE><WDTCPS_24><Divider ratio 1:32><18>
<SETTING_VALUE_TYPE><WDTCPS_25><Divider ratio 1:32><19>
<SETTING_VALUE_TYPE><WDTCPS_26><Divider ratio 1:32><1a>
<SETTING_VALUE_TYPE><WDTCPS_27><Divider ratio 1:32><1b>
<SETTING_VALUE_TYPE><WDTCPS_28><Divider ratio 1:32><1c>
<SETTING_VALUE_TYPE><WDTCPS_29><Divider ratio 1:32><1d>
<SETTING_VALUE_TYPE><WDTCPS_30><Divider ratio 1:32><1e>
<SETTING_VALUE_TYPE><WDTCPS_31><Divider ratio 1:65536; software control of WDTPS><1f>
<SWITCH_INFO_TYPE><WDTE><WDT operating mode><60><4>
<SETTING_VALUE_TYPE><OFF><WDT Disabled, SWDTEN is ignored><0>
<SETTING_VALUE_TYPE><SWDTEN><WDT enabled/disabled by SWDTEN bit in WDTCON0><20>
<SETTING_VALUE_TYPE><NSLEEP><WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored><40>
<SETTING_VALUE_TYPE><ON><WDT enabled regardless of sleep; SWDTEN ignored><60>
<SWITCH_INFO_TYPE><WDTCWS><WDT Window Select bits><700><8>
<SETTING_VALUE_TYPE><WDTCWS_0><window delay = 87.5 percent of time; no software control; keyed access required><0>
<SETTING_VALUE_TYPE><WDTCWS_1><window delay = 75 percent of time; no software control; keyed access required><100>
<SETTING_VALUE_TYPE><WDTCWS_2><window delay = 62.5 percent of time; no software control; keyed access required><200>
<SETTING_VALUE_TYPE><WDTCWS_3><window delay = 50 percent of time; no software control; keyed access required><300>
<SETTING_VALUE_TYPE><WDTCWS_4><window delay = 37.5 percent of time; no software control; keyed access required><400>
<SETTING_VALUE_TYPE><WDTCWS_5><window delay = 25 percent of time; no software control; keyed access required><500>
<SETTING_VALUE_TYPE><WDTCWS_6><window always open (100%); no software control; keyed access required><600>
<SETTING_VALUE_TYPE><WDTCWS_7><window always open (100%); software control; keyed access not required><700>
<SWITCH_INFO_TYPE><WDTCCS><WDT input clock selector><3800><3>
<SETTING_VALUE_TYPE><LFINTOSC><WDT reference clock is the 31.0kHz LFINTOSC output><0>
<SETTING_VALUE_TYPE><HFINTOSC><WDT reference clock is the 31.25 kHz HFINTOSC><800>
<SETTING_VALUE_TYPE><SC><Software Control><3800>
<CONFIGREG_INFO_TYPE><800a><0><3fff><4>
<SWITCH_INFO_TYPE><WRT><UserNVM self-write protection bits><3><4>
<SETTING_VALUE_TYPE><ON><0x0000 to 0x1FFF write protected><0>
<SETTING_VALUE_TYPE><WRT_lower><0x0000 to x0FFF write protected><1>
<SETTING_VALUE_TYPE><WRT_upper><0x0000 to 0x01FF write protected><2>
<SETTING_VALUE_TYPE><OFF><Write protection off><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Words write protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Configuration Words are Write Protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration Words Not Write Protected><100>
<SWITCH_INFO_TYPE><SCANE><Scanner Enable bit><1000><2>
<SETTING_VALUE_TYPE><not_available><Scanner module is not available for use><0>
<SETTING_VALUE_TYPE><available><Scanner module is available for use><1000>
<SWITCH_INFO_TYPE><LVP><Low Voltage Programming Enable bit><2000><2>
<SETTING_VALUE_TYPE><OFF><High Voltage on MCLR/Vpp must be used for programming><0>
<SETTING_VALUE_TYPE><ON><Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.><2000>
<CONFIGREG_INFO_TYPE><800b><0><3fff><2>
<SWITCH_INFO_TYPE><CP><UserNVM Program memory code protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection disabled><1>
<SWITCH_INFO_TYPE><CPD><DataNVM code protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code protection enabled><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM code protection disabled><2>
<PART_INFO_TYPE><a00e><MCP19214><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><100><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR disabled during sleep and enabled during operation><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to 1FFFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to 3FFh write protected, 400h to FFFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a025><MCP19215><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><100><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR disabled during sleep and enabled during operation><100>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><0000h to 1FFFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 7FFh write protected, 800h to FFFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to 3FFh write protected, 400h to FFFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a00f><MCP19625><16xxxx><0><2><fff><4><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><5>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Function Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><MCLR pin is alternate function, MCLR function is internally disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin is MCLR function and weak internal pull-up is enabled><20>
<SWITCH_INFO_TYPE><CP><Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Program memory is external read and write protected><0>
<SETTING_VALUE_TYPE><OFF><Program memory is not code protected><40>
<SWITCH_INFO_TYPE><WRT><Flash Program Memory Self Write Enable bits><c00><4>
<SETTING_VALUE_TYPE><ALL><000h to 7FFh write protected, entire program memory is write protected.><0>
<SETTING_VALUE_TYPE><HALF><000h to 3FFh write protected, 400h to 7FFh may be modified by PMCON1 control><400>
<SETTING_VALUE_TYPE><BOOT><000h to 1FFh write protected, 200h to 7FFh may be modified by PMCON1 control><800>
<SETTING_VALUE_TYPE><OFF><Write protection off><c00>
<PART_INFO_TYPE><a000><MCP25020><16xxxx><0><0><45><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><2>
<SWITCH_INFO_TYPE><OSC><Oscillator><3><3>
<SETTING_VALUE_TYPE><LP><LP><0>
<SETTING_VALUE_TYPE><XT><XT><1>
<SETTING_VALUE_TYPE><HS><HS><3>
<SWITCH_INFO_TYPE><RSTEN><Reset on GP7 Enable Bit><4><2>
<SETTING_VALUE_TYPE><OFF><GP7 is general I/O><0>
<SETTING_VALUE_TYPE><ON><Reset enabled on GP7 I/O pin><4>
<PART_INFO_TYPE><a001><MCP25025><16xxxx><0><0><45><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><2>
<SWITCH_INFO_TYPE><OSC><Oscillator><3><3>
<SETTING_VALUE_TYPE><LP><LP><0>
<SETTING_VALUE_TYPE><XT><XT><1>
<SETTING_VALUE_TYPE><HS><HS><3>
<SWITCH_INFO_TYPE><RSTEN><Reset on GP7 Enable Bit><4><2>
<SETTING_VALUE_TYPE><OFF><GP7 is general I/O><0>
<SETTING_VALUE_TYPE><ON><Reset enabled on GP7 I/O pin><4>
<PART_INFO_TYPE><a002><MCP25050><16xxxx><0><0><45><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><2>
<SWITCH_INFO_TYPE><OSC><Oscillator><3><3>
<SETTING_VALUE_TYPE><LP><LP><0>
<SETTING_VALUE_TYPE><XT><XT><1>
<SETTING_VALUE_TYPE><HS><HS><3>
<SWITCH_INFO_TYPE><RSTEN><Reset on GP7 Enable Bit><4><2>
<SETTING_VALUE_TYPE><OFF><GP7 is general I/O><0>
<SETTING_VALUE_TYPE><ON><Reset enabled on GP7 I/O pin><4>
<PART_INFO_TYPE><a003><MCP25055><16xxxx><0><0><45><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><2>
<SWITCH_INFO_TYPE><OSC><Oscillator><3><3>
<SETTING_VALUE_TYPE><LP><LP><0>
<SETTING_VALUE_TYPE><XT><XT><1>
<SETTING_VALUE_TYPE><HS><HS><3>
<SWITCH_INFO_TYPE><RSTEN><Reset on GP7 Enable Bit><4><2>
<SETTING_VALUE_TYPE><OFF><GP7 is general I/O><0>
<SETTING_VALUE_TYPE><ON><Reset enabled on GP7 I/O pin><4>
<PART_INFO_TYPE><a510><MCV08A><16c5x><0><2><3ff><2><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><5>
<SWITCH_INFO_TYPE><OSC><Oscillator Select><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator with 18 ms DRT><0>
<SETTING_VALUE_TYPE><XT><XT oscillator with 18 ms DRT><1>
<SETTING_VALUE_TYPE><IntRC><INTOSC with 1.125 ms DRT><2>
<SETTING_VALUE_TYPE><ExtRC><EXTRC with 1.125 ms DRT><3>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code Protect><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><GP3/MCLR pin functions as GP3, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><GP3/MCLR Functions as MCLR><10>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select bit><20><2>
<SETTING_VALUE_TYPE><OFF><4 MHz INTOSC Speed><0>
<SETTING_VALUE_TYPE><ON><8 MHz INTOSC Speed><20>
<PART_INFO_TYPE><c526><MCV14A><16c5x><0><2><3ff><4><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ff><6>
<SWITCH_INFO_TYPE><FOSC><Oscillator><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator and 18 ms DRT><0>
<SETTING_VALUE_TYPE><XT><XT oscillator and 18 ms DRT><1>
<SETTING_VALUE_TYPE><HS><HS oscillator and 18 ms DRT><2>
<SETTING_VALUE_TYPE><EC><EC oscillator with RB4 function on RB4/OSC2/CLKOUT and 1 ms DRT><3>
<SETTING_VALUE_TYPE><INTRC_RB4><INTRC with RB4 function on RB4/OSC2/CLKOUT and 1 ms DRT><4>
<SETTING_VALUE_TYPE><INTRC_CLKOUT><INTRC with CLKOUT function on RB4/OSC2/CLKOUT and 1 ms DRT><5>
<SETTING_VALUE_TYPE><ExtRC_RB4><EXTRC with RB4 function on RB4/OSC2/CLKOUT and 1 ms DRT><6>
<SETTING_VALUE_TYPE><ExtRC_CLKOUT><EXTRC with CLKOUT function on RB4/OSC2/CLKOUT and 1 ms DRT><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><8>
<SWITCH_INFO_TYPE><CP><Code Protection bit><10><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><10>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><RB3/MCLR functions as RB3, MCLR internally tied to Vdd><0>
<SETTING_VALUE_TYPE><ON><RB3/MCLR functions as MCLR><20>
<SWITCH_INFO_TYPE><IOSCFS><Internal Oscillator Frequency Select><40><2>
<SETTING_VALUE_TYPE><4MHz><4 MHz INTOSC Speed><0>
<SETTING_VALUE_TYPE><8MHz><8 MHz INTOSC Speed><40>
<SWITCH_INFO_TYPE><CPDF><Code Protection bit - Flash Data Memory><80><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><80>
<PART_INFO_TYPE><cf54><MCV18A><16c5x><0><1><1ff><1><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<PART_INFO_TYPE><a716><MCV18E><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><ffff><6>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled and can be enabled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><PWRTE><Power-up Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><8>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOR disabled><0>
<SETTING_VALUE_TYPE><ON><BOR enabled><40>
<SWITCH_INFO_TYPE><BODENV><Brown-out Reset Voltage bit><80><2>
<SETTING_VALUE_TYPE><25><VBOR set to 2.5V><0>
<SETTING_VALUE_TYPE><40><VBOR set to 4.0V><80>
<SWITCH_INFO_TYPE><CP><Code Protect><2000><2>
<SETTING_VALUE_TYPE><ON><Program memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program memory code protection is disabled><2000>
<PART_INFO_TYPE><b135><MCV20USB><18xxxx><6><1><1fff><10><ff><ff><0-5f><f60-fff><0><c>
<CONFIGREG_INFO_TYPE><300000><0><0><2>
<SWITCH_INFO_TYPE><CPUDIV><CPU System Clock Selection bits><18><4>
<SETTING_VALUE_TYPE><NOCLKDIV><No CPU System Clock divide><0>
<SETTING_VALUE_TYPE><CLKDIV2><CPU System Clock divided by 2><8>
<SETTING_VALUE_TYPE><CLKDIV3><CPU System Clock divided by 3><10>
<SETTING_VALUE_TYPE><CLKDIV4><CPU System Clock divided by 4><18>
<SWITCH_INFO_TYPE><USBDIV><USB Clock Selection bit><20><2>
<SETTING_VALUE_TYPE><OFF><USB clock comes directly from the OSC1/OSC2 oscillator block; no divide><0>
<SETTING_VALUE_TYPE><ON><USB clock comes from the OSC1/OSC2 divided by 2><20>
<CONFIGREG_INFO_TYPE><300001><0><27><5>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><f><d>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><ERCCLKOUT><External RC oscillator, CLKOUT function on OSC2><3>
<SETTING_VALUE_TYPE><ECCLKOUTH><EC, CLKOUT function on OSC2 (high)><4>
<SETTING_VALUE_TYPE><ECH><EC (high)><5>
<SETTING_VALUE_TYPE><ERC><External RC oscillator><7>
<SETTING_VALUE_TYPE><IRC><Internal RC oscillator><8>
<SETTING_VALUE_TYPE><IRCCLKOUT><Internal RC oscillator, CLKOUT function on OSC2><9>
<SETTING_VALUE_TYPE><ECCLKOUTM><EC, CLKOUT function on OSC2 (medium)><a>
<SETTING_VALUE_TYPE><ECM><EC (medium)><b>
<SETTING_VALUE_TYPE><ECCLKOUTL><EC, CLKOUT function on OSC2 (low)><c>
<SETTING_VALUE_TYPE><ECL><EC (low)><d>
<SWITCH_INFO_TYPE><PLLEN><4 X PLL Enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><PLL is under software control><0>
<SETTING_VALUE_TYPE><ON><Oscillator multiplied by 4><10>
<SWITCH_INFO_TYPE><PCLKEN><Primary Clock Enable bit><20><2>
<SETTING_VALUE_TYPE><OFF><Primary clock is under software control><0>
<SETTING_VALUE_TYPE><ON><Primary clock enabled><20>
<SWITCH_INFO_TYPE><FCMEN><Fail-Safe Clock Monitor Enable><40><2>
<SETTING_VALUE_TYPE><OFF><Fail-Safe Clock Monitor disabled><0>
<SETTING_VALUE_TYPE><ON><Fail-Safe Clock Monitor enabled><40>
<SWITCH_INFO_TYPE><IESO><Internal/External Oscillator Switchover bit><80><2>
<SETTING_VALUE_TYPE><OFF><Oscillator Switchover mode disabled><0>
<SETTING_VALUE_TYPE><ON><Oscillator Switchover mode enabled><80>
<CONFIGREG_INFO_TYPE><300002><0><1f><3>
<SWITCH_INFO_TYPE><PWRTEN><Power-up Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><1>
<SWITCH_INFO_TYPE><BOREN><Brown-out Reset Enable bits><6><4>
<SETTING_VALUE_TYPE><OFF><Brown-out Reset disabled in hardware and software><0>
<SETTING_VALUE_TYPE><ON><Brown-out Reset enabled and controlled by software (SBOREN is enabled)><2>
<SETTING_VALUE_TYPE><NOSLP><Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)><4>
<SETTING_VALUE_TYPE><SBORDIS><Brown-out Reset enabled in hardware only (SBOREN is disabled)><6>
<SWITCH_INFO_TYPE><BORV><Brown-out Reset Voltage bits><18><4>
<SETTING_VALUE_TYPE><30><VBOR set to 3.0 V nominal><0>
<SETTING_VALUE_TYPE><27><VBOR set to 2.7 V nominal><8>
<SETTING_VALUE_TYPE><22><VBOR set to 2.2 V nominal><10>
<SETTING_VALUE_TYPE><19><VBOR set to 1.9 V nominal><18>
<CONFIGREG_INFO_TYPE><300003><0><1f><2>
<SWITCH_INFO_TYPE><WDTEN><Watchdog Timer Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><WDT is controlled by SWDTEN bit of the WDTCON register><0>
<SETTING_VALUE_TYPE><ON><WDT is always enabled. SWDTEN bit has no effect.><1>
<SWITCH_INFO_TYPE><WDTPS><Watchdog Timer Postscale Select bits><1e><10>
<SETTING_VALUE_TYPE><1><1:1><0>
<SETTING_VALUE_TYPE><2><1:2><2>
<SETTING_VALUE_TYPE><4><1:4><4>
<SETTING_VALUE_TYPE><8><1:8><6>
<SETTING_VALUE_TYPE><16><1:16><8>
<SETTING_VALUE_TYPE><32><1:32><a>
<SETTING_VALUE_TYPE><64><1:64><c>
<SETTING_VALUE_TYPE><128><1:128><e>
<SETTING_VALUE_TYPE><256><1:256><10>
<SETTING_VALUE_TYPE><512><1:512><12>
<SETTING_VALUE_TYPE><1024><1:1024><14>
<SETTING_VALUE_TYPE><2048><1:2048><16>
<SETTING_VALUE_TYPE><4096><1:4096><18>
<SETTING_VALUE_TYPE><8192><1:8192><1a>
<SETTING_VALUE_TYPE><16384><1:16384><1c>
<SETTING_VALUE_TYPE><32768><1:32768><1e>
<CONFIGREG_INFO_TYPE><300005><0><88><2>
<SWITCH_INFO_TYPE><HFOFST><HFINTOSC Fast Start-up bit><8><2>
<SETTING_VALUE_TYPE><OFF><The system clock is held off until the HFINTOSC is stable.><0>
<SETTING_VALUE_TYPE><ON><HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR Pin Enable bit><80><2>
<SETTING_VALUE_TYPE><OFF><RA3 input pin enabled; MCLR disabled><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled; RA3 input pin disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><85><5>
<SWITCH_INFO_TYPE><STVREN><Stack Full/Underflow Reset Enable bit><1><2>
<SETTING_VALUE_TYPE><OFF><Stack full/underflow will not cause Reset><0>
<SETTING_VALUE_TYPE><ON><Stack full/underflow will cause Reset><1>
<SWITCH_INFO_TYPE><LVP><Single-Supply ICSP Enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><Single-Supply ICSP disabled><0>
<SETTING_VALUE_TYPE><ON><Single-Supply ICSP enabled><4>
<SWITCH_INFO_TYPE><BBSIZ><Boot Block Size Select bit><8><2>
<SETTING_VALUE_TYPE><OFF><512W boot block size><0>
<SETTING_VALUE_TYPE><ON><1kW boot block size><8>
<SWITCH_INFO_TYPE><XINST><Extended Instruction Set Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><Instruction set extension and Indexed Addressing mode disabled (Legacy mode)><0>
<SETTING_VALUE_TYPE><ON><Instruction set extension and Indexed Addressing mode enabled><40>
<SWITCH_INFO_TYPE><DEBUG><Background Debugger Enable bit><80><2>
<SETTING_VALUE_TYPE><ON><Background debugger enabled, RA0 and RA1 are dedicated to In-Circuit Debug><0>
<SETTING_VALUE_TYPE><OFF><Background debugger disabled, RA0 and RA1 configured as general purpose I/O pins><80>
<CONFIGREG_INFO_TYPE><300008><0><3><2>
<SWITCH_INFO_TYPE><CP0><Code Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not code-protected><1>
<SWITCH_INFO_TYPE><CP1><Code Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 code-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not code-protected><2>
<CONFIGREG_INFO_TYPE><300009><0><c0><2>
<SWITCH_INFO_TYPE><CPB><Boot Block Code Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block code-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not code-protected><40>
<SWITCH_INFO_TYPE><CPD><Data EEPROM Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM code-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not code-protected><80>
<CONFIGREG_INFO_TYPE><30000a><0><3><2>
<SWITCH_INFO_TYPE><WRT0><Table Write Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not write-protected><1>
<SWITCH_INFO_TYPE><WRT1><Table Write Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 write-protected><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not write-protected><2>
<CONFIGREG_INFO_TYPE><30000b><0><e0><3>
<SWITCH_INFO_TYPE><WRTC><Configuration Register Write Protection bit><20><2>
<SETTING_VALUE_TYPE><ON><Configuration registers write-protected><0>
<SETTING_VALUE_TYPE><OFF><Configuration registers not write-protected><20>
<SWITCH_INFO_TYPE><WRTB><Boot Block Write Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block write-protected><0>
<SETTING_VALUE_TYPE><OFF><Boot block not write-protected><40>
<SWITCH_INFO_TYPE><WRTD><Data EEPROM Write Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Data EEPROM write-protected><0>
<SETTING_VALUE_TYPE><OFF><Data EEPROM not write-protected><80>
<CONFIGREG_INFO_TYPE><30000c><0><3><2>
<SWITCH_INFO_TYPE><EBTR0><Table Read Protection bit><1><2>
<SETTING_VALUE_TYPE><ON><Block 0 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 0 not protected from table reads executed in other blocks><1>
<SWITCH_INFO_TYPE><EBTR1><Table Read Protection bit><2><2>
<SETTING_VALUE_TYPE><ON><Block 1 protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Block 1 not protected from table reads executed in other blocks><2>
<CONFIGREG_INFO_TYPE><30000d><0><40><1>
<SWITCH_INFO_TYPE><EBTRB><Boot Block Table Read Protection bit><40><2>
<SETTING_VALUE_TYPE><ON><Boot block protected from table reads executed in other blocks><0>
<SETTING_VALUE_TYPE><OFF><Boot block not protected from table reads executed in other blocks><40>
<PART_INFO_TYPE><cf57><MCV28A><16c5x><0><4><7ff><4><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><3>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><HS><HS oscillator><2>
<SETTING_VALUE_TYPE><RC><RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<PART_INFO_TYPE><500><PS500><18xxxx><2><1><3fff><10><ff><ff><0-7f><f80-fff><0><9>
<CONFIGREG_INFO_TYPE><300003><0><ff><1>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled-Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<CONFIGREG_INFO_TYPE><300005><0><ff><1>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR disabled, RA5 input enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR enabled, RA5 input disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><ff><1>
<SWITCH_INFO_TYPE><STVR><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<CONFIGREG_INFO_TYPE><300008><0><ff><2>
<SWITCH_INFO_TYPE><CP01><Code Protect 000200-001FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><CP23><Code Protect 002000-003FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<CONFIGREG_INFO_TYPE><300009><0><ff><2>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><CPD><Data EE Read Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000a><0><ff><2>
<SWITCH_INFO_TYPE><WRT01><Table Write Protect 00200-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><WRT23><Table Write Protect 02000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<CONFIGREG_INFO_TYPE><30000b><0><ff><3>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<SWITCH_INFO_TYPE><WRTD><Data EE Write Protect><80><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><80>
<CONFIGREG_INFO_TYPE><30000c><0><ff><2>
<SWITCH_INFO_TYPE><EBTR01><Table Read Protect 00200-01FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<SWITCH_INFO_TYPE><EBTR23><Table Read Protect 002000-03FFF><2><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><2>
<CONFIGREG_INFO_TYPE><30000d><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><810><PS810><18xxxx><2><1><1fff><10><ff><0><0-7f><f80-fff><0><9>
<CONFIGREG_INFO_TYPE><300003><0><ff><1>
<SWITCH_INFO_TYPE><WDT><Watchdog Timer><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled-Controlled by SWDTEN bit><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<CONFIGREG_INFO_TYPE><300005><0><ff><1>
<SWITCH_INFO_TYPE><MCLRE><Master Clear Enable><80><2>
<SETTING_VALUE_TYPE><OFF><MCLR disabled, RA5 input enabled><0>
<SETTING_VALUE_TYPE><ON><MCLR enabled, RA5 input disabled><80>
<CONFIGREG_INFO_TYPE><300006><0><ff><1>
<SWITCH_INFO_TYPE><STVR><Stack Overflow Reset><1><2>
<SETTING_VALUE_TYPE><OFF><Disabled><0>
<SETTING_VALUE_TYPE><ON><Enabled><1>
<CONFIGREG_INFO_TYPE><300008><0><ff><1>
<SWITCH_INFO_TYPE><CP01><Code Protect 000200-001FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<CONFIGREG_INFO_TYPE><300009><0><ff><1>
<SWITCH_INFO_TYPE><CPB><Code Protect Boot 000000-0001FF><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<CONFIGREG_INFO_TYPE><30000a><0><ff><1>
<SWITCH_INFO_TYPE><WRT01><Table Write Protect 000200-001FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<CONFIGREG_INFO_TYPE><30000b><0><ff><2>
<SWITCH_INFO_TYPE><WRTC><Config. Write Protect 300000-3000FF><20><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><20>
<SWITCH_INFO_TYPE><WRTB><Table Write Protect Boot 000000-0001FF><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<CONFIGREG_INFO_TYPE><30000c><0><ff><1>
<SWITCH_INFO_TYPE><EBTR01><Table Read Protect 000200-001FFF><1><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><1>
<CONFIGREG_INFO_TYPE><30000d><0><ff><1>
<SWITCH_INFO_TYPE><EBTRB><Table Read Protect Boot 000000-0001FF><40><2>
<SETTING_VALUE_TYPE><ON><Enabled><0>
<SETTING_VALUE_TYPE><OFF><Disabled><40>
<PART_INFO_TYPE><6509><PICRF509AF><16c5x><0><2><3ff><2><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><4>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><IntRC><internal RC oscillator><2>
<SETTING_VALUE_TYPE><ExtRC><external RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><MCLR tied to VDD, (Internally)><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled><10>
<PART_INFO_TYPE><7509><PICRF509AG><16c5x><0><2><3ff><2><1f><0><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><fff><0><ffff><4>
<SWITCH_INFO_TYPE><OSC><Oscillator selection bits><3><4>
<SETTING_VALUE_TYPE><LP><LP oscillator><0>
<SETTING_VALUE_TYPE><XT><XT oscillator><1>
<SETTING_VALUE_TYPE><IntRC><internal RC oscillator><2>
<SETTING_VALUE_TYPE><ExtRC><external RC oscillator><3>
<SWITCH_INFO_TYPE><WDT><Watchdog timer enable bit><4><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><4>
<SWITCH_INFO_TYPE><CP><Code protection bit><8><2>
<SETTING_VALUE_TYPE><ON><Code protection on><0>
<SETTING_VALUE_TYPE><OFF><Code protection off><8>
<SWITCH_INFO_TYPE><MCLRE><MCLR enable bit><10><2>
<SETTING_VALUE_TYPE><OFF><MCLR tied to VDD, (Internally)><0>
<SETTING_VALUE_TYPE><ON><MCLR pin enabled><10>
<PART_INFO_TYPE><3675><PICRF675F><16xxxx><0><0><3ff><2><5f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><31ff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRCIO><INTOSC oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RC oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-Up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><GP3/MCLR pin function select><20><2>
<SETTING_VALUE_TYPE><OFF><GP3/MCLR pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><GP3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Detect Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOD disabled><0>
<SETTING_VALUE_TYPE><ON><BOD enabled><40>
<SWITCH_INFO_TYPE><CP><Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<PART_INFO_TYPE><4675><PICRF675H><16xxxx><0><0><3ff><2><5f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><31ff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRCIO><INTOSC oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RC oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-Up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><GP3/MCLR pin function select><20><2>
<SETTING_VALUE_TYPE><OFF><GP3/MCLR pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><GP3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Detect Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOD disabled><0>
<SETTING_VALUE_TYPE><ON><BOD enabled><40>
<SWITCH_INFO_TYPE><CP><Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<PART_INFO_TYPE><5675><PICRF675K><16xxxx><0><0><3ff><2><5f><7f><0-0><0-0><0><1>
<CONFIGREG_INFO_TYPE><2007><0><31ff><7>
<SWITCH_INFO_TYPE><FOSC><Oscillator Selection bits><7><8>
<SETTING_VALUE_TYPE><LP><LP oscillator: Low power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><0>
<SETTING_VALUE_TYPE><XT><XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><1>
<SETTING_VALUE_TYPE><HS><HS oscillator: High speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN><2>
<SETTING_VALUE_TYPE><EC><EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN><3>
<SETTING_VALUE_TYPE><INTRCIO><INTOSC oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><4>
<SETTING_VALUE_TYPE><INTRCCLK><INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN><5>
<SETTING_VALUE_TYPE><EXTRCIO><RC oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><6>
<SETTING_VALUE_TYPE><EXTRCCLK><RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN><7>
<SWITCH_INFO_TYPE><WDTE><Watchdog Timer Enable bit><8><2>
<SETTING_VALUE_TYPE><OFF><WDT disabled><0>
<SETTING_VALUE_TYPE><ON><WDT enabled><8>
<SWITCH_INFO_TYPE><PWRTE><Power-Up Timer Enable bit><10><2>
<SETTING_VALUE_TYPE><ON><PWRT enabled><0>
<SETTING_VALUE_TYPE><OFF><PWRT disabled><10>
<SWITCH_INFO_TYPE><MCLRE><GP3/MCLR pin function select><20><2>
<SETTING_VALUE_TYPE><OFF><GP3/MCLR pin function is digital I/O, MCLR internally tied to VDD><0>
<SETTING_VALUE_TYPE><ON><GP3/MCLR pin function is MCLR><20>
<SWITCH_INFO_TYPE><BOREN><Brown-out Detect Enable bit><40><2>
<SETTING_VALUE_TYPE><OFF><BOD disabled><0>
<SETTING_VALUE_TYPE><ON><BOD enabled><40>
<SWITCH_INFO_TYPE><CP><Code Protection bit><80><2>
<SETTING_VALUE_TYPE><ON><Program Memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Program Memory code protection is disabled><80>
<SWITCH_INFO_TYPE><CPD><Data Code Protection bit><100><2>
<SETTING_VALUE_TYPE><ON><Data memory code protection is enabled><0>
<SETTING_VALUE_TYPE><OFF><Data memory code protection is disabled><100>
<PART_INFO_TYPE><4000><PIC14000><16xxxx><0><2><fff><2><7f><0><0-0><0-0><0><0>
<PART_INFO_TYPE><658A><PIC16C5X><16c5x><0><4><7ff><4><1f><0><0-0><0-0><0><0>
<PART_INFO_TYPE><6c77><PIC16CXX><16xxxx><0><4><1fff><4><7f><0><0-0><0-0><0><0>
<PART_INFO_TYPE><7C42><PIC17C42><17xxxx><0><1><ffff><4><ff><0><0-0><0-0><0><0>
<PART_INFO_TYPE><742a><PIC17C42A><17xxxx><0><1><ffff><4><ff><0><0-0><0-0><0><0>
<PART_INFO_TYPE><7c43><PIC17C43><17xxxx><0><1><ffff><4><ff><0><0-0><0-0><0><0>
<PART_INFO_TYPE><7c44><PIC17C44><17xxxx><0><1><ffff><4><ff><0><0-0><0-0><0><0>
<PART_INFO_TYPE><7752><PIC17C752><17xxxx><0><1><ffff><9><ff><0><0-0><0-0><0><0>
<PART_INFO_TYPE><7756><PIC17C756><17xxxx><0><2><ffff><8><ff><0><0-0><0-0><0><0>
<PART_INFO_TYPE><756a><PIC17C756A><17xxxx><0><2><ffff><9><ff><0><0-0><0-0><0><0>
<PART_INFO_TYPE><7762><PIC17C762><17xxxx><0><2><ffff><9><ff><0><0-0><0-0><0><0>
<PART_INFO_TYPE><7766><PIC17C766><17xxxx><0><2><ffff><9><ff><0><0-0><0-0><0><0>
<PART_INFO_TYPE><e42a><PIC17CR42><17xxxx><0><1><ffff><4><ff><0><0-0><0-0><0><0>
<PART_INFO_TYPE><ec43><PIC17C43><17xxxx><0><1><ffff><4><ff><0><0-0><0-0><0><0>
<PART_INFO_TYPE><7756><PIC17CXX><17xxxx><0><2><ffff><8><ff><0><0-0><0-0><0><0>
<PART_INFO_TYPE><8452><PIC18CXX><18xxxx><6><1><1fffff><10><ff><0><0-5f><f60-fff><0><0>
<PART_INFO_TYPE><7675><AP7675><16xxxx><0><1><7ff><2><7f><0><0-0><0-0><0><0>
<PART_INFO_TYPE><1fff><EEPROM16><EEPROM16><0><1><7f><0><0><0><0-0><0-0><0><0>
<PART_INFO_TYPE><1fff><EEPROM8><EEPROM8><0><1><7f><0><0><0><0-0><0-0><0><0>
